JPH0683035A - Mask structure for flexible circuit board - Google Patents

Mask structure for flexible circuit board

Info

Publication number
JPH0683035A
JPH0683035A JP15732593A JP15732593A JPH0683035A JP H0683035 A JPH0683035 A JP H0683035A JP 15732593 A JP15732593 A JP 15732593A JP 15732593 A JP15732593 A JP 15732593A JP H0683035 A JPH0683035 A JP H0683035A
Authority
JP
Japan
Prior art keywords
circuit board
flexible circuit
patterns
mask
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15732593A
Other languages
Japanese (ja)
Other versions
JP2742863B2 (en
Inventor
Kazuhiko Yamakawa
一彦 山川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP15732593A priority Critical patent/JP2742863B2/en
Publication of JPH0683035A publication Critical patent/JPH0683035A/en
Application granted granted Critical
Publication of JP2742863B2 publication Critical patent/JP2742863B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

PURPOSE:To improve the shape accuracy of the normal patterns adjacent to dummy patterns to be finally annihilated by forming the dummy patterns in the gap parts of the normal patterns. CONSTITUTION:This mask for a flexible circuit board is formed with the normal patterns 2 corresponding to the wiring patterns of the flexible circuit board on a mask substrate 1 and is further formed with the dummy patterns 5 between the normal patterns and the normal patterns. The production of the flexible circuit board by using such mask is executed by etching copper to form the wiring patterns after exposing and developing. The dummy patterns function as buffer walls to an etching liquid and eventually weaken the vigor of the etching liquid poured like showers at this time. The dummy patterns 5 are dislodged and annihilated upon completion of the etching. Solder resist printing, plating, etc., are thereafter executed and the flexible circuit board is completed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、樹脂を基材とするフィ
ルム上にパターンを形成したフレキシブル回路基板用マ
スク構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flexible circuit board mask structure having a pattern formed on a resin-based film.

【0002】[0002]

【従来の技術】従来のフレキシブル回路基板用マスク
は、図2に示す様に、マスク基材1上にフレキシブル回
路基板の配線パターンに相当する本パターン2を形成し
た構造であった。このマスクを使って露光、現像後、銅
をエッチングし、銅パターンを配したフレキシブル回路
基板を供給していた。なお、回路基板が完成した際に支
持体が無く、銅パターンのみが形成される一層構造部分
マスク上相当部3、銅パターンと一層もしくは多層の支
持体で形成された多層構造部分マスク上相当部4を図2
に示しておく。
2. Description of the Related Art A conventional flexible circuit board mask has a structure in which a main pattern 2 corresponding to a wiring pattern of a flexible circuit board is formed on a mask substrate 1 as shown in FIG. After exposure and development using this mask, copper was etched to supply a flexible circuit board having a copper pattern. In addition, when the circuit board is completed, there is no support and only the copper pattern is formed on the one-layer structure partial mask corresponding part 3, and the multilayer structure partial mask upper part corresponding to the copper pattern and one or more multilayer support. Figure 4
It shows in.

【0003】[0003]

【発明が解決しようとする課題】しかし、前述の従来構
造では、エッチング時に本パターンと本パターンの間の
空隙部にエッチング液が集中し、他の部分に比べて、空
隙部に隣接するパターンのエッチング量が多くなり、パ
ターン形状精度の劣るフレキシブル回路基板を供給せざ
るをえないという課題を有する。そこで本発明はこのよ
うな課題を解決するもので、その目的とするところは、
パターンの形状精度の高いフレキシブル回路基板を供給
するところにある。
However, in the above-mentioned conventional structure, the etching solution is concentrated in the voids between the main patterns during etching, so that the pattern adjacent to the voids is more concentrated than the other portions. There is a problem that the amount of etching increases and a flexible circuit board having a poor pattern shape precision cannot be supplied. Therefore, the present invention solves such a problem, and the purpose thereof is to
This is to supply a flexible circuit board with a high pattern shape accuracy.

【0004】[0004]

【課題を解決するための手段】本発明のフレキシブル回
路基板用マスク構造は、樹脂を基材とするフィルム上に
パターンを形成したフレキシブル回路基板において、最
終的には消滅するダミーパターンを本パターンの空隙部
に形成する事により、ダミーパターンに隣接する本パタ
ーンの形状精度を向上させた事を特徴とする。
According to the mask structure for a flexible circuit board of the present invention, in a flexible circuit board in which a pattern is formed on a film having a resin as a base material, a dummy pattern that will eventually disappear is formed in the main pattern. It is characterized in that the shape accuracy of the main pattern adjacent to the dummy pattern is improved by forming it in the void portion.

【0005】[0005]

【実施例】本発明はフレキシブル回路基板において、マ
スク上の本パターンの空隙部に最終的には消滅するダミ
ーパターンを設け、そのマスクを使って、パターンを露
光工程で焼き付け、現像し、エッチング時にダミーパタ
ーンがエッチング液による銅の浸食の緩衝壁になる事に
より、ダミーパターンに隣接する銅の本パターンの形状
精度を向上させ、形状精度の高いフレキシブル回路基板
を供給することを可能にする、フレキシブル回路基板用
マスク構造。
EXAMPLE A flexible circuit board according to the present invention is provided with a dummy pattern that will eventually disappear in a void portion of a main pattern on a mask in a flexible circuit board, and the mask is used to print, develop, and etch the pattern in an exposure process. By making the dummy pattern a buffer wall against copper erosion by the etching solution, it is possible to improve the shape accuracy of the copper main pattern adjacent to the dummy pattern and to supply a flexible circuit board with high shape accuracy. Mask structure for circuit boards.

【0006】以下に本発明の実施例を図面にもとづいて
説明する。図1は本発明のフレキシブル回路基板用マス
クの平面図、図2は従来のフレキシブル回路基板用マス
クの平面図である。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of a mask for a flexible circuit board of the present invention, and FIG. 2 is a plan view of a conventional mask for a flexible circuit board.

【0007】本発明のフレキシブル回路基板用マスク
は、マスク基材1上にフレキシブル回路基板の配線パタ
ーンに相当する本パターン2を形成し、さらに、本パタ
ーンと本パターンの空隙部にダミーパターン5を形成し
た構造である。フレキシブル回路基板を製造する際には
本発明のマスクを使って露光し、現像後、銅をエッチン
グして、配線パターンを形成するのであるが、本発明の
マスクを使えば、エッチングの際にシャワー状に降り注
ぐエッチング液に対する緩衝壁として、ダミーパターン
5が機能し、ダミーパターン5に隣接する本パターン2
へ注ぐシャワー状のエッチング液の勢いを柔らげること
になる。これにより、ダミーパターン5に隣接する本パ
ターン2の過剰エッチングを緩和することができる。な
お本パターン2は、多層の支持体で形成された多層構造
部分に、つながっている為、脱落しないが、ダミーパタ
ーン5は銅パターンのみが形成される一層構造部分内に
あり、多層の支持体で形成された多層構造部分と、切り
離されている為、エッチング完了後、脱落し、消滅す
る。この後、必要に応じ、ソルダーレジスト印刷、メッ
キを行い、形状精度の高いフレキシブル回路基板が完成
する。
In the mask for a flexible circuit board of the present invention, a main pattern 2 corresponding to the wiring pattern of the flexible circuit board is formed on a mask base material 1, and a dummy pattern 5 is further provided in the space between the main pattern and the main pattern. It is the formed structure. When manufacturing a flexible circuit board, the mask of the present invention is used for exposure, and after development, copper is etched to form a wiring pattern. With the mask of the present invention, a shower is used for etching. The dummy pattern 5 functions as a buffer wall for the etching solution that drops like a pattern, and the main pattern 2 adjacent to the dummy pattern 5
This will soften the momentum of the shower-like etching solution. As a result, excessive etching of the main pattern 2 adjacent to the dummy pattern 5 can be mitigated. Since this pattern 2 is connected to the multi-layered structure portion formed of the multi-layered support, it does not fall off, but the dummy pattern 5 is in the single-layered structure portion in which only the copper pattern is formed. Since it is separated from the multi-layered structure portion formed in, it will fall off and disappear after the etching is completed. Then, if necessary, solder resist printing and plating are performed to complete a flexible circuit board with high shape accuracy.

【0008】[0008]

【発明の効果】以上述べたように発明によれば、マスク
上の本パターンの空隙部に、最終的には消滅するダミー
パターンを設け、そのマスクを使って、パターンを露光
工程で焼き付け、現像し、エッチング時に、ダミーパタ
ーンがエッチング液による銅の浸食の緩衝壁になる事に
より、従来のダミーパターンを設けていないマスクを使
った方式に比べて、ダミーパターンに隣接する銅の本パ
ターンの形状精度を向上させ、形状精度の高いフレキシ
ブル回路基板を供給することを可能にするという効果を
有する。
As described above, according to the invention, a dummy pattern that will eventually disappear is provided in the void portion of the main pattern on the mask, and the pattern is printed and exposed in the exposure process using the mask. However, the shape of the copper main pattern adjacent to the dummy pattern is different from the conventional method using a mask without a dummy pattern because the dummy pattern serves as a buffer wall for copper erosion by the etching solution during etching. This has the effect of improving the accuracy and making it possible to supply a flexible circuit board having a high shape accuracy.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明のフレキシブル回路基板用マスクの平
面図。
FIG. 1 is a plan view of a mask for a flexible circuit board according to the present invention.

【図2】 従来のフレキシブル回路基板用マスクの平面
図。
FIG. 2 is a plan view of a conventional flexible circuit board mask.

【符号の説明】[Explanation of symbols]

1‥‥マスク基材 2‥‥本パターン 3‥‥一層構造部分マスク上相当部 4‥‥多層構造部分マスク上相当部 5‥‥ダミーパターン 1 mask base material 2 this pattern 3 layer structure part corresponding to the mask 4 layer structure part corresponding to the mask 5 dummy pattern

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 樹脂を基材とするフィルム上にパターン
を形成したフレキシブル回路基板において、最終的には
消滅するダミーパターンを本パターンの空隙部に形成す
る事により、本パターンの形状精度を向上させた事を特
徴とするフレキシブル回路基板用マスク構造。
1. In a flexible circuit board in which a pattern is formed on a resin-based film, a dummy pattern that will eventually disappear is formed in a void portion of the main pattern to improve the shape accuracy of the main pattern. A mask structure for flexible circuit boards, which is characterized by
JP15732593A 1993-06-28 1993-06-28 Flexible circuit board manufacturing method and mask Expired - Fee Related JP2742863B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15732593A JP2742863B2 (en) 1993-06-28 1993-06-28 Flexible circuit board manufacturing method and mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15732593A JP2742863B2 (en) 1993-06-28 1993-06-28 Flexible circuit board manufacturing method and mask

Publications (2)

Publication Number Publication Date
JPH0683035A true JPH0683035A (en) 1994-03-25
JP2742863B2 JP2742863B2 (en) 1998-04-22

Family

ID=15647234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15732593A Expired - Fee Related JP2742863B2 (en) 1993-06-28 1993-06-28 Flexible circuit board manufacturing method and mask

Country Status (1)

Country Link
JP (1) JP2742863B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007048963A (en) * 2005-08-10 2007-02-22 Sharp Corp Printed wiring board manufacturing method, printed wiring board photomask, and photomask creation program

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5878150A (en) * 1981-11-02 1983-05-11 Nec Corp Glass mask
JPS62299852A (en) * 1986-06-19 1987-12-26 Toshiba Corp Exposure mask
JPS6459832A (en) * 1987-08-31 1989-03-07 Toshiba Corp Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5878150A (en) * 1981-11-02 1983-05-11 Nec Corp Glass mask
JPS62299852A (en) * 1986-06-19 1987-12-26 Toshiba Corp Exposure mask
JPS6459832A (en) * 1987-08-31 1989-03-07 Toshiba Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007048963A (en) * 2005-08-10 2007-02-22 Sharp Corp Printed wiring board manufacturing method, printed wiring board photomask, and photomask creation program

Also Published As

Publication number Publication date
JP2742863B2 (en) 1998-04-22

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