JPH0683044B2 - Semiconductor switch drive circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor switch driving circuit that consumes less power, and particularly to a semiconductor switch driving circuit that exclusively drives only one switch from a group of two or more switches. Regarding the circuit.

[Conventional technology]

Conventionally, in this type of switch drive circuit, a switch is turned on by a logic input voltage of low level (active low),
In addition, in order to reduce the power consumption of the switch drive circuit when the switch is off, it is common to combine a plurality of circuits shown in Japanese Patent Publication No. Sho 61-90517 to form a structure as shown in FIG. It was Here, 6 is a PNPN thyristor as a first switch, 35 is a PNPN thyristor as a second switch, 34 and 5, and 32, 33 and 34 are an anode terminal, a cathode terminal and a gate terminal of these switches, respectively. Further, 1 is a terminal for connecting a positive voltage source, and 2, 31 are switch control signal input terminals. The switch control signals supplied to these input terminals 2 and 31 are mutually exclusive, and the input terminals 2 and 31 are simultaneously at a low level (usually 0 V).
Shall never be.

[Problems to be Solved by the Invention]

However, the circuit of FIG. 3 has a redundant configuration with respect to the following points.

(1) Two differential pair transistors are required (transistors 21, 22 and 37, 38).

(2) There is a circuit for creating the reference voltage for each input (diodes 24, 25 and 47, 48, resistors 26 and 46).

(3) The diodes that create the gate current are 9, 10 and
44 and 45 are required, two for each input.

(4) Resistors that prevent the effect of unnecessarily increasing impedance in the low current region of the diodes 9, 10 and 44, 45, 8,
43 is required for each input.

These points lead to an increase in chip size when a circuit is realized by an LSI, and an increase in the number of parts when realized as an individual component, and all of them have the drawback of increasing the cost.

[Means for Solving the Problems]

A drive circuit according to the present invention includes a plurality of semiconductor switches that perform exclusive operation, a plurality of drive transistors that supply a current for driving the semiconductor switches, and a common pair of the drive transistor and the emitter to form a differential pair. One reference voltage detection transistor to configure, one reference voltage circuit for giving a reference voltage to the base terminal of this transistor, and the power supply to the emitter of this differential pair transistor via a resistor for supplying a current to the emitter. One transistor connected to the terminal, one resistor connected between the base terminal of this transistor and the power supply terminal, one set of series connected diode group, and further this base terminal and the base terminal of the driving transistor. Having a plurality of resistors connected between.

That is, the feature of the present invention is that the second and third transistors are connected in a differential manner to the first transistor receiving the reference voltage at the base, and the bases of the second and third transistors are connected to the first transistor. And a second control input terminal respectively and these collectors are connected to the first
And a second drive output terminal, respectively, and further, a current source that operates in response to an active input level supplied to at least one of the first and second control input terminals is provided with an emitter of each of the first to third transistors. It is connected to a common connection point.

Thus, the semiconductor switch driving circuit according to the present invention includes (1) reduction in the number of differential pair transistors, (2) sharing of a reference voltage circuit, (3) reduction of gate current generating diodes, and (4) diode impedance control. It has the effect of reducing the resistance for use.

〔Example〕

Next, the present invention will be described in detail with reference to the drawings.
FIG. 1 shows a first embodiment of the present invention.

Here, the resistor 26 and the diodes 24 and 25 are a reference voltage circuit and supply the reference voltage to the base 22 for detecting the reference voltage. The collectors of the other transistors 21 and 37 are connected to the respective gate terminals 5 and 34 of the PNPN switches 6 and 35 through the backflow prevention diodes 13 and 39. The emitters of the transistors 21 and 22, 37 and 22 which form a differential pair are connected to the collector of the transistor 12, and the base of the transistor 12 is connected to the series diodes 9 and 10 and the resistor 8.
The base of the transistor 12 is connected to the bases of the driving transistors 21 and 37 via resistors 27 and 42.

Now, apply a constant voltage (usually 5V) to terminal 1, control input terminal 2,
Consider the operation when a high level (usually 5V) is applied to 31. At this time, since the transistors 37, 21, 12 are all off, no current flows and neither PNPN switch 6, 35 is driven. Further, the power consumption at this time is determined only by the reference voltage generation circuit (resistor 26, diodes 24, 25) and can be suppressed to a small level.

Next, consider the operation when the control input terminal 2 becomes low level (normally 0 V). At this time, the diode 9 through the resistor 27,
A current flows through 10 and a terminal voltage (2V _D ) is generated. Therefore, a collector current of (2V _D −V _8E ) / R ₁₁ · α ₁₂ flows through the transistor 12. Where V _D is the diode 9,11
, V _BE is the base-emitter voltage of the transistor 12, R ₁₁ is the resistance value of the resistor 11, and α ₁₂ is the base ground current amplification factor of the transistor 12. This current is further applied through transistor 21 to the gate of PNPN switch 6 to drive it. At this time, the transistor 37 is off
The PNPN switch 35 is not driven. The operation when a low level is applied to the control input terminal 31 is similar except that the transistors to be energized are different. These operations realize all of the fail-safe function, small power consumption, and large noise margin with a smaller number of elements than the conventional configuration of FIG. 3, unless the control input terminals 2 and 31 are simultaneously set to the low level.

FIG. 2 shows a second embodiment of the present invention. The present embodiment is an example in which the control input current is suppressed to a small value by adding the thickening transistors 28 and 29 to the control input terminal.

Although two PNPN switches are shown in the above embodiments,
PNPN switch can be easily realized by increasing the number of switches to three or more.

〔The invention's effect〕

As described above, according to the present invention, in a semiconductor switch drive circuit that drives a plurality of semiconductor switches that perform exclusive operation, a plurality of drive transistors that supply a drive current, and the plurality of drive transistors and emitters are commonly connected. One reference voltage detection transistor that constitutes a differential pair, one reference voltage circuit that applies a reference voltage to the base terminal of this transistor, and the collector is connected to the emitter connection point of the transistor that constitutes this differential pair. Then, one transistor whose emitter is connected to the power supply terminal via a resistor, one resistor connected between the base terminal of this transistor and the power supply terminal, one series diode group, and this base terminal and each A semiconductor switch of low power consumption with a small number of elements, which consists of multiple resistors connected between the base terminal of the driving transistor. There is an effect that a switch driving circuit can be realized.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a circuit diagram showing a second embodiment of the present invention, and FIG. 3 is an example of a conventional technique. It is a circuit diagram shown. 1 ... power supply terminal, 2,31 ... switch control signal input terminal,
6,35 …… PNPN switch, 26,24,25 …… first reference voltage circuit, 46,47,48 …… second reference voltage circuit, 9,10 …… first series diode group, 44, 45 …… Second series diode group, 21,22,37,38 …… Differential pair transistor.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Tadakatsu Kimura 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Yasunori Inabe 1-16-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (56) Reference JP-A-1-264414 (JP, A) JP-A-61-90517 (JP, A) JP-A-57-157638 (JP, A)

Claims (1)

[Claims] 1. A first transistor having a base for receiving a reference voltage, second and third transistors respectively connected to the transistor in a differential type, and bases of the second and third transistors. First and second control input terminals connected to each other; first and second drive output terminals respectively connected to collectors of the second and third transistors; and first to third transistors of the first to third transistors. The first is coupled to a common emitter connection point
And a current source that operates in response to an active control level supplied to at least one of the second control input terminals.