JPH0689092A - Musical tone synthesizer - Google Patents

Abstract

PURPOSE:To provide the musical tone synthesizer which can impart natural changes to musical tones by executing natural pitch modulation over the entire compass. CONSTITUTION:An address width signal DL is modulated by the output sinusoidal wave of an LFO 9 subjected to amplitude control by a signal DEPTH by an analog multiplier, is added to the signal modulated by an adder 7 and is converted to an address indicating an integer part I and an address indicating a decimal part f by an address converter. An initial waveform EXW is written into a RAM 12 for delay, is delayed in accordance with the integer part 11 and is read out of the RAM 12 for delay. The signal outputted by the RAM 12 for delay is delayed in accordance with the decimal part f by an interpolator 13, is subjected to timber processing by the filter of a signal processing section 4, is fed back to the RAM 12 for delay and is outputted to the outside. The initial waveform EXW and the feedback signal are added by an adder 14 and the result of the addition is inputted to the RAM 12 for delay, by which delay processing is executed and a vibrator effect is obtd.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a musical sound synthesizer,
Especially, the pitch is continuously changed by vibrato etc.,
The present invention relates to a musical sound synthesizer that gives natural changes to musical sounds.

[0002]

2. Description of the Related Art Conventionally, in an electronic musical instrument, a signal from a sine wave generator or a signal for pitch modulation such as pitch bend and pitch EG is used as a modulation signal for a sound source in order to apply vibrato to a musical sound. Of the pitch signal is modulated by the modulation signal. These modulation signals are generally digital signals, and are generated as signals of the maximum bit length processed by the system when the signals are generated, and when input as modulation signals, a desired musical tone to be generated is generated. The degree of modulation (pitch modulation depth) is statically selected by being multiplied by a predetermined value corresponding to 1 or less. This control is called so-called pitch modulation depth control.

On the other hand, what is called a delayed feedback type sound source has been developed as a new musical tone synthesizer. This delayed feedback type sound source circulates an input initial waveform in a feedback loop including a delay means having a delay time corresponding to a pitch period to form a musical tone signal having a pitch. The delay device for performing the operation includes a memory and an addressing circuit.

Further, the modulation signal for pitch modulation is input to the addressing circuit of the delay device as a delay time modulation input, and in this sound source, the modulation signal is the difference between the write address and the read address, that is, the address width. The modulated signal is converted into an address of the memory by an address converter, the read address of the delay device is designated by the converted address, and the written signal is read.

Also in this sound source, the pitch modulation depth is controlled by multiplying the modulation signal by a predetermined value of 1 or less to control the modulation degree.

[0006]

However, in the above-mentioned conventional delay feedback type tone synthesizer, when the pitch modulation depth is set to a value suitable for the high tone range, the address width becomes too small in the low tone range and almost no modulation occurs. On the other hand, if the pitch modulation depth is set to a value that matches the low frequency range, the address width becomes too large in the high frequency range, and the read address overtakes the write address, resulting in no sound. There was a problem of not becoming. Hereinafter, this problem will be described in detail.

In the case of the delay feedback type tone synthesizer, the delay time in the feedback configuration corresponds to the pitch period of the tone. For example, A1 (55Hz) as a representative of bass
Then, a delay time of 0.01818 seconds is required, and if the sampling frequency of the system is 48 kHz, the number of delay stages is 872.27. Assuming that the optimum pitch range of the vibration for vibrato is about half of a semitone, the necessary width of the shaking stage is as follows. The pitch of A # is 58.27 Hz, and the number of delay stages required at that time is 823.
74 steps, 872.27-823.74≈48.5 steps,
Therefore, the width of the number of half-tones is about 24 (8 to be exact).
^{72.27-48000 / (55 * 24 √2)} = 24.3
9 ... dan). Therefore, in order to apply the optimum vibrato, a low frequency sine wave with an amplitude of 24 is generated and the number of delay stages is set to 87.
Around the 2.27th step, a smooth transition is periodically made between the 851.27th step and the 804.27th step. In addition,
The realization of the delay time for the small number of stages will be described later.

Next, as a representative of high-pitched sound, A6 (1760)
Hz), it is necessary to have 27.27 ... delay stages in the same way, but if you apply vibrato to this with the same 24-step width as in the case of A1, it will shake in the range from 51.27 to 3.27. That is, in terms of pitch frequency, 936 Hz to 1
The swing is up to 4679 Hz (almost audible limit), and it is hard to say that it is musical. Moreover, in the case of C7,
Since the number of stages is 22.9, the number of delay stages becomes negative due to the swing width of the vibrato, the logic is broken in the circuit configuration, and no musical sound is generated. The optimum vibrato width for A6 is 0.776 when calculated in the same manner.

On the contrary, it can be easily understood that even if the wobbling width of 0.776 steps is applied to A1, the vibrato will not be noticed at all.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a musical tone synthesizing device capable of giving a natural change to a musical tone by performing natural pitch modulation over the entire musical range. .

[0011]

To achieve the above object, the present invention provides a memory for storing signals, and an address control means for controlling a difference between a write address and a read address of the memory based on pitch information. And a feedback means for feeding back the signal delayed by the delay means to the input of the delay means again, a change signal generating means for generating a change signal representing a change in pitch, and pitch information. Change width control means for controlling the change width of the change signal on the basis of the change width, and the delay means further controls the difference between the write address and the read address based on the change signal whose change width is controlled. Is characterized by.

[0012]

The change signal generated by the change signal generating means has its change width controlled by the change width control means on the basis of the pitch information, and is inputted to the delay means. In the delay means,
The difference between the write address and the read address of the memory is controlled on the basis of the change signal of which the change width is controlled, and the signal written in the memory is read with a time delay corresponding to the difference. The read signal is input to the delay means again by the feedback means and circulates. As a result, a tone signal having a pitch is formed, and a pitch change is given by the change signal.

[0013]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a first block diagram of a musical sound synthesizer according to the present invention.
FIG. 3 is a block diagram showing a schematic configuration of an embodiment, in which the musical tone synthesizer is applied to an electronic keyboard instrument. For the sake of simplicity, it will be described as a single note pronunciation.

In FIG. 1, reference numeral 1 is a performance operator such as a keyboard. When the performance operator 1 is pressed, a key code KC indicating which key is pressed (specified pitch), A key-on signal KON indicating a key-depression event and a control signal CONT representing various control information obtained by operating a joystick, a pedal, or the like provided along with the keyboard are output.

Further, the musical tone synthesizer has a tone color parameter supply unit 5, and the tone color parameter supply unit 5 operates an unillustrated switch or the like to output an output signal from a sine wave generator described later. Signal DEPTH for controlling the amplitude of the signal, signal FREQ for controlling the frequency of the output signal of the sine wave generator, and signal for changing the tone of the input signal by controlling the filter coefficient of the filter included in the signal processing unit 4 described later. And TC are output.

The key code K output from the performance operator 1.
C is the KC-DL conversion table 2 and the excitation signal generator 3
And the signal processing unit 4.

The KC-DL conversion table 2 receives the signal TC together with the key-on signal KON.
Based on one signal, an address width signal DL represented by a real number of "0" to "1" corresponding to a delay time of a tone signal described later is output.

The output side of the KC-DL conversion table 2 is connected to one input end of each of the multiplier 6 and the adder 7, and the multiplier 8 is connected to each of the other input ends of the multiplier 6 and the adder 7.
And the output side of the multiplier 6 is connected. In addition, one input end of the multiplier 8 is a sine wave generator that generates a sine wave of 0 to several tens Hz (hereinafter, referred to as “LFO (Low Frequency Oscillator)”.
ator) ”) 9 and the other input end is supplied with the signal DEPTH from the tone color parameter supply unit 5 and the sine wave signal output from the LFO is the signal DE.
It is multiplied by PTH and its amplitude is adjusted.

Therefore, the address width signal DL corresponding to the delay time read from the KC-DL conversion table 2
Is an LF whose amplitude is adjusted by the multiplier 6
It is modulated by the sine wave signal from O9, and the modulated signal is added by the adder 7 to the address width signal DL from the KC-DL conversion table 2.

The output side of the adder 7 is connected to the input side of the output limiter 10, and an address width signal DLmax corresponding to the maximum address width of the delay RAM described later is input to the output limiter 10. There is. Output limiter 10
When the output signal of the adder 7 does not exceed the signal DLmax, the output signal is output as it is, and when the output signal of the adder 7 exceeds the signal DLmax, the signal DLmax is used instead of the output signal. Is output.

The output side of the output limiter 10 is connected to the input side of the address conversion section 11.

The address conversion unit 11 includes an output limiter 10
Output signal DL 'is converted into 23-bit digital data D, and the upper 16 bits are output as the integer part I and the lower 7 bits are output as the decimal part f. That is, the digital data D is
It is expressed as D = I + f, the integer part I is used as the address width of the delay RAM described later, and the decimal part f is used as the weighting coefficient for interpolation of the interpolator described later.

Address conversion unit 1 for outputting the integer part I
The output terminal of 1 is connected to the delay RAM 1 via the address bus.
The output end of the address conversion unit 11 which is connected to 2 and outputs the fractional part f is connected to the interpolator 13.

The input side of the delay RAM 12 is connected to the output side of the adder 14. RAM 12 for delay
Is composed of a memory (RAM) and an addressing circuit, and writes an input signal (output of the adder 14) to an address by inputting one sampling clock, and inputs the next sampling clock to the integer part I of the integer part I for the address. The written data is read and output from the address separated by the address width. That is, the delay time is determined by the difference between the write address and the read address, that is, the address width and the sampling clock.
The AM 12 outputs the data signal delayed in this way.

The output side of the delay RAM 12 has an interpolator 13
And the output signal of the delay RAM 12 is connected to the interpolator 1
3, the signal processing unit 4 is delayed based on the decimal part f.
Is output to.

The interpolator 13 separates the delay corresponding to the fractional address from the delay RAM 12 because the delay time resolution is limited in the digital delay device (the delay RAM 12 in this embodiment). It is what you do.

The interpolator 13 has two adders 13 ₁ and 13 _2.
, And two multipliers 13 ₃ and 13 ₄ and a delay circuit 13 ₅ . The fractional part f output from the address conversion unit 11 is branched into two, one of which is an adder 13 ₁
Negative input is applied to one input terminal of the other terminal and the other is input to one input terminal of the multiplier 13 ₄ . At the other input terminal of the adder 13 ₁ , "
1 "is input and the output of the adder 13 _1,. Fraction, f, which is connected to one input terminal of the multiplier 13 _3, the adder 13 ₁ 1-f, and the multiplier 13 ₃ It is multiplied by the output signal of the delay RAM 12 input to the other input terminal.

The other input terminal of the multiplier 13 ₄ is connected to the delay circuit 1
3 ₅ is connected to the output side, and the output side is connected to one input end of the adder 13 ₂ . That is, the output signal of the delay RAM 12 is delayed by the delay circuit 13 ₅ , is multiplied by the fractional part f by the multiplier 13 ₄ , and is also multiplied by 1-f by the multiplier 13 _3, and the output of the delay RAM 12 is obtained. The signals are added by the adder 13 ₂ and output to the signal processing unit 4.

That is, the interpolator 13 weights the output signal of the delay RAM 12 with f and 1-f and outputs the weighted signal to the signal processing unit 4.

The output side of the signal processing unit 4 is connected to one input end of the adder 14, and the other input end of the adder 14 is connected to the output side of the excitation signal generating unit 3.

The signal processing unit 4 receives three signals, that is, a key code KC, a control signal CONT and a tone color signal TC, selects filter characteristics based on the three input signals, and supplies them from the interpolator 13. It is a filter that processes the timbre of the input signal and outputs it.

Further, the excitation signal generating section 3 has three signals,
That is, the key code KC, the key-on signal KON, and the tone color signal TC are input, and the initial waveform EXW of one to several cycles selected based on these three signals is output. The initial waveform EXW is added to the output signal from the signal processing unit 4 by the adder 14, and the added output signal is externally taken out as a musical tone signal and fed back to the delay RAM 12.

The operation of this embodiment will be described in detail below.

When a key on the keyboard is pressed and a key-on signal KON is output from the performance operator 1, an initial waveform EXW of one to several cycles selected and designated according to the key code KC and tone color signal TC is generated as an excitation signal. The initial waveform EXW output from the generator 3 is passed through the adder 14 to the delay RAM 12
The integer part I which has been input to the address converter and has undergone address conversion through the address conversion unit 11 based on the signal DL 'is delayed by a delay time corresponding to the address width.

Further, the delayed initial waveform EXW is
The signal is sent to the interpolator 13, delayed by the delay time corresponding to the fractional part f, and output to the signal processing unit 4. The initial waveform EXW output from the interpolator 13 is attenuated in the high frequency range by the signal processing unit 4, for example, reflection in the string (when the tone color is a string instrument).
Alternatively, the sound is attenuated in the high range corresponding to the reflection in the tube (when the tone color is a wind instrument) and is fed back to the adder 14. In this way, the initial waveform EXW is the delay RA
It circulates in the delay loop of the M12, the interpolator 13, and the signal processing unit 4, starts oscillation, and naturally attenuates sound while gradually causing high-frequency attenuation like a natural musical instrument. The pitch at this time is the reciprocal of the delay time of one cycle of the delay loop.

A sound source of such a type is called a delayed feedback type sound source or a physical model sound source. For example, Japanese Patent Laid-Open No. 63-40199 discloses an example of a physical model using a non-linear conversion table.

The key code K, which is a feature of the present invention, is described below.
A process of modulating and adding a vibrato component to the signal DL obtained based on C, and performing address conversion of the addition result will be described.

When the performance operator 1 outputs the key code KC, the KC-DL conversion table 2 displays the key code KC.
The signal DL in the range of "0" to "1" corresponding to the delay time according to C is output. That is, the pitch indicated by the key code KC is P Hz, and the sampling frequency is fs Hz.
When the phase delay time of the filter of the signal processing unit 4 is Df, the signal DL is set to satisfy the following equation.

Fs / (DL + Df) = P The signal DL is input to the address conversion unit 11 via the adder 7 and the output limiter 10 and is added to the vibrato signal in the mid-way adder 7 to give fluctuation of delay time. . This vibrato signal is obtained by multiplying the sine wave signal generated from the LFO 9 by the signal DEPTH and the signal DL. LFO9 is a system that allows as long as it is "-1" to "1".
Generates a sine wave with an amplitude of up to
DEP for adjusting the overall vibrato depth
The TH signal is multiplied by the multiplier 8 to adjust its amplitude to a required level. After that, the signal is multiplied by the signal DL in the multiplier 6, but the signal DL shows a smaller numerical value in the high range and a larger numerical value in the lower range. Therefore, even if the vibrato amount sufficient in the low range is set by the signal DEPTH, the high range does not occur in the high range. Since the vibrato signal also becomes smaller as the signal DL becomes smaller, an appropriate vibrato signal can be obtained even in the high frequency range.
On the contrary, even if an appropriate vibrato amount is set in the high tone range by the signal DEPTH, it becomes an appropriate value by being multiplied by the signal DL showing a large value corresponding to the low tone range. Note that L
In the FO 9, a frequency of 0 Hz to several tens Hz is selected by the input signal FREQ as the frequency of the generated sine wave.

In this way, the vibrato data is added to the signal DL corresponding to the delay time corresponding to the pitch, and the pitch-modulated signal DL is output to the output limiter 10.
It is compared with the DLmax. As described above, when the pitch-modulated signal DL is DLmax or less, the output limiter 10 outputs the signal DL as it is, and the signal DL is D
If it is larger than Lmax, DLmax is output (lower limit DLmi
Although n is not shown, it is “0”. ).

The output signal DL 'of the output limiter 10 is
Although it is a bit string (22 bits in this embodiment) representing a value of “0” to “1”, it is converted into a numerical value representing “0” to “32767” by the address conversion unit 11. In this case, it corresponds to changing the interpretation of the bit string rather than converting, and has a function of associating the address value when accessing the delay RAM 12 with the bit string of the signal DL '.
Specifically, in the signal DL ', the most significant bit of the 22 bits indicates "0.5", and hereinafter "0.25""0.125" ..., When all the bits are 1, "0.99997 ..." .apprxeq. Indicates "1". The address conversion unit interprets this bit string by using the upper 15 bits to represent an integer value (address value) from "0" to "32767" and sets it as an integer part I, and the lower 7 bits are smaller than "0". The value is interpreted as a numerical value and is set to the decimal part f. Then, the integer part I and the decimal part f are output to the delay RAM 12 and the interpolation part 13, respectively, and as described above, the initial waveform EXW is delayed for a predetermined time and then output.

As described above, since the signal DL is used to control the amplitude of the sine wave output from the LFO 9, the amplitude of this sine wave is proportional to the value of the signal DL and the pitch is high (the signal DL When the value is small), the amplitude of the sine wave is small, while when the pitch is low (the value of the signal DL is large),
The amplitude of the sine wave is increased and a natural vibrato can be realized.

Further, in this way, the amplitude of the sine wave and the signal DL
If the multiplication with is used, the ratio of the amplitude of the sine wave to the signal DL becomes the same regardless of the value of the signal DL (that is, at any pitch), and thus more uniform vibrato can be realized.

FIG. 2 is a block diagram showing a schematic configuration of the second embodiment of the pitch modulating section which constitutes the musical tone synthesizing apparatus according to the present invention.

In this embodiment, the ratio of the signal DL and the sine wave is not uniform, and the vibrato width (vibrato amplitude) is made smaller in the high frequency range or the vibrato width is made smaller in the low frequency range. is there.

In the first embodiment described above, the address width signal DL and the sine wave are directly multiplied by the multiplier 6, whereas in the present embodiment, the signal DL is further converted by the second conversion table described later. The only difference is that the signal DL ″ obtained by the conversion is multiplied by a sine wave, and therefore the elements corresponding to those in FIG. 1 are assigned the same reference numerals in FIG. 2 and description of their configuration is omitted.

Elements 2, 6-9 and 11 shown in FIG.
Corresponding to the KC-DL conversion table 2, the multiplier 6, the adder 7, the multiplier 8, the LFO 9, and the address conversion unit 11 in FIG.
Is provided. The input side of the second conversion table 21 is connected to the output side of the KC-DL conversion table 2, and the output side is connected to one input end of the multiplier 6.

FIG. 3 is a diagram showing the input / output characteristics of the second conversion table 21, in which the solid line shows the characteristics of the conversion table 21 and the broken line shows the conversion table 2 as in the first embodiment.
The characteristics when 1 is not used are shown.

According to the characteristics of FIG. 3, the signal DL obtained from the KC-DL conversion table 2 can have a smaller vibrato amplitude as the value of the signal DL is smaller (the pitch is higher). The characteristics of the second conversion table 21 are shown in FIG.
Can be set as shown in FIG.
The larger the value of (the lower the pitch), the smaller the amplitude of the vibrato.

In the present embodiment, the conversion table 21 is a one-dimensional conversion table, but it is not limited to this and may be a two-dimensional conversion table including the multiplication of the multiplier 6.

FIG. 5 is a block diagram showing the schematic construction of the third embodiment of the pitch modulator which constitutes the musical tone synthesizer according to the present invention.

This embodiment is applied not only to pitch modulation by vibrato but also pitch modulation including pitch EG, pitch bend and detune, and uses multiplication with the basic address width signal DL and table conversion. As a result, a natural change can be given to the musical sound.

In FIG. 5, the elements corresponding to those in FIG. 1 are designated by the same reference numerals, and the description of the configuration will be omitted.

In FIG. 5, KC-DL conversion table 2
The output side of is connected to one input terminal of the multiplier 22,
The signal DT indicating detune is input to the other input terminal of 2, and the output signal DL of the KC-DL conversion table 2 is
It is multiplied by the signal DT by the multiplier 22.

Here, the output value of the KC-DL conversion table 2 is set to be, for example, twice the output value of the KC-DL conversion table 2 of the first embodiment.
The reason is that the value of the signal DT is set to 0.5 as a reference value, and when the value is larger than 0.5, the pitch is low, and when it is smaller than 0.5, the pitch is high. Because. The value of the signal DT is read from a tone color memory (not shown) according to the detune amount.

The output signal of the multiplier 22 is branched into two, one is input to one input end of the adder 23, and the other is input to one input end of the multiplier 24. The other input end of the multiplier 24 is connected to the output side of the pitch EG 25, and the output side of the multiplier 24 is connected to the other input end of the adder 23. Therefore, the signal DL multiplied by the signal DT
Is added by the adder 23 with the signal DL multiplied by the output signal of the pitch EG 25 by the multiplier 24.

The output signal of the adder 23 is branched into two, one is connected to one input end of the adder 26 and the other is connected to one input end of the multiplier 27.

The other input terminal of the multiplier 27 is connected to the output side of the multiplier 28, and the multiplier 28 reads out from the tone color memory (not shown) the signal PB indicating the variation amount of the pitch bend operator. A signal WIDTH indicating bend sensitivity is input. The output side of the multiplier 27 is connected to the adder 26
Is connected to the other input end of.

The configuration after the adder 26 is the same as that of the first embodiment, and the detailed description thereof will be omitted.

The operation of the pitch modulator of the present embodiment having the above structure will be described.

Output signal DL of KC-DL conversion table 2
Is detuned by the multiplier 22 (constant pitch deviation)
Then, the adder 23 and the multiplier 24 multiply and add the pitch change component due to the pitch EG, the adder 26 and the multipliers 27 and 28 multiply and add the pitch change component due to the pitch bend, and further the adder 7 and the multiply Multipliers 6 and 8 multiply the pitch change component by vibrato.
Is added. The output signal DL in which all these pitch change modulation components are combined is subjected to address conversion by the address conversion unit 11 and supplied to the delay circuit (delay RAM 12 and interpolator 13) as in the first embodiment. ,
The initial waveform EXW is delayed, timbre-processed through the signal processing unit 4, fed back by the closed loop, and output to the outside. Although each adder is provided with upper and lower limiters as in the first embodiment, it is not shown.

In the present embodiment, both the multiplication and the addition are used for the modulation signal which changes between "-1" and "1", but for the modulation signal whose value is only a positive number. May perform only multiplication.

In this embodiment, the multiplication of the pitch fluctuation width such as the pitch EG and the pitch bend and the data representing the delay address width is used, so that a more natural pitch fluctuation can be obtained with a simple structure. Not limited to this method, any other method can be used as long as the pitch fluctuation range indicated by the modulation signal is changed according to the pitch.

Also in this embodiment, as in the second embodiment, a conversion table for adjusting the vibrato width according to each modulation element (changing element) and pitch may be used.

Further, if a plurality of conversion tables shown in the second embodiment are prepared and the outputs of the respective modulation elements are weighted and corrected, finer control is possible.

In each of the above embodiments, the LFO
Although the output signal of 9 has been described as a sine wave, the output signal is not limited to this and may be a triangular wave, a sawtooth wave, a rectangular wave, or the like.

Further, although the fixed point system is used in the calculation performed by the address conversion unit 11, the present invention is not limited to this, and the floating point system may be used.

Of the elements that perform pitch modulation, if the output value changes only in the positive range, addition may not be performed after multiplication, but pitch modulation may be performed only by multiplication.

[0070]

As described above, according to the present invention,
A delay means including a memory for storing a signal and an address control means for controlling a difference between a write address and a read address of the memory based on pitch information, and a signal delayed by the delay means Feedback means for feeding back to the input of the delay means, change signal generating means for generating a change signal representing a change in pitch, and change width control means for controlling a change width of the change signal based on pitch information. Since the delay means further controls the difference between the write address and the read address based on the change signal whose change width is controlled, natural pitch modulation can be performed over the entire range, resulting in a natural change in musical tone. Is provided, and it is possible to prevent obstruction of musical sound generation due to excessive pitch modulation.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a first embodiment of a musical sound synthesizing apparatus according to the present invention.

FIG. 2 is a block diagram showing a schematic configuration of a second embodiment of the pitch modulation section which constitutes the musical sound synthesis apparatus according to the present invention.

FIG. 3 is an input / output characteristic diagram showing the input / output characteristics of a conversion table forming the pitch modulation section of FIG.

FIG. 4 is an input / output characteristic diagram showing another example of input / output characteristics of a conversion table forming the pitch modulation section of FIG.

FIG. 5 is a block diagram showing a schematic configuration of a third embodiment of the pitch modulating section which constitutes the musical sound synthesizing apparatus according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Performance operator 2 KC-DL conversion table 3 Excitation signal generator 6 Multiplier 7 Adder 8 Multiplier (change width control means) 9 LFO (change signal generation means) 11 Address converter (address control means) 12 For delay RAM 14 adder (feedback means)

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[Procedure amendment]

[Submission date] October 22, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0018

[Correction method] Change

[Correction content]

The KC-DL conversion table 2 receives the signal TC together with the key-on signal KON.
Based on one signal, an address width signal DL represented by a real number of "0" to "1" corresponding to a delay time of a tone signal described later is output. The address width signal DL is 22 bits.
Occurs at a resolution of 0.
Interpretation to indicate a value of "1", but address described later
The conversion unit changes the bit interpretation into an address value.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0023

[Correction method] Change

[Correction content]

The address conversion unit 11 includes an output limiter 10
The output signals DL '2 2 bits into digital data D, and outputs the upper one 5-bit integer part I, the lower 7 bits as the fractional part f. That is, the digital data D is
It is expressed as D = I + f, the integer part I is used as the address width of the delay RAM described later, and the decimal part f is used as the weighting coefficient for interpolation of the interpolator described later.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0025

[Correction method] Change

[Correction content]

The input side of the delay RAM 12 is connected to the output side of the adder 14. RAM 12 for delay
A memory made (RAM) and the addressing circuit, 1 input by the input signal of the sampling clock written to addresses in the (output of the adder 14) Mutotomoni,
The written data is read and output from an address separated from the address by the address width of the integer part I. And at the next sampling clock, write
The response is shifted by one and the same processing is performed. That is, the difference between the write address and the read address and the shift
The delay time is determined by the operation, that is, the address width and the sampling clock, and the delay RAM 12 outputs the data signal thus delayed.

Claims (1)

[Claims] 1. A delay unit comprising a memory for storing a signal and an address control unit for controlling a difference between a write address and a read address of the memory based on pitch information, and a delay unit delayed by the delay unit. A feedback means for feeding back the signal to the input of the delay means again, a change signal generating means for generating a change signal representing a change in pitch, and a change width for controlling the change width of the change signal based on pitch information. A tone synthesizer comprising: a control means, wherein the delay means further controls a difference between the write address and the read address based on the change signal whose change width is controlled.