JPH0693620B2 - Analog switch circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog switch, and more particularly to a semiconductor analog switch suitable for multiple selection of high frequency analog signals.

[Background of the Invention]

Conventionally, the ON / OFF ratio of a high-frequency analog switch (the attenuation amount of the attenuated signal is defined as the attenuation passage amount, and the ratio of the attenuation passage amount when the switch is ON to the attenuation passage amount when the switch is OFF) is high. There is a series-parallel switch circuit system in which the switches are arranged in series-parallel with respect to, for example, application note AN73- of Siliconix (Siliconix)
3. High frequency switching by FET integrated circuit, 1976 1
February (Switching High-Frequency Sighals with FET In
integrated Sighals, Dec. 1976).

FIG. 2 shows a T-type serial / parallel switch in which electronic switches 21, 51, 81 are arranged in a T-shape between the input terminal 10 and the output terminal 90. In such a switch configuration example, input multiplexing is easy, and a high on / off ratio can be obtained as compared with a single switch. The attenuation passing amount when the signal of the series-parallel switch circuit is turned on / off is as follows since it becomes the voltage division ratio of the impedance.

In other words, the amount of attenuation passing during ON / OFF largely depends on the load resistance and the signal source impedance, and the ON / OFF is high only when the switch's on-impedance is sufficiently small and the off-impedance is sufficiently high. The ratio is obtained. This is because the attenuation amount when ON is usually small, so the attenuation passage amount when ON is large, and the attenuation amount when OFF is large, so the attenuation passage amount when OFF is small. However, in general, an electronic switch becomes large and its off-impedance decreases when the on-resistance is reduced. Therefore, it is practically difficult to make the on-off impedance negligible with respect to the load impedance, etc., and the high on-off ratio is high. I couldn't get it.
Here, the load impedance is an impedance connected to the load side of the switch, for example, R91 in the conventional circuit example.

As a conventional method of a high frequency analog switch, a so-called differential type analog switch in which a signal is applied to one input of a differential amplifier and a control signal is applied to the other input is also known. There is a problem that it is difficult to configure the multiple switches that switch.

[Object of the Invention]

An object of the present invention is to provide a high frequency switch circuit which can obtain a high on / off ratio and can reduce the influence of load impedance.

[Outline of Invention]

In view of the fact that the load impedance value in a series-parallel switch affects both the amount of attenuation when the switch is on and the amount of attenuation when the switch is off, a transistor having an impedance conversion function in the switch of the series-parallel switch is provided. By using, the impedance on the load side as seen from the switch side is made high when the signal is on and becomes low when the signal is off, thereby reducing the influence of the load impedance and improving the on / off ratio.

Example of Invention

An embodiment of the present invention will be described below with reference to FIG. First
In the figure, the signal input terminals are 10, 10 'and the output terminals are 90
And the load impedance is 91. The input terminal 10 is connected to the base of the transistor 15 of the emitter follower whose operating current is set by the constant current bias source 30. Specifically, the emitter of the diode-connected transistor 22 in which the collector and the base are commonly connected is connected. The base side of the transistor 22 is a parallel switch 50, specifically a transistor 51 having a control electrode 56.
Are further connected to the base of a transistor 81 which constitutes a transistor switch 80 of the output stage. The transistor switch 80 is composed of a plurality of transistors like the transistors 81, 82, ... The base of the other transistor 82 of the transistor switch is the transistor 51 of the parallel switch and the bias current source.
Another input terminal 1 through a diode-connected transistor 22 'with 40' and an emitter-follower transistor 15 '
Connected to 0 '. The potential value of each bias current source in FIG. 1 is within the range of 1 to 10 mA, but the constant current sources 40 and 40 'are smaller than the constant current sources 30 and 30' and are 1/2 or less. is there.

In FIG. 1, the respective signal sources are connected to terminals 10 and 10 ', and the switch on / off control signals are connected to terminals 56 and 5'.
Applied to 6 '. As an operation example, the case of selecting the signal of the input terminal 10 and deselecting other signals will be described. The ON / OFF selection control signal is OV at the terminal 56, and the terminal 56 '.
A + (plus) control signal is applied to. At this time, the transistor of the parallel switch 50 is turned off, so that the diode-connected transistor 22 of the series switch 20 has a constant current source.
Forward biased by 40 transfers the signal at switch input terminal 18 to the base of transistor 81. On the other hand, since the other input parallel transistor 51 'is in the ON state and its collector voltage is approximately OV, the series switch transistor 22' and the transistor 82 are in the OFF state.
Only the signal from the input terminal 10 is selectively output to.

An equivalent circuit of the selection signal path and the non-selection signal path in the above-mentioned state in the embodiment of FIG. 1 is shown in FIG.
It becomes like (b). That is, assuming that the on-impedance of each series-parallel transistor switch (and diode switch) is Zon and the off-impedance is Zoff, the switches 22 and 81 of the selection signal path have low Zon impedance, and the switches 51 and 82 have high Zoff impedance. , The load impedance 91 is equivalent to the impedance seen from the side of the series switch due to the impedance buffering action of the switch 81 (emitter follower).
On the other hand, the states of each of the series and parallel switches viewed from the non-selection signal path are all opposite to those of the selection signal path, as shown in FIG. 3 (b).

Therefore, the attenuation passing amounts seen from the terminal 18 of (a) and the terminal 18 'of (b) are as follows.

The impedance of zon, very low because in effect is an emitter resistor (= kT / qI _E). The emitter resistance is lower than the collector saturation resistance represented by Zon in the equations (1) and (2). In addition, Zoff is substantially an impedance due to the parasitic capacitance between the reverse-biased base emitters, which is extremely large. In the circuit of the present invention, the load impedance is apparently increased by hfe times due to the impedance conversion action of the transistor forming the switch, so that the on-impedance is reduced and the on-attenuation amount is also reduced. In addition, since the impedance can be increased by the reverse-biased semiconductor switch when off, the amount of attenuation when off can be increased. Insertion of the buffer transistor 15 in the first stage to the signal also improves the on-time attenuation due to the signal impedance. Further, the amount of attenuation at the time of OFF is substantially equivalent to the two-stage configuration of the series-parallel switch, and is extremely large. Therefore,
Comparing Eqs. (3) and (4) with Eqs. (1) and (2) above, the attenuation passage amount is significantly improved both at the on and off times, and a high on / off ratio is obtained.

Comparing equations (2) and (4), the relationship between the load impedances R ₀ and R ₉₁ and the on-impedance Zon is Zon << R ₀ , R ₉₁ . That is, in equation (4) Becomes almost 1. Therefore, by comparing Z _{ON of the} equation (4) and R ₉₁ of the equation (2), the attenuation passage amount of the equation (4) becomes smaller than the attenuation passage amount of the equation (2) from the above relationship. Also,
While (2) of the Z _ON is the collector resistance of the saturated transistor switches (several 100 [Omega), a (4) Z _ON emitter resistor of Formula (= kT / qI _E, several 10 [Omega), 1 order of magnitude smaller Therefore, the attenuation passing amount of the equation (4) becomes much smaller.

Next, comparing equations (1) and (3), Z _ON
From the comparison, the Z _ON of the expression (3) is smaller than the Z _{ON of the} expression (1) by one digit or more, so that the expression (3) becomes almost 1. On the contrary,
It is clear that even if Z _ON in equation (1) is regarded as almost 0, it does not become larger than in equation (3). Therefore, the attenuation passage amount of the equation (3) becomes larger than that of the equation (1).

From the above, since the amount of attenuation passage when the equation (3) is on is large and the amount of attenuation passage when the equation (4) is off is small, the amount of attenuation passage when the equation (1) is on and when the equation (2) is off. The ON / OFF ratio of the circuit of the present invention is larger or higher than the ON / OFF ratio of the circuit of FIG.

The high on / off ratio as well as the small amount of attenuation at the time of on means that there is less variation in the switching signal, and it is used in applications that transmit high-frequency signals with high precision, such as oscilloscope circuits and high-precision color displays. Is desirable. In particular, it is suitable for use as a multiplexer for switching a normal video input signal and a high frequency video signal such as a digital dynamic convergence signal in a high precision color display.

In the embodiment shown in FIG. 1, the switch 80, the transistors 15 and 15 ', etc., operate as an emitter follower during signal transmission, so that the frequency characteristic during signal transmission is extremely wide band. Further, the on / off control is simple because only the parallel switch 50 is controlled by the logical signal, and the on / off control can be performed at high speed.

FIG. 4 shows another embodiment of the present invention. In FIG. 4, the basic structure is the same as that in FIG. 3, but more detailed and specific means are shown from the viewpoint of increasing the bandwidth and the high on / off ratio. The configurations and effects of these new means will be described below.

First, when the input buffer transistor 15 of the switch is used, the bias constant current source 30 is separated from the constant power source 60 of the output stage switch 81 and the constant current reference bias.
By doing so, when the bias circuit of the current mirror is used in common, it is possible to prevent the turning on and off of the high frequency signal of the output through the floating impedance of the base circuit of the reference bias.

Secondly, the bias current source 40 of the series switch 22 is a bootstrap type constant current source composed of a resistor 43, a zener diode 44, an NPN transistor 41 and a resistor 42. Terminal
A constant current of (V _Z −2V _BE ) / R ₄₂ is supplied independently of the signal voltage of 18. Here, VZ is the voltage of the Zener diode 44 of FIG. 4, V _BE is the base-emitter voltage of the transistors 22 and 41 of FIG. 4, and R ₄₂ is the resistance value of the resistor 42 of FIG. This method has relatively good constant current characteristics, and the operation of the emitter follower of the NPN transistor 41 enables a high band.

Third, the parallel switch 50 is a non-saturated switch to reduce the equivalent impedance of the switch. That is, the diode 53 is connected in series to the base side of the parallel switch transistor 51, and the diode 52 is added to the anode side of the diode 53 and the collector of the transistor 51.
By doing this, the transistor 51 operates as a non-saturation negative feedback amplifier, and the impedance on the collector side is reduced by the negative feedback loop gain, which can be made significantly smaller than the on resistance (= collector saturation resistance) of a simple saturation transistor switch. After all, the amount of attenuation when the analog switch is off can be greatly improved.

Regarding the outline of the performance as a high frequency analog switch in the embodiment of FIG. 4, the following results were obtained when integrated using a _T 4 GHz NPN transistor.

Reduction rate when ON: -0.2 dB -3 dB band when ON: 500 MHz Attenuation amount when OFF: -45 dB (500 MHz), -55 dB (100 MHz) Figure 5 shows the functions of the buffer transistor 15 and series switch 20. A reference example in the case of combining into one transistor is shown. In FIG. 5, the serial switch 2 in FIG.
0, a bias constant current source 40, and a buffer amplifier 15 are integrated in the form of an emitter follower of a PNP transistor. That is, the NPN transistor 25 also serves as the buffer transistor 15 and the series switch 20 in FIG.
The current source of the resistor 26 doubles as the current sources 30 and 40. The embodiment shown in FIG. 5 has an advantage that a serial / parallel two-stage configuration can be easily constructed, but at present, the band is substantially limited by the PNP transistor.

The problem of the circuit of FIG. 5 can be avoided by using MOS transistors. FIG. 6 shows a circuit in which a PchMOS transistor switch is applied to the series-parallel switch at the first stage of the switch. A signal is applied to the gate of the MOS transistor 15 and a selection control signal is applied to the gate of the MOS transistor 51. That is, for the voltage of the input terminal 10, the control terminal
When the voltage is 13 and high, the MOS transistor 51 is turned off and M
The OS transistor 15 is turned on and transmits a signal as a source follower. In the opposite case, the MOS transistor 15 turns off and 51 turns on to ground the signal as a parallel switch.
This circuit is relatively simple, can realize a wideband series-parallel two-stage configuration, and has a good on / off ratio.

〔The invention's effect〕

According to the present invention, it is possible to reduce the ON resistance of an equivalent series-parallel switch and reduce the influence of the load impedance. Therefore, the amount of attenuation at the time of ON is small, the amount of attenuation at the time of OFF is large, and a high-frequency analog switch with a high ON-OFF ratio is provided. Is obtained. In addition, the operation is in a high band and the control is easy. Furthermore, since it operates at a low voltage, integration is easy.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of an analog switch of the present invention, FIG. 2 is a circuit diagram of a conventional analog switch, FIG. 3 is an equivalent circuit diagram of FIG. 1, and FIG. Circuit diagrams showing an embodiment, FIG. 5, and FIG. 6 are views for explaining a reference example. 15,15 ′, 22,22 ′, 81,82 …… Transistor, 30,30 ′, 40,
40 ', 60 ... constant current source, 91 ... load impedance.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Kenkichi Yamashita Kenichi Yamashita 5-2-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Omika factory (72) Inventor Ryushi Shimokawa 111 Nishiyote-cho, Takasaki-shi Gunma House number Hitachi Co., Ltd. Takasaki factory

Claims (4)

[Claims] 1. A first control switch which is on / off controlled by a first control signal, a first semiconductor switch which controls output of a first input signal, the first control switch and the first control switch. No. 1 semiconductor switch is provided, and when the first control switch is in the ON state, it is reverse-biased to have a high impedance and does not output the first input signal, and the first control switch is in the OFF state. At this time, the fifth semiconductor switch, which is forward biased to have a low impedance and outputs the first input signal, is on / off controlled by the second control signal which is complementary to the first control signal. A second control switch, a second semiconductor switch that controls the output of a second input signal, and a second control switch that is provided between the second control switch and the second semiconductor switch. Su When pitch is on, the result is reverse biased high impedance second
A sixth semiconductor switch which outputs no second input signal and outputs the second input signal when the second control switch is in an off state and is forward biased to have a low impedance. An output of the base, a collector connected to the power supply terminal, an emitter connected to the output terminal, and a third semiconductor switch which is in an ON state when the first control switch is in an OFF state, and a complementary semiconductor switch to the third semiconductor switch. A fourth semiconductor switch which is operated and whose output is connected to the base, the collector is connected to the power supply terminal, the emitter is connected to the output terminal, and which is turned on when the second control switch is off. An analog switch circuit having: 2. The first or second input signal according to claim 1, wherein the first or second input signal passes through the buffer amplifier of an emitter follower of the first or second semiconductor switch. An analog switch circuit characterized by being supplied to a semiconductor switch. 3. The analog switch circuit according to claim 2, wherein the bias current sources of the buffer amplifier are provided independently. 4. The buffer amplifier according to claim 2, wherein the base is a transistor connected to the input signal terminal and the emitter is connected to the emitter of the fifth or sixth semiconductor switch. Analog switch circuit.