JPH07106936A - Signal switching device - Google Patents

Abstract

(57) [Abstract] [Purpose] To prevent an increase in the number of connection pins, an increase in the outer shape of the outer package, an increase in the area of the mounting circuit board, and an increase in the number of circuit components for mounting. [Structure] The load resistor RL is switched to the power source Vcc by the switching circuit Sw.
When connected to, the current flows through the output terminal T4, and the transistors (Tr) Q3, Q7, Q forming the current mirror.
Current flows through 9, Q1 and Q2, the voltage follower composed of TrQ4 to Q7 operates and outputs the input signal S1 from the output terminal T4, and at the same time TrQ11 to TrQ20.
And the circuit of the resistor R2 is cut off. When the load resistor RL is connected to the ground by the switching circuit Sw,
A current flows through the current mirror composed of Q12, Q13, Q19, Q14 and Q15, and the voltage follower composed of TrQ16 to Q19 operates to output the input signal S2 from the output terminal T4, and at the same time TrQ1 to Q10 and the resistor. The circuit of vessel R1 is cut off.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal switching device which is used in a delay line switching circuit of a television receiver or the like and which selects and outputs one of two input signals depending on a connection state of a load resistor.

[0002]

2. Description of the Related Art In conventional electronic equipment, a signal switching circuit for selecting one of a plurality of signals is frequently used. FIG. 3 is a circuit diagram showing an example of a conventional signal switching circuit. In FIG. 3, in this signal switching device, the input signal S1 is input to the base of the transistor Q1 through the input terminal T1, and the input signal S1 is input to the base of the transistor Q4 through the input terminal T2.
2 is input. The collectors of the transistors Q1 and Q4 are connected to the terminal T3 to which the power supply Vcc is applied. The emitter of the transistor Q1 is the transistor Q
2 and the collector of the transistor Q5. The collector of the transistor Q2 is connected to the current source I1 whose other end is connected to the power source, the collector of the transistor Q3 and the base of the transistor Q7, and the base of the transistor Q2 is connected to the base of the transistor Q3 and the emitter of the transistor Q7. , This emitter is connected to the load resistor RL through the output terminal T4.

The emitter of the transistor Q3 is connected to the emitter of the transistor Q4 and the collector of the transistor Q6, and the base of the transistor Q6 is connected to the terminal T5 to which the signal switching signal Sw is input. The base of the transistor Q5 is connected to the potential VB which is a bias power supply. The other ends of the emitters of the transistors Q5 and Q6 are connected to a current source I2 connected to the ground through a terminal T6.

In the circuit of this configuration, the voltage (high: H, low :) of the signal switching signal Sw applied to the terminal T5.
L) switches the switches by the transistors Q5 and Q6, and one of the voltage follower constituted by the transistors Q1, Q2, Q7 and the current source I1 or the voltage follower constituted by the transistors Q3, Q4, Q7 and the current source I1 operates. To do. As a result, the input signal S
One of S1 and S2 is selected and sent to the load resistor RL through the output terminal T4.

[0005]

In the signal switching of the conventional example as described above, when this configuration is realized in a semiconductor integrated circuit and equipped in an electronic circuit, a connection for inputting a signal switching signal to this semiconductor integrated circuit. You need a pin. Therefore,
The increase in the number of connection pins increases the package size of the semiconductor integrated circuit, which increases the mounting area on a surface mount circuit board or the like. Further, the surface mount circuit board and the like also require a wiring pattern and electronic parts for supplying a signal switching signal, which has a disadvantage of increasing cost.

The present invention solves the above-mentioned drawbacks in the prior art. When the semiconductor integrated circuit is formed, the number of connecting pins increases, the outer shape of the outer package increases, the area of the mounting circuit board increases, and An object of the present invention is to provide a signal switching device capable of suppressing an increase in the number of circuit components to be mounted and suppressing an increase in cost.

[0007]

In order to achieve the above object, a signal switching device of the present invention comprises a first signal processing circuit for processing a first input signal and sending it from an output end, and a second signal processing circuit. A second signal processing circuit for processing an input signal and sending the output signal from an output end; and a load having one end connected to a common output end connecting the respective output ends of the first and second signal processing circuits,
A connection changing means for changing the connection of the other end of the load to a power supply or a ground, and when the connection changing means changes the connection of the other end of the load to a power supply or a ground, a current flows from the load to the common output end. , The first signal processing circuit operates to process and output the first input signal to the common output terminal, and the second signal processing circuit becomes inactive and the connection is made. When the changing means changes the connection of the other end of the load to the power supply or the ground, when the current flows out from the common output end to the load, the second signal processing circuit operates to cause the second output to the common output end. It is characterized in that the input signal is processed and output, and the first signal processing circuit becomes non-operational.

In this case, the first signal processing circuit is composed of a voltage follower using an npn type transistor, and the second signal processing circuit is composed of a voltage follower using a pnp type transistor. The reference current of the current source for operating the follower is generated based on the current flowing through the load connected to the common output terminal, and the load is connected to either the power supply or the ground and is input to each voltage follower. One of the two input signals is output from the common output terminal.

[0009]

With such a configuration, in the signal switching device of the present invention, the load is connected to the power supply or the ground, and when the current flows into the output terminal by this connection, the first circuit operates, and
The second circuit is inoperative. Further, the second circuit operates when the current flows out from the output terminal, and the first circuit is set to the non-operation. With this operation, the first and second
One of the input signals to the circuit is selected and output from the output terminal.

Therefore, when configured as a semiconductor integrated circuit, for example, a connection pin for inputting a signal switching signal becomes unnecessary and the number of connection pins increases, the outer shape of an outer package increases, the area of a mounting circuit board increases, and The increase in the number of circuit components to be mounted can be prevented respectively.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the signal switching device of the present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of an embodiment of a signal switching device of the present invention. In FIG. 1, in this signal switching device, an input terminal T1 to which an input signal S1 is supplied is connected to the base of a transistor Q4. The collector of the transistor Q4 is connected to the ground through the terminal T6. The emitter of the transistor Q4 is the emitter of the transistor Q5 and the transistor Q2.
Connected to the collector. The emitter of the transistor Q2 is connected to the terminal T3 to which the power source Vcc is applied, the base of the transistor Q2 is connected to the collector and emitter of the transistor Q1 and the collector of the transistor Q3, and the emitter of the transistor Q3 is grounded. It is connected.

The collector of the transistor Q5 is connected to the base of the transistor Q6 and the collector of the transistor Q7, and the emitter of the transistor Q7 is connected to the ground. The base of the transistor Q5 is the transistor Q6
Of the transistor Q18, the emitter of the transistor Q18, the base of the transistor Q17, and the output terminal T4. The collector of the transistor Q17 is the transistor Q
19 is connected to the base of the transistor Q18, and the emitter of the transistor Q19 and the collector of the transistor Q16 are connected to the terminal T3.

The emitter of the transistor Q17 is connected to the emitter of the transistor Q16 and the collector of the transistor Q15, and the emitter of the transistor Q15 is connected to the ground. The base of the transistor Q15 is connected to the base and collector of the transistor Q14 and the collector of the transistor Q13. Transistor Q1
The emitter of 4 is connected to ground, and transistor Q13
Is connected to the terminal T3.

The collector of the transistor Q18 is the collector and base of the transistor Q20 and the transistor Q1.
9 and the base of the transistor Q13, the base of the transistor Q12, and the collector of the transistor Q10. It is connected to the emitter terminal T3 of the transistor Q12, one end of the resistor R2 and the base of the transistor Q11 are connected to the collector of the transistor Q12, and the other end of the resistor R2 is grounded.

A resistor R is provided at the base of the transistor Q10.
One end of the transistor Q9 is connected to the collector of the transistor Q9, and the emitter of the transistor Q9 is connected to the ground.
The base of the transistor Q9 is connected to the collector of the transistor Q11, the base of the transistor Q8, the collector of the transistor Q6, the base of the transistor Q7, and the base of the transistor Q3. The base of the transistor Q16 is connected to the input terminal T2 to which the input signal S2 is supplied.

One end of the load resistor RL is connected to the output terminal T4, and the other end of the load resistor RL is connected to the switching circuit Sw.
Through the power source Vcc or ground.

Next, the operation of the configuration of this embodiment will be described. In FIG. 1, when the other end of the load resistor RL is connected to the power supply Vcc through the switching circuit Sw,
A current flows from the power supply Vcc to the output terminal T4 through the load resistor RL. This current flows through the transistor Q6 to the transistor Q8. In addition, transistors Q3, Q7, Q forming a current mirror with the transistor Q8.
A current also flows through 9.

Further, a current flows through the current mirror formed by the transistors Q1 and Q2 by the current flowing through the transistor Q3, and the voltage follower formed by the transistors Q4 to Q7 operates to input the input signal supplied to the input terminal T1. S1 is output from the output terminal T4.

On the other hand, due to the current flowing through the transistor Q9, a current flows through the resistor R1 and the base potential of the transistor Q10 decreases, so that the collector potential of the transistor Q10 increases and the transistors Q12, Q13, Q1.
9, Q20 is cut off. Then, the circuit composed of the transistors Q11 to Q20 and the resistor R2 is cut off, and its operation is stopped.

When the other end of the load resistor RL is connected to the ground through the switching circuit Sw, a current flows from the output terminal T4 to the load resistor RL. This current is output from the power supply Vcc through the transistors Q20 and Q18. It flows to the terminal T4. Also, the transistor Q20
And transistors Q12 and Q1 that form a current mirror
An electric current also flows through 3, Q19. And the transistor Q
The current flowing in 13 causes transistors Q14 and Q15
A current flows through the current mirror configured by and the voltage follower configured by the transistors Q16 to Q19 operates. As a result, the input signal S2 supplied to the input terminal T2 is output from the output terminal T4.

Further, the current flowing through the transistor Q12 causes a current to flow through the resistor R2, and the transistor Q1
Since the base potential of 1 increases, the collector potential of the transistor Q11 decreases. This potential drop causes the transistor Q
3, Q7, Q8 and Q9 are cut off. When the cutoff operation is stopped, the circuit constituted by the transistors Q1 to Q10 and the resistor R1 is cutoff and the operation is stopped.

In this way, one of the input signals S1 and S2 input to the input terminals T1 and T2 is connected to the load resistor RL by the power source Vcc or ground by the connection method.
It is selected and output from the output terminal T4.

Next, an application example using this signal switching device will be described. This application example is an example applied to switching of delay lines that match the luminance (Y) signal and the color (C) processing time, which are frequently used in television receivers. This type of television receiver individually uses discrete delay lines adapted to the delay times of different television systems (NTSC, PAL, etc.) depending on the destination. Since this discrete delay line is expensive, there is a demand to reduce the cost by making it a semiconductor integrated circuit. In this case, if the discrete delay line of the semiconductor integrated circuit is manufactured individually for each destination, the manufacturing efficiency is poor and the cost cannot be reduced. Therefore, as a result, discrete de-inline is used.

FIG. 2 is a block diagram showing a configuration of a delay line switching circuit for matching a luminance (Y) signal and a color (C) processing time, which are frequently used in a television receiver. In FIG. 2, the delay line switching circuit includes a delay circuit 10 that outputs a predetermined delay amount to an input signal, and a delay circuit 11 that adds the delay amount of the delay circuit 10 to obtain a predetermined delay amount. Have Further, it has a signal switching circuit 12 for selecting one of the delay signal from the delay circuit 10 and the delay signal from the delay circuit 11.

The signal switching circuit 12 in this structure has the structure shown in FIG. The delay signal from the delay circuit 10 corresponds to the input signal S1 supplied to the input terminal T1 in FIG. 1, and the delay signal from the delay circuit 11 is shown in FIG.
Corresponds to the input signal S2 supplied to the input terminal T2 at.

In this configuration, the load resistor RL is connected to the power source Vc.
When connected to c, the delay signal from the delay circuit 10 (the input signal S1 supplied to the input terminal T1) is output from the output terminal T4 as described with reference to FIG. When the load resistor RL is connected to the ground, the delay signal from the delay circuit 11 (the input signal S2 supplied to the input terminal T2) is output from the output terminal T4.

[0027]

As is clear from the above description, in the signal switching device of the present invention, the load is connected to the power source or the ground, and when the current flows into the output terminal by this connection, the first circuit operates, Moreover, the second circuit is inoperative. Also,
The second circuit operates when the current flows out from the output terminal, and the first circuit is set to the non-operation. By this operation, one of the input signals to the first and second circuits is selected and output from the output terminal, so that when configured as a semiconductor integrated circuit, a connection pin for inputting a signal switching signal becomes unnecessary. Increase the number of connecting pins, increase the outer shape of the exterior body,
It is possible to prevent an increase in the area of the mounted circuit board and an increase in the number of circuit components for mounting.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of a signal switching device of the present invention.

FIG. 2 is a block diagram showing a configuration in which the configuration shown in FIG. 1 is applied to switching of delay lines in a television receiver.

FIG. 3 is a circuit diagram showing an example of a conventional signal switching circuit.

[Explanation of symbols]

Q1 to Q20 ... Transistors R1 and R2 ... Resistors S1 and S2 ... Input signal Vcc ... Power supply RL ... Load resistor Sw ... Switching circuit

Claims (2)

[Claims] 1. A first signal processing circuit for processing a first input signal and sending it from an output end, a second signal processing circuit for processing a second input signal and sending it from an output end, A load having one end connected to a common output end to which the respective output ends of the first and second signal processing circuits are connected; and a connection changing means for changing the connection of the other end of the load to a power supply or ground, When a current flows from the load to the common output end when the connection changing means changes the connection of the other end of the load to the power supply or the ground, the first signal processing circuit operates and the first signal processing circuit operates to connect to the common output end. 1 input signal is processed and output, and when the second signal processing circuit is deactivated and the connection changing means changes the connection of the other end of the load to the power supply or ground, When current flows out from the common output end, the second output No. processing circuit operates and outputs the processed second input signal to the common output terminal, and the signal switching device, characterized in that said first signal processing circuit becomes inoperative. 2. The first signal processing circuit comprises a voltage follower using an npn-type transistor, and a second
The signal processing circuit of (1) is composed of a voltage follower using a pnp type transistor, and a reference current of a current source for operating each voltage follower is generated based on a current flowing through a load connected to a common output terminal. Connected to either power or ground,
2. The signal switching device according to claim 1, wherein one of two input signals input to each voltage follower is output from the common output end.