JPH0710984Y2 - Parallel dual receiver for track circuits - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION << Industrial Application Field >> The present invention relates to an improvement in a parallel duplex receiver.

<< Prior Art >> FIG. 3 shows a schematic configuration of a conventional parallel dual system receiver, and shows an example of receiving a train detection signal.

That is, the signal from the transmitter 1 is received by the first and second receivers a ₁ and a ₂ that are connected in parallel via the track circuit 2 and have the same function.

As the train a approaches the connection point A (blocking boundary) between the receivers a ₁ and a ₂ , the signal level at that point changes so as to gradually decrease as shown in FIG. 4 (a). When such a changing signal is detected by the thresholds of the same level set in both receivers a ₁ and a ₂ , it is actually the same as that detected by two different thresholds due to the sensitivity difference between both receivers. Act on.

For example, the first receiver a ₁ threshold at h _1, while the second receiver a ₂ threshold is detected at a lower h ₁ h _2. Therefore, as shown in FIG. 3B, the output states of the receivers a ₁ and a ₂ are output with a time difference T, and the track circuit relay TR is activated.

At this time, the output state of the two receivers a ₁ and a ₂ within the time difference T is the same as that at the time of the failure of the receiver, so it is necessary to distinguish it from the original failure. Therefore, in order to allow the time difference T caused by the sensitivity difference between the two receivers a ₁ and a ₂ , if both are within the time difference that occurs when the train is at a predetermined speed (5 km / h) or more, both receivers a ₁ , a timer circuit for determining that a ₂ is not failure has be added.

<< Problems to be Solved by the Invention >> However, in the above-mentioned conventional parallel dual system receiver, the time difference between the output times due to the difference in sensitivity is adjusted using a timer circuit. When the train a is passing through at extremely low speed (less than 5 km / h), the time difference T becomes over, and there is an inconvenience that it is judged as a failure although the receiving device is not a failure.

The present invention has been made in order to solve the above problems, and an object thereof is to provide a parallel dual system receiver capable of complementing an output time difference caused by a difference in sensitivity between two receivers.

<< Means for Solving the Problem >> A parallel dual system receiver for a track circuit according to the present invention is provided with a first and a second receiver (a1, a2) and a first and a second receiver in order to achieve the above object.
A parallel dual system receiver for a track circuit having two complementary circuits (b1, b2), wherein the first and second receivers (a1, a2) both have the same configuration and receive signals from the track circuit (2) respectively. One track circuit relay (TR) with the input signal and the output signal that processed each input signal
The first complementary circuit (b1) is connected between the output side of the second receiver (a2) and the input side of the first receiver (a1) to drive the second reception circuit. When the output of the receiver (a2) is lost, the input level of the signal to the first receiver (a1) is lowered, and the second complementary circuit (b2) is connected to the output side of the first receiver (a1) and the first receiver (a1). It is connected between the two receivers (a2) and the input side, and lowers the input level of the signal to the second receiver (a2) when the output of the first receiver (a1) disappears. It is characterized by that.

<< Operation >> In the parallel duplex system receiver having the above configuration, the two receivers are connected in parallel duplex and receive the same.
Also, in the two complementary circuits, when one receiver outputs,
It acts to follow the output of other receivers.

<< Embodiment >> An embodiment of the device of the present invention will be described below with reference to the drawings.
It should be noted that the same components as those of the related art will be described using the same reference numerals.

FIG. 1 shows an example in which the parallel dual receiver is used for train detection in the same manner as described above.

The first receiver a ₁ and the second receiver a ₂ have the same configurations as known receivers. That is, in order from the input side, the first
Amplifier circuits 10a and 10b, detector circuits 11a and 11b, filter circuits 12a and 12b, level determination circuits 13a and 13b, second amplifier circuits 14a and 14b, relay circuits 15a and 15b, rectifier circuit 16
a and 16b, and diodes 17a and 17b are connected.

In the figure, b ₁ and b ₂ are a first complementary circuit and a second complementary circuit, one end of which is the detection circuit 1 of one of the receivers a ₁ and a ₂ , respectively.
1a, 11b is connected to the output side of the resistors r ₁ and r ₂ provided on the output side, and the other ends are connected to the output sides of the rectifier circuits 16b and 16a of the other receivers a ₂ and a ₁ , respectively. There is. That is, the first and second complementary circuits b ₁ and b ₂ are configured to cross the _first and second receivers a ₁ and a ₂ .

The first, the second interpolation circuit b _1, b _2, are respectively the collector side connected to the output side of the resistor r _1, r _2, the transistors T _1, T ₂ the emitter side is grounded is provided, that The base side is provided with inverter circuits 18a and 18b whose input terminals are connected to the output sides of the rectifier circuits 16a and 16b.

The operation of this embodiment having the above configuration will be described. When the train a in FIG. 1 approaches the connection point A, which is the closing boundary, the signal level transmitted from the transmitter 1 via the track circuit 2 changes as shown in FIG. 2 (a). In this case, due to the sensitivity difference between the first receiver a ₁ and the second receiver a ₂ ,
Differences appear in the threshold values h ₁ and h ₂ that regulate the output state. In this embodiment, in the high signal level than the threshold h ₁ of the first receiver a _1, since the output state of the two receivers a _1, a ₂ is in the H level, the inverter circuits 18a, 18b each Complementary circuit b
Since no voltage is applied to the base side of the transistors T ₁ and T ₂ of ₁ and b _2, the signal current is not grounded via the transistors T ₁ and T ₂ . Therefore, TR keeps up.

However, when the signal level reaches a level equal to the threshold value h _{1 of} the first receiver a ₁ , it is higher than that of the receiver a ₂ , so that the output state of the first receiver a ₁ as shown in FIG. Changes to L level.

At this point in time, the signal level is still higher than the threshold value h ₂ , and the output state of the second receiver a ₂ is at the H level, so the relay TR is active. However, when the output state of the first receiver a ₁ becomes the L level, the inverter circuit 18 b of the second complementary circuit b outputs and turns on the transistor T ₂ , so that the reception level decreases by about the sensitivity difference, Since the level becomes lower than the threshold value h _{2 of} the second receiver and the output state of the second receiver also becomes L level, TR drops.

That is, when the complementary circuit is not provided, the operation is performed with a time difference T due to the difference in sensitivity between the two, as shown by the dotted line in FIG. The other action acts to follow.

In the figure, 20 and 21 are exclusive OR circuits and timers, which operate when either one of the receivers truly fails. That is, if the state where only _{one of} the receivers a ₁ and a ₂ is not activated continues for the time set by the timer or more, the parallel dual receiver is output as a failure.

When train a passes through the connection point of transmitter 1, it receives and outputs at the same time, and TR increases.

In the above-described embodiment, the first and second receivers a ₁ and a _{2 are connected} between the _first and second receivers.
Since the complementary circuits b ₁ and b ₂ are connected, both receivers a ₁ and
Even if a ₂ has a difference in sensitivity, it is possible to automatically match the reception level of the other receiver of the one receiver with the threshold value by changing the output state of the one receiver.

Therefore, the output states of both receivers a ₁ and a ₂ operate so as to follow the other one, and the time difference between the output states due to the difference in sensitivity can be eliminated.

Further, when there is a discrepancy in the output states due to the original failure, the exclusive OR circuit 20 and the timer 21 detect it.

In the above-mentioned embodiment, the parallel dual system receiver is of the ground type, but it may be of the vehicle type. The reception level in this case changes in a direction in which the train a gradually increases as the train 1 approaches the transmitter 1, but even if the two receivers having different sensitivities receive the same, both the complementary circuits have the same structure as described above.
The action of b ₁ and b ₂ causes one receiver to follow the other receiver.

Further, one ends of the complementary circuits b ₁ and b ₂ are connected to the output sides of the detection circuits 11a and 11b, but the input side or the output side of the first amplifier circuits 10a and 10b or the output side of the filter circuits 12a and 12b. May be connected to.

<< Effect of Device >> Since the parallel dual system receiver according to the present invention connects the two receivers in the form of a taxi with the two complementary circuits, even if there is a difference in sensitivity between the two receivers, A change in the output state of one receiver can cause the reception level to automatically change to a threshold value that regulates the output state of the other receiver.

Therefore, the output state of both receivers operates so as to follow the other one, and it is possible to eliminate the time difference between the output states due to the difference in sensitivity. Detection can be prevented in advance.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an embodiment of the device of the present invention, FIG. 2 is an operation explanatory diagram, FIGS. 3 and 4 are conventional devices, and FIG. 3 is a schematic configuration diagram thereof. 4 and FIG. 4 are operation explanatory views of the device. a ₁ ...... first receiver, a ₂ ...... second receiver, b ₁ ...... first complementary circuit, b ₂ ...... second complementary circuit.

Claims (1)

[Scope of utility model registration request] 1. A parallel dual system receiver for a track circuit, comprising: a first and a second receiver (a1, a2); and a first and a second complementary circuit (b1, b2). The machines (a1, a2) both have the same configuration and receive signals from the track circuit (2) respectively, and output signals obtained by processing the input signals respectively. One track circuit relay (TR)
The first complementary circuit (b1) is connected between the output side of the second receiver (a2) and the input side of the first receiver (a1) to drive the second reception circuit. When the output of the receiver (a2) is lost, the input level of the signal to the first receiver (a1) is lowered, and the second complementary circuit (b2) is connected to the output side of the first receiver (a1) and the first receiver (a1). It is connected between the two receivers (a2) and the input side, and lowers the input level of the signal to the second receiver (a2) when the output of the first receiver (a1) disappears. Parallel dual receiver for track circuits.