JPH07123730A - Trip operation control method for current supply type inverter - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide a trip operation control method for a current-supply-type inverter that causes a trip operation with a high response speed by controlling the switching operation of a switching element in an inverter circuit. To aim. [Configuration] High-frequency output voltage VINV or high-frequency output current IINV reference voltage value SVINV and reference current value SIINV
When the trip circuit 7 detects that the deviation is out of the range, and the * TRIP signal is input to the gate circuits GA to GD, the switching elements S1 to S of the inverter circuit 3 are
Of the four arms, arms A and D in the on state or arms B and C are left on and arms A and D in the off state.
Alternatively, the switching elements S1 to S4 of the arms B and C are turned on at the next on timing to form a closed circuit,
DC reactor LD bypassed by closed circuit
Freewheel diode FD
And discharge to the heating coil 5 to stop the output to the heating coil 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a trip operation control method for a current supply type inverter, and more particularly, it detects an abnormality in an AC output supplied to a load side connected to a current supply type inverter device. The present invention relates to a trip operation control method for a current supply type inverter that stops supply of output current to the load side.

[0002]

2. Description of the Related Art In a conventional constant current supply type inverter device, when some abnormality occurs on the load side, the power supply to the load is immediately cut off and the energy stored in the DC reactor is converted into an inverter. It must be released within.

Therefore, for example, in a conventional constant current supply type inverter 21 as shown in FIG. 19, a trip SCR (thyristor) is provided between a DC reactor LD and an inverter circuit 22 composed of switching elements S1 to S4. A circuit 23 is provided.

In the trip SCR circuit 23, when a load abnormality is detected, the DC power supply is stopped and the SCR is turned on to turn on the DC reactor LD, as shown in FIG. , The freewheel diode FD and the SCR form a closed circuit, and by supplying a current in this closed circuit, the power supply to the load side is stopped and the energy stored in the DC reactor LD is discharged through the freewheel diode FD. I am trying to let you.

Further, in FIG. 20, the trip S
To the CR circuit 23, a saturable reactor LS that smoothes the rising of the applied current is connected in order to avoid applying a steep current to the SCR when an abnormality occurs. When the load is normal, the peak value 700 between A and B in the figure.
If a high frequency sine half-wave voltage of about 800 V is applied, the minimum critical off-voltage rise rate (dv / d
Since t) is specified, there is a concern that the higher the frequency of the applied voltage, the higher the possibility of falsely firing the SCR.

For this reason, in the conventional constant current supply type inverter, as shown in FIG. 21, the capacitor voltage dividing snubber circuit 24 is connected to the SCR, and the capacity of the saturable reactor LS is increased. Therefore, a countermeasure is taken so that the high frequency sine half-wave voltage is not applied to the SCR.

The actual trip operation in the trip SCR circuit 23 is performed as follows, for example.

In the constant current supply type inverter 21, a trip circuit (not shown) (not shown) for detecting an abnormality in the AC output supplied to the load detects an abnormality in the output and outputs a trip signal to the control circuit (not shown). When input to (not shown), the SCR of the trip SCR circuit 23 shown in the figure is turned on to form a closed circuit that bypasses the output current IOUT. Current ISCR flows, the output current IOUT to the load is stopped as shown in FIG. 7B, and as shown in FIG. Id of the current flows through the freewheel diode FD to discharge the energy stored in the DC reactor LD (not shown).

Also, FIG. 3D shows the trip SC.
The state of the voltage waveform applied between A and B of the R circuit 23 is shown. This applied voltage has a peak value of 700 to 800.
An example of V and frequency 200 kHz (T = 5 μsec) is shown.

[0010]

However, in the trip SCR circuit 3 applied to the above-described conventional constant current supply type inverter device 21, a steep current or a high frequency sine half-wave voltage is applied to the SCR. To avoid that
Since the saturable reactor LS having a large capacity is connected, there are the following problems.

That is, the current ISCR flowing after the SCR is turned on by the trip signal is the saturable reactor L
Due to the action of S, as shown in FIG. 3C, it takes about 50 μsec until it reaches a predetermined value without rising rapidly. Therefore, as shown in FIG. 3D, if an applied voltage of frequency 200 kHz (T = 5 μsec) is applied to the trip SCR circuit 23, the trip is caused by the rising delay of the current ISCR flowing through this trip SCR. There is a problem that the peak voltage is applied to the load side about 10 times immediately after the state occurs until the current ISCR reaches a predetermined value.

Due to the response delay phenomenon of the trip SCR circuit 23, there is a high possibility that an excessive peak voltage is applied to the switching element inside the inverter to damage or damage the load.

[Object] It is an object of the present invention to provide a trip operation control method for a current supply type inverter that controls the switching operation of a switching element in an inverter circuit to perform a trip operation with a fast response speed. .

[0014]

The means of the present invention are as follows.

According to a first aspect of the present invention, an inverter circuit configured by connecting a plurality of switching elements in a bridge, an abnormality detection circuit for detecting an abnormality of an AC output supplied to the load side by the inverter circuit, While controlling the switching operation of each switching element in the inverter circuit to supply a constant AC current to the load side, when the abnormality of the AC output is detected by the abnormality detection circuit,
A control circuit that controls a switching element of an inverter circuit so as to stop the supply of the alternating current, and a current supply type inverter including: when an abnormality of the alternating current output is detected by the abnormality detection circuit, All the switching elements of the inverter circuit are turned on to form a closed circuit, and the closed circuit is caused to perform a trip operation of bypassing the alternating current and stopping the alternating current supplied to the load side.

Further, in this case, when the trip signal of the inverter circuit is input, the switching element in the ON state is kept in the ON state and the switching element in the OFF state is set at the next ON timing. It is effective to turn them on and control them so that they are all on at this timing.

[0017]

The operation of the means of the present invention is as follows.

According to the invention described in claim 1, an inverter circuit constituted by connecting a plurality of switching elements in a bridge, and an abnormality detection circuit for detecting an abnormality of an AC output supplied to the load side by the inverter circuit. , The switching operation of each switching element in the inverter circuit is controlled to supply a constant AC current to the load side, and when the abnormality detection circuit detects an abnormality in the AC output, the supply of the AC current is stopped. A control circuit for controlling the switching elements of the inverter circuit so that when an abnormality of the output output is detected by the abnormality detection circuit, all the switching elements of the inverter circuit are detected by the control circuit. Is turned on to form a closed circuit, and the AC current is bypassed by this closed circuit. Trip operation to stop the alternating current supplied to the load side is performed.

Further, in this case, when the trip signal of the inverter circuit is input, the switching element in the ON state is kept in the ON state and the switching element in the OFF state is set at the next ON timing. It is turned on, and at this timing, it is controlled so as to be in the all-on state.

Therefore, the trip operation with faster response performance can be realized only by controlling the switching operation of the switching element without connecting the trip SCR circuit or the like, and the cost and reliability of the current supply type inverter can be reduced. It is possible to improve the sex.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings.

1 to 18 are diagrams showing an embodiment of a current supply type inverter to which a trip operation control method for a current supply type inverter according to the present invention is applied. The current supply type inverter of this embodiment is used for an induction heating processing device and the like.

First, the structure will be described.

FIG. 1 is a circuit configuration diagram of a current supply type inverter.

In FIG. 1, a current supply type inverter 1 is a three-phase full-wave phase control rectifier circuit 2 which rectifies a three-phase AC voltage input from a three-phase AC power supply (not shown) and outputs a DC voltage. A freewheel diode FD that discharges accumulated energy during trip operation, DC reactors LD1 and LD2 that smoothes a pulsating current component included in a DC voltage output from the three-phase full-wave phase control rectifier circuit 2, and a power M
An inverter circuit 3 configured by bridge-connecting switching elements S1 to S4 by OS-FETs and a gate control signal for controlling the switching operation of each switching element S1 to S4 are applied to the gate electrodes of each switching element S1 to S4. A high-frequency transformer 4 which forms an LC vibration circuit together with the output gate circuits GA to GD and an output capacitor C and generates an alternating magnetic flux in the heating coil 5 by the high-frequency output voltage VINV output from the inverter circuit 3, and a DC reactor. A current detection circuit 6 for detecting a direct current IDC flowing through LD1 and LD2, a high frequency current detection transformer CT for detecting a high frequency output current IINV output from the inverter circuit 3, and a high frequency output current IINV to generate on the load side. High-frequency voltage detection transformer PT for detecting high-frequency output voltage VINV High frequency voltage detection transformer PT
The high frequency output voltage VINV and the high frequency output current IINV detected by the high frequency current detecting transformer CT and the high frequency current detecting transformer CT are within a range of a predetermined reference voltage value SVINV and a reference current value SIINV. ~ Trip circuit 7 for outputting to GD.

The switching elements S1 to S4 of the inverter circuit 3 are connected in parallel to the snubber circuits SN1 to S4.
N4 is connected to the snubber circuits SN1 to SN4.
Is composed of a capacitor, a resistor, and a diode, and prevents a sharp spike voltage from being applied to each of the switching elements S1 to S4.

In this embodiment, the circuit connecting the switching element S1 is arm A and the circuit connecting the switching element S2 is arm B for each bridge connection circuit to which the switching elements S1 to S4 of the inverter circuit 3 are connected. , An arm C connecting the switching element S3 and a circuit connecting the switching element S4.

In the inverter circuit 3, each switching operation is controlled by the gate circuits GA to GD by the combination of the arms A and D and the arms B and C.
~ GD is a predetermined high frequency (for example, 200kHz) to alternately perform the switching operation of the arm A, D and the arm B, C, to generate a constant high frequency output current IINV, load through the high frequency transformer 4. Is supplied to the heating coil 5.

Now, a more detailed circuit configuration of the gate circuit GA shown in FIG. 1 will be described with reference to FIG.

Although FIG. 2 shows only the circuit configuration of the gate circuit GA portion connected to the arm A in the inverter circuit 3, the gate circuits GD and GB connected to the other arms B and C are shown. , GC have the same circuit configuration, and their illustration is omitted.

In the gate circuit GA of FIG. 2, when the circuit configurations are classified according to functions, the control circuit section 11 and the gate amplifier circuit section 1 which are constituted by AND gates are arranged from the right side in the figure.
2, a gate circuit unit 13 including insulating transformers IT1 and IT2, FETs 1 and 2, and a DC power supply (not shown)
Becomes

In FIG. 2, the control circuit section 11 includes a line section 11a for transmitting an ADon signal for the arms A and D of the inverter circuit 3 input from a main control circuit (not shown) to the gate amplifier 12a, and a line section (not shown). Output of the AND gate 11b of the ADoff signal for the arms A and D input from the main control circuit of the above and the * TRIP signal (* indicates a negative logic signal) input from the trip circuit (not shown). product)
Is output to the gate amplifier 12b.

Further, in FIG. 2, the gate amplifier 12a and the gate amplifier 12b of the gate amplifier circuit section 12 are
The ADon signal and the ADoff signal input from the control circuit unit 11 are amplified by a predetermined amplification factor and output to the gate circuit unit 13.

Further, in FIG. 2, the gate circuit unit 13
Is an FET that isolates the ADon signal and the ADoff signal input from the gate amplifier 12a and the gate amplifier 12b from the main circuit through isolation transformers IT1 and IT2.
1. When the FET2 is turned on and the ADon signal is input, the switching element of the arms A and D, that is, FE
The gate electrode of TS1 is charged with + 12V by the DC power supply, and when the ADoff signal is input, the gate electrode of FETS2 is charged with -5V by the DC power supply.

FIG. 3 shows the trip circuit 7 of FIG.
2 is a circuit configuration diagram of FIG.

In FIG. 3, the trip circuit 7 compares the high frequency output voltage VINV detected by the high frequency voltage detecting transformer PT with a preset reference voltage value SVINV, and outputs the comparison results "Hi", " A high frequency output current I detected by a high frequency current detecting transformer CT and a comparator (COMP) 7a which outputs a Lo ”digital signal.
INV is compared with a preset reference current value SIINV, and the comparison result is output as a digital signal of "Hi" and "Lo", and a logical product of each output of the comparator 7a and the comparator 7b is obtained. The AND gate 7c outputs a TRIP signal.

In this embodiment, when the high frequency output voltage VINV and the high frequency output current IINV are abnormal, the comparators 7a and 7b output the "Lo" signal to the AND gate 7 and the AND gate 7 respectively.
The AND gate 7c outputs "Lo" when one of the comparators 7a and 7b outputs a "Lo" signal, or when both outputs are "Lo" signals.
The signal * TRIP signal is output.

Next, the operation of this embodiment will be described.

First, the operation of the current supply type inverter 1 of FIG. 1 in the normal state will be described.

In FIG. 1, the three-phase AC voltage input from the three-phase AC power supply (not shown) is the three-phase full-wave phase control rectifier circuit 2.
When rectified by and output as a DC voltage, the DC reactors LD1 and LD2 smooth the pulsating flow component included in the output DC voltage, and the smoothed component is supplied to the inverter circuit 3.

In the inverter circuit 3, the gate circuits GA ...
The switching operation of the switching elements S1 to S4 of the arms A to D is performed by the gate control signal input from the GD to the gate electrodes of the switching elements S1 to S4. B
The switching operation is controlled by each combination of the switching elements S2 and S3, and the constant high frequency output current IINV is supplied to the heating coil 5.

By this high frequency output current IINV, a high frequency alternating magnetic flux is generated in the heating coil 5, and an eddy current is generated on the surface of the member which is passed through the heating coil 5 in a non-contact manner.
The heat treatment of the member surface is performed.

Next, the operation of the current supply type inverter 1 at the time of abnormality will be described.

In the trip circuit 7 shown in FIG. 3, the high frequency output voltage VINV or the high frequency output current IIN
When the comparator 7a or the comparator 7b detects a deviation from the range of the reference voltage value SVINV of V and the reference current value SIINV, that is, when an abnormality of the high frequency output voltage VINV or the high frequency output current IINV is detected, the comparator One or both of 7a and the comparator 7b output the "Lo" signal to the AND gate 7c, and the AND gate 7c outputs the "Lo" signal * T.
The RIP signal is output to the gate circuits GA to GD to start the trip operation.

In response to the input of the * TRIP signal, in the gate circuits GA to GD of FIG. 2, the arms A, D or the switching elements S1 to S4 of all the arms A to D of the inverter circuit 3 which are in the ON state or The arms B and C are kept on, and the arms A and D in the off state or the switching elements S1 to S4 of the arms B and C are turned on at the next on timing, and the arms A and B and the arms C and D are turned on.
Form a closed circuit by combining
The IDC output from D1 is bypassed by the closed circuit, and the stored energy of the DC reactors LD1 and LD2 is discharged through the freewheel diode FD to stop the output of the high frequency output voltage VINV to the heating coil 5.

Next, the detailed operation of the inverter circuit 3 of the current supply type inverter 1 will be described with reference to the timing chart of the signals of the respective parts shown in FIG.

In FIG. 4, (a) of FIG. 4 is an operating frequency reference signal for determining the operating cycle of the ADon signal and the ADoff signal and the BCon signal and the BCoff signal input to the gate circuits GA to GD, and is not shown in the figure. It is generated by the main control circuit.

With this operating frequency reference signal, the ADon signal and the ADoff signal shown in FIGS. 9B and 9C are input to the gate circuits GA and GD.
(D) for the gate electrodes of the switching elements S1 and S4 (FET) of the arms A and D of the inverter circuit 3 from the gate circuits GA and GD at the on / off timing by the signal and the ADoff signal. , + 12V
And -5V are alternately supplied to control the switching operation.

Further, as shown in (e) and (f) of FIG.
To the arms B and C of the inverter circuit 3, the BCon signal and the BCoff signal, which are in opposite phases to the ADon signal and the ADoff signal input to the arms A and D, are input, and the ON / OFF by the BCon signal and the BCoff signal is input.
At the off timing, the gate circuits GB, GC to the arm B,
Voltages of + 12V and -5V are alternately supplied to the gate electrodes of the switching elements S2 and S3 (FET) of C, as shown in FIG.

Since the gate electrode of the FET is equivalent to the capacitor, it is +12 depending on the ADon signal, for example.
+12 even if the ADon signal disappears when V is applied
The V state is maintained, and the +12 V state is maintained until the next ADoff signal is input.

The above is the normal operation.

Next, in FIG. 4, when the timing shown by T1 in the figure, that is, when the arms A and D are in the non-operating state and the arms B and C are in the operating state, the trip circuit 7 outputs * T.
Assuming that the RIP signal is input to each of the gate circuits GA to GD, the operating states of the arms B and C are maintained, and after waiting for a predetermined time, the timing indicated by T2 in the figure, that is, the on-timing of the next arms A and D is determined. After waiting for the input of the ADon signal, the arms A and D are turned on, and all the arms A to
D is turned on.

Thus, all switching elements S1 to S
As shown in the simplified circuit diagram of FIG. 5, the trip current of 2 to 3 times the normal time flowing when the trip occurs is generated by turning on the switch No. 4 of the arm circuits A and C of the inverter circuit 3 and the arm circuits B and D. It is diverted to a route and is made to flow. For this reason,
Each arm A to D may bear a direct current of about 1.5 times the normal direct current value for about 50 msec.

However, if this burden time of 50 msec is considered by replacing it with a simple current supply type inverter as shown in FIG. 7, for example, the rated output of this current supply type inverter is 440 V, 300 A, and the power factor is almost the same. If it is 1, as shown in the equivalent circuit of FIG. 8, the output impedance Z in the normal state is about 1.5Ω, and as shown in FIG. 9, the DC reactor L from the stop timing in the normal state.
It takes about 10 to 30 msec for the current IDC due to the energy stored in D to discharge through the freewheel diode FD due to the transient phenomenon of the series circuit of the DC reactor LD (3 mH) and the output impedance Z.

When a trip condition occurs due to an abnormality on the load side, as shown in FIG. 10, the output impedance Z when all the switching elements S1 to S4 are turned on.
As in the equivalent circuit shown in FIG. 11, if it changes to 0.05Ω, as shown in FIG. 12, the current IDC due to the energy accumulated in the DC reactor LD from the TRIP timing at the time of abnormality passes through the freewheel diode FD. The discharge time takes about 50 to 200 msec due to the transient phenomenon of the series circuit of the DC reactor LD (3 mH) and the output impedance Z.

Therefore, the burden time of 50 msec is obtained based on the transient phenomenon at the time of abnormality shown in FIGS. It is needless to say that this burdened time takes different values if the output rating of the current supply type inverter is different.

Further, since the trip operation is performed by the switching operation, each arm A to D trips in half of the inverter operation cycle (2.5 μsec) when the inverter operation cycle is 200 kHz, as shown in FIG. The operation starts, and the conventional trip S
The response speed can be remarkably faster than the operation time when the CR circuit is provided.

Further, unlike the case where the trip SCR circuit is provided, there is no need to worry about the occurrence of false firing.

In the above embodiment, when the * TRIP signal is input, all switching elements S1 to S4 are not turned on at the same time. 13, which shows the reason for turning on after waiting for the on timing of
This will be described with reference to FIG.

Now, in FIG. 13A, the arm B,
Assuming that C is in the ON state and the output capacitor C is being charged, the voltage generated in the output capacitor C is
It is applied to the arms A and D in the off state. Since the applied voltage in this case is a forward voltage with respect to the arm A, no voltage is applied to the blocking diode BD1 of the arm A as shown in FIG. It Therefore, when the arms A and D are also turned on at the same timing, the voltage applied to the arms A and D until then is the blocking diode BD of the arms B and C.
2, try to move to BD3.

That is, the electric charge charged in the output capacitor C tries to rapidly discharge the accumulated electric charge in the path of the dotted line as shown in FIG. 7C, and the current flowing through the arms B and C suddenly changes to " I try to return to 0 ". Then, when the blocking diodes BD2 and BD3 of the arms B and C reversely recover, due to the rapid current change (di / dt) and line inductance, as shown in FIG. 14, a considerably large spike voltage V (V = L · di) / Dt) occurs,
When applied to the blocking diodes BD2, BD3, in the worst case, the blocking diodes BD2, BD3
May be damaged.

For the above reason, in the present embodiment, the switching timings of the arms A and D and the arms B and C are shifted to prevent the above-mentioned damage to the element.

FIGS. 15 and 16 show examples of concrete waveforms of voltage VDH and current detection and voltage detection when a trip occurs due to a short circuit of the output capacitor C during energization.
7 and FIG. 18 show examples of concrete waveforms of voltage VDH, current detection, and voltage detection when a trip occurs due to opening of the heating coil 5 during energization.

Therefore, in the current supply type inverter 1 of this embodiment, the trip circuit 7 causes the high frequency output voltage VIN
V or high frequency output current IINV is detected abnormal *
When the TRIP signal is input to the gate circuits GA to GD,
* When the TRIP signal is input, the switching element in the on state is left as it is, and the switching element in the off state is turned on after waiting for the next on timing to form a closed circuit that bypasses the trip current. The trip operation can be performed with the response time of. Further, since the trip current is caused to flow through the plurality of bypass paths, it is possible to reduce the burden of the trip current flowing through each switching element, and it is possible to reliably prevent the switching element from being damaged.

As a result, the manufacturing cost of the current supply type inverter can be reduced and the reliability can be improved.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the power MOSFET of the switching element may have a switching element IGBT or SIT configuration.

[0067]

According to the trip operation control method for a current supply type inverter according to the present invention, a trip operation having a faster response performance can be realized only by controlling the switching operation of a switching element without connecting a trip SCR circuit or the like. Therefore, the cost and reliability of the current supply type inverter can be reduced.

[Brief description of drawings]

FIG. 1 is an overall circuit configuration diagram of a current supply type inverter to which the present invention is applied.

FIG. 2 is a circuit configuration diagram of a gate circuit in FIG.

FIG. 3 is a circuit configuration diagram of a trip circuit in FIG.

FIG. 4 is a timing chart of signals for explaining the operation of the gate circuit and the inverter circuit of FIG.

5 is a circuit diagram for explaining the trip operation of FIG.

6 is a signal waveform diagram for explaining the trip operation of FIG.

7 is a circuit diagram for explaining a transient phenomenon at the time of stop in the normal state of FIG.

8 is an equivalent circuit diagram of FIG. 7.

9 is a waveform diagram of signals in the circuit of FIG.

FIG. 10 is a circuit diagram for explaining a transient phenomenon at the time of trip in the abnormal state of FIG.

11 is an equivalent circuit diagram of FIG.

12 is a waveform diagram of signals in the circuit of FIG.

FIG. 13 is an inverter circuit diagram for explaining the on-timing of the switching element of the present embodiment.

14 is a diagram showing an example of a waveform of VDH generated when all the switching elements are turned on in a state where a voltage remains in the output capacitor C of FIG.

FIG. 15 is a diagram showing an example of an applied voltage VDH on the output side of a DC reactor when a trip occurs due to a short circuit of an output capacitor.

FIG. 16 is a diagram showing an example of a current detection waveform and a voltage detection waveform due to the occurrence of a trip due to a short circuit of an output capacitor.

FIG. 17 is a diagram showing an example of a voltage waveform VDH when a trip occurs due to opening of a heating coil during energization.

FIG. 18 is a diagram showing an example of a current detection waveform and a voltage detection waveform when a trip occurs due to opening of the heating coil during energization.

FIG. 19 is a circuit configuration diagram of a conventional constant current supply type inverter.

20 is a circuit diagram for explaining a trip operation of the trip SCR circuit in FIG.

FIG. 21 is a circuit diagram for explaining a trip operation of the trip SCR circuit in FIG.

22 is a diagram showing an example of a current waveform and a voltage waveform that flow in each part of FIG. 21 from a normal time to a trip occurrence.

[Explanation of Codes] 1 current supply type inverter 2 3 phase full wave phase control rectifier circuit 3 inverter circuit 4 high frequency transformer 5 heating coil 6 direct current detection circuit 7 trip circuit 7a, 7b comparator 7c AND gate 11 control circuit section 11b AND Gate 12 Gate amplifier circuit section 12a, 12b Gate amplifier 13 Gate circuit section FD Freewheel diode LD1, LD2 DC reactor GA to GD Gate circuit S1 to S4 Switching element PT High frequency voltage detection transformer CT High frequency current detection transformer

Claims (2)

[Claims] 1. An inverter circuit configured by connecting a plurality of switching elements in a bridge, an abnormality detection circuit for detecting an abnormality of an AC output supplied to a load side by the inverter circuit, and each switching in the inverter circuit. The switching element of the inverter circuit is controlled so as to stop the supply of the alternating current when the abnormality detection circuit detects an abnormality in the alternating current output while controlling the switching operation of the element to supply a constant alternating current to the load side. In a current supply type inverter having a control circuit for controlling the above, when the abnormality detection circuit detects an abnormality in the AC output, all the switching elements of the inverter circuit are turned on by the control circuit to form a closed circuit. , This closed circuit bypasses the alternating current and stops the alternating current supplied to the load side A trip operation control method for a current supply type inverter, characterized in that the trip operation is performed. 2. When a trip signal is input to the inverter circuit, the switching element in the on state is kept in the on state, the switching element in the off state is turned on at the next on timing, and at this timing all the on elements are turned on. The trip operation control method of the current supply type inverter according to claim 1, wherein the trip operation control method is performed.