JPH0715480A - Automatic frequency controller - Google Patents
Automatic frequency controllerInfo
- Publication number
- JPH0715480A JPH0715480A JP5144601A JP14460193A JPH0715480A JP H0715480 A JPH0715480 A JP H0715480A JP 5144601 A JP5144601 A JP 5144601A JP 14460193 A JP14460193 A JP 14460193A JP H0715480 A JPH0715480 A JP H0715480A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- phase
- divider
- quasi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
(57)【要約】
【目的】 準同期検波型復調器の固定発振器をAFC制
御の基準周波数とすることにより、通常のディジタル復
調器で要求されるような、中間周波信号の搬送波周波数
への厳しい周波数安定度や高い周波数精度を緩和する。
【構成】 周波数変換器11と、その中間周波信号を、
直交位相検波器10と該直交位相検波器10に入力され
る固定発振器14とでベースバンド信号に変換した後、
ディジタル復調する準同期検波型復調器13と、中間周
波信号の周波数をM逓倍するM逓倍器15と、M逓倍器
15の出力信号を(M×N)分周する分周器16と、固
定発振器14の周波数をN分周する分周器116と、分
周器16の出力信号と分周器116の出力信号との周波
数差を検出する位相検波器17と、周波数変換器11に
入力され、位相検波器17からの出力電圧に基づいて発
振周波数が制御される電圧制御発振器19とで構成され
る。
(57) [Abstract] [Purpose] By using the fixed oscillator of the quasi-synchronous detection type demodulator as the reference frequency for AFC control, it is difficult to set the carrier frequency of the intermediate frequency signal as required by an ordinary digital demodulator. Relaxes frequency stability and high frequency accuracy. [Configuration] The frequency converter 11 and its intermediate frequency signal
After converting into a baseband signal by the quadrature detector 10 and the fixed oscillator 14 input to the quadrature detector 10,
Quasi-synchronous detection type demodulator 13 for digital demodulation, M multiplier 15 for multiplying the frequency of the intermediate frequency signal by M, frequency divider 16 for dividing the output signal of M multiplier 15 by (M × N), and fixed. The frequency divider 11 divides the frequency of the oscillator 14 by N, the phase detector 17 that detects the frequency difference between the output signal of the frequency divider 16 and the output signal of the frequency divider 116, and the frequency converter 11. , And a voltage controlled oscillator 19 whose oscillation frequency is controlled based on the output voltage from the phase detector 17.
Description
【0001】[0001]
【産業上の利用分野】本発明は、多値QAM変調信号や
多相位相変調信号などのディジタル変調信号を復調する
ディジタル復調回路に入力されるディジタル変調された
中間周波信号の搬送波周波数を安定化するための自動周
波数制御装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention stabilizes the carrier frequency of a digitally modulated intermediate frequency signal input to a digital demodulation circuit for demodulating a digital modulation signal such as a multilevel QAM modulation signal or a polyphase modulation signal. The present invention relates to an automatic frequency control device for doing so.
【0002】[0002]
【従来の技術】現在、テレビ放送の変調方式にはAM変
調方式やFM変調方式が一般的に用いられている。しか
し、最近では多値QAM変調方式や多相位相変調方式に
よる地上ディジタル放送や衛星ディジタル放送も考えら
れている。2. Description of the Related Art At present, an AM modulation method or an FM modulation method is generally used as a modulation method for television broadcasting. However, recently, terrestrial digital broadcasting and satellite digital broadcasting based on the multilevel QAM modulation system and the multiphase phase modulation system have been considered.
【0003】一般にディジタル変調されたRF信号を受
信し、ディジタル復調器でデータを復調するには、ディ
ジタル復調器に入力されるディジタル変調信号の搬送波
周波数を安定化することが必要とされる。Generally, in order to receive a digitally modulated RF signal and demodulate the data with a digital demodulator, it is necessary to stabilize the carrier frequency of the digitally modulated signal input to the digital demodulator.
【0004】例えば、衛星放送受信機ではBSコンバー
タの局発周波数は±数MHz程度ドリフトする可能性が
あるので、ディジタル変調信号を中間周波信号に周波数
変換してディジタル復調器に入力する時に、このドリフ
トを吸収して中間周波信号の搬送波周波数を安定化する
ためにはAFC装置が必要である。図5に従来の自動周
波数制御装置(例えば、特開昭63−299526号公
報参照)を示す。For example, in a satellite broadcast receiver, the local oscillation frequency of the BS converter may drift about ± several MHz, so when the frequency of the digital modulation signal is converted to an intermediate frequency signal and input to the digital demodulator, An AFC device is required to absorb the drift and stabilize the carrier frequency of the intermediate frequency signal. FIG. 5 shows a conventional automatic frequency control device (see, for example, Japanese Patent Laid-Open No. 63-299526).
【0005】図5において、ディジタル変調された高周
波信号は周波数変換器51により中間周波信号に変換さ
れ、中間周波帯域通過フィルタ52を介して、ディジタ
ル復調器53に入力される。ディジタル復調器53では
搬送波再生回路54により中間周波信号の搬送波が再生
され、データが復調される。一方、搬送波抽出回路55
では中間周波帯域通過フィルタ52から出力された中間
周波信号の搬送波が抽出され、位相検波器56に入力さ
れる。位相検波器56では発振周波数が中間周波信号の
搬送波周波数の公称周波数に等しい中間周波発振器57
の出力信号と、搬送波抽出回路55の出力信号との周波
数差が検出される。そして、位相検波器56の出力信号
により周波数変換器51に入力される電圧制御発振器5
8の発振周波数が制御される。In FIG. 5, the digitally modulated high frequency signal is converted into an intermediate frequency signal by a frequency converter 51 and input to a digital demodulator 53 via an intermediate frequency band pass filter 52. In the digital demodulator 53, the carrier wave of the intermediate frequency signal is reproduced by the carrier wave reproduction circuit 54 and the data is demodulated. On the other hand, the carrier wave extraction circuit 55
Then, the carrier of the intermediate frequency signal output from the intermediate frequency band pass filter 52 is extracted and input to the phase detector 56. The phase detector 56 has an intermediate frequency oscillator 57 whose oscillation frequency is equal to the nominal frequency of the carrier frequency of the intermediate frequency signal.
Of the output signal of the carrier wave extraction circuit 55 and the output signal of the carrier wave extraction circuit 55 are detected. Then, the voltage controlled oscillator 5 input to the frequency converter 51 by the output signal of the phase detector 56
The oscillation frequency of 8 is controlled.
【0006】[0006]
【発明が解決しようとする課題】上記従来例の構成で
は、ディジタル復調器53の搬送波再生回路54で中間
周波信号の搬送波が再生されるためには、ディジタル復
調器53に入力される中間周波信号の搬送波周波数と搬
送波再生回路54の動作周波数との周波数差を少なく抑
える必要がある。そのためには中間周波発振器57の温
度安定度と共に、搬送波再生回路54の動作周波数の安
定度を高める必要があり、中間周波発振器57とともに
搬送波再生回路54にも安定度の高い発振器が必要にな
る。しかも、中間周波信号の搬送波周波数を高くする
と、それだけ中間周波発振器57とともに搬送波再生回
路54にも温度安定度と共に、厳しい周波数精度が要求
されるという問題点を有していた。In the configuration of the conventional example described above, in order for the carrier wave of the intermediate frequency signal to be reproduced by the carrier wave reproducing circuit 54 of the digital demodulator 53, the intermediate frequency signal input to the digital demodulator 53 is to be reproduced. It is necessary to reduce the frequency difference between the carrier frequency of the carrier wave and the operating frequency of the carrier wave reproduction circuit 54. For that purpose, it is necessary to increase the stability of the operating frequency of the carrier wave regenerating circuit 54 together with the temperature stability of the intermediate frequency oscillator 57. Therefore, both the intermediate frequency oscillator 57 and the carrier wave regenerating circuit 54 need an oscillator with high stability. Moreover, when the carrier frequency of the intermediate frequency signal is increased, not only the intermediate frequency oscillator 57 but also the carrier reproducing circuit 54 are required to have temperature stability and strict frequency accuracy.
【0007】更に、ディジタル復調器53内にある搬送
波再生回路54の発振器以外にも、中間周波発振器57
を用いているので、発振器が2個必要である。In addition to the oscillator of the carrier recovery circuit 54 in the digital demodulator 53, an intermediate frequency oscillator 57 is also provided.
Since 2 is used, two oscillators are required.
【0008】本発明はかかる点に鑑みてなされたもの
で、上記従来例のもつ欠点を除去し、ディジタル復調器
に必要な中間周波信号の周波数安定度の問題を解決する
とともに、中間周波発振器を不要にする自動周波数制御
装置を提供することを目的とする。The present invention has been made in view of the above points, and eliminates the drawbacks of the above-described conventional example, solves the problem of frequency stability of the intermediate frequency signal necessary for the digital demodulator, and provides an intermediate frequency oscillator. It is an object of the present invention to provide an automatic frequency control device that makes it unnecessary.
【0009】[0009]
【課題を解決するための手段】この目的を達成するため
に本発明の自動周波数制御装置では、M相位相変調され
た高周波信号を中間周波信号に変換する周波数変換器
と、前記中間周波信号を直交位相検波器と該直交位相検
波器に入力される固定発振器とでベースバンド信号に変
換した後、ディジタル復調する準同期検波型復調器と、
前記中間周波信号の周波数をM逓倍するM逓倍器と、前
記M逓倍器の出力信号を(M×N)分周する第1の分周
器と、前記固定発振器の周波数をN分周する第2の分周
器と、前記第1の分周器の出力信号と前記第2の分周器
の出力信号との周波数差を検出する位相検波器と、前記
周波数変換器に入力され、前記位相検波器からの出力電
圧に基づいて発振周波数が制御される電圧制御発振器と
で構成される。To achieve this object, an automatic frequency control device of the present invention comprises a frequency converter for converting an M-phase phase-modulated high-frequency signal into an intermediate-frequency signal, and the intermediate-frequency signal. A quasi-synchronous detection type demodulator that performs digital demodulation after converting to a baseband signal with a quadrature detector and a fixed oscillator input to the quadrature detector,
An M multiplier for multiplying the frequency of the intermediate frequency signal by M, a first divider for dividing the output signal of the M multiplier by (M × N), and a first divider for dividing the frequency of the fixed oscillator by N. 2 frequency divider, a phase detector for detecting a frequency difference between the output signal of the first frequency divider and the output signal of the second frequency divider, and the phase detector which is input to the frequency converter It is composed of a voltage-controlled oscillator whose oscillation frequency is controlled based on the output voltage from the detector.
【0010】[0010]
【作用】M相位相変調された高周波信号は周波数変換器
で中間周波信号に変換される。そして、中間周波信号を
M逓倍器に入力することにより、周波数が中間周波信号
の搬送波周波数のM倍で、M相位相変調成分が除去され
た無変調信号が得られる。更に、この無変調信号を第1
の分周器で(M×N)分周することにより中間周波信号
の搬送波周波数のN分の1の周波数を有する無変調信号
が得られる。一方、発振周波数が中間周波信号の公称周
波数にほぼ等しい固定発振器の出力信号を第2の分周器
に入力することにより、周波数が固定発振器のN分の1
の信号が得られる。そして、M相位相変調成分が除去さ
れ、中間周波信号の搬送波周波数のN分の1の周波数を
有する無変調信号と、周波数が固定発振器のN分の1の
信号との周波数差が位相検波器で検出される。位相検波
器で検出された出力信号はループフィルタで平均化され
た後、電圧制御発振器に入力されて電圧制御発振器の発
振周波数が制御される。しかも、中間周波信号の搬送波
周波数と準同期検波型復調器の固定発振器の周波数との
周波数差が零となるように電圧制御発振器の発振周波数
が制御される。The M-phase phase-modulated high frequency signal is converted into an intermediate frequency signal by the frequency converter. Then, by inputting the intermediate frequency signal to the M multiplier, a non-modulated signal whose frequency is M times as high as the carrier frequency of the intermediate frequency signal and in which the M phase phase modulation component is removed is obtained. Furthermore, this unmodulated signal is
By performing the (M × N) frequency division by the frequency divider of 1, an unmodulated signal having a frequency of 1 / N of the carrier frequency of the intermediate frequency signal can be obtained. On the other hand, by inputting the output signal of the fixed oscillator whose oscillation frequency is substantially equal to the nominal frequency of the intermediate frequency signal to the second frequency divider, the frequency is 1 / N of that of the fixed oscillator.
Signal is obtained. Then, the M-phase phase modulation component is removed, and the frequency difference between the unmodulated signal having a frequency of 1 / N of the carrier frequency of the intermediate frequency signal and the frequency of the signal of 1 / N of the fixed oscillator is the phase detector. Detected in. The output signal detected by the phase detector is averaged by the loop filter and then input to the voltage controlled oscillator to control the oscillation frequency of the voltage controlled oscillator. Moreover, the oscillation frequency of the voltage controlled oscillator is controlled so that the frequency difference between the carrier frequency of the intermediate frequency signal and the frequency of the fixed oscillator of the quasi-synchronous detection demodulator becomes zero.
【0011】[0011]
【実施例】以下、本発明の実施例を図面をもとに説明す
る。Embodiments of the present invention will be described below with reference to the drawings.
【0012】図1は本発明の第1の実施例に係る自動周
波数制御装置(以下、AFC装置と記す)である。11
はM相位相変調された高周波信号を中間周波信号に変換
する周波数変換器、12は中間周波帯域通過フィルタ、
13は準同期検波型復調器、14は発振周波数が中間周
波信号の公称周波数にほぼ等しい固定発振器、10は準
同期検波型復調器13の直交位相検波器、15は中間周
波信号の周波数をM逓倍するM逓倍器、16はM逓倍器
15の出力信号の周波数を(M×N)分周する分周器、
116は固定発振器14の周波数をN分周する分周器、
17は分周器16の出力信号と分周器116の出力信号
との周波数差を検出する位相検波器、18は位相検波器
17からの出力信号を平均化するループフィルタ、19
は周波数変換器11に入力され、ループフィルタ18の
出力電圧により発振周波数が制御される電圧制御発振器
である。FIG. 1 shows an automatic frequency control device (hereinafter referred to as an AFC device) according to a first embodiment of the present invention. 11
Is a frequency converter for converting the M-phase phase-modulated high frequency signal into an intermediate frequency signal, 12 is an intermediate frequency band pass filter,
13 is a quasi-synchronous detection type demodulator, 14 is a fixed oscillator whose oscillation frequency is substantially equal to the nominal frequency of the intermediate frequency signal, 10 is a quadrature phase detector of the quasi-synchronous detection type demodulator 13, and 15 is the frequency of the intermediate frequency signal. An M multiplier for multiplying; 16 a divider for dividing the frequency of the output signal of the M multiplier 15 by (M × N);
116 is a frequency divider for dividing the frequency of the fixed oscillator 14 by N,
Reference numeral 17 denotes a phase detector that detects the frequency difference between the output signal of the frequency divider 16 and the output signal of the frequency divider 116. 18 is a loop filter that averages the output signal from the phase detector 17.
Is a voltage controlled oscillator which is input to the frequency converter 11 and whose oscillation frequency is controlled by the output voltage of the loop filter 18.
【0013】以上のように構成されたAFC装置につい
て、その動作を説明する。まず、M相位相変調された高
周波信号は周波数変換器11により中間周波信号に変換
され、中間周波帯域通過フィルタ12では中間周波信号
以外の余分なスプリアス信号が除かれた後、準同期検波
型復調器13に入力される。準同期検波型復調器13で
は、入力された中間周波信号を直交位相検波器10と該
直交位相検波器10に入力される固定発振器14とでベ
ースバンド信号に変換した後、データが復調される。The operation of the AFC device configured as described above will be described. First, the M-phase phase-modulated high-frequency signal is converted into an intermediate-frequency signal by the frequency converter 11, and an extra spurious signal other than the intermediate-frequency signal is removed by the intermediate-frequency bandpass filter 12, and then the quasi-synchronous detection demodulation is performed. Input to the container 13. In the quasi-synchronous detection demodulator 13, the input intermediate frequency signal is converted into a baseband signal by the quadrature phase detector 10 and the fixed oscillator 14 input to the quadrature phase detector 10, and then the data is demodulated. .
【0014】しかし、中間周波信号の搬送波周波数が固
定発振器14の周波数と大きくずれていると、準同期検
波型復調器13では搬送波に対する位相同期がとれなく
なり、正しくデータが復調されない。However, if the carrier frequency of the intermediate frequency signal is largely deviated from the frequency of the fixed oscillator 14, the quasi-synchronous detection type demodulator 13 will not be able to achieve phase synchronization with the carrier and data will not be demodulated correctly.
【0015】一方、中間周波帯域通過フィルタ12を通
過した中間周波信号は、M逓倍器15に入力され、中間
周波信号の周波数をM逓倍することにより、周波数が中
間周波信号の搬送波周波数のM倍で、M相位相変調成分
が除去された無変調信号が得られる。更に、この無変調
信号を分周器16で(M×N)分周することにより中間
周波信号の搬送波周波数のN分の1の周波数を有する無
変調信号が得られる。On the other hand, the intermediate frequency signal that has passed through the intermediate frequency band pass filter 12 is input to the M multiplier 15, and the frequency of the intermediate frequency signal is multiplied by M so that the frequency is M times the carrier frequency of the intermediate frequency signal. Thus, an unmodulated signal from which the M-phase phase modulation component has been removed is obtained. Further, by dividing this unmodulated signal by (M × N) by the frequency divider 16, an unmodulated signal having a frequency of 1 / N of the carrier frequency of the intermediate frequency signal can be obtained.
【0016】一方、準同期検波型復調器13の固定発振
器14の周波数を分周器116に入力することにより、
周波数が固定発振器14のN分の1の信号が得られる。
そして、位相検波器17では、中間周波信号の搬送波周
波数のN分の1の周波数と、固定発振器14の発振周波
数のN分の1の周波数との周波数差が検出される。ルー
プフィルタ18では位相検波器17の出力信号が平均化
され、電圧制御発振器19に入力されて電圧制御発振器
19の発振周波数が制御される。On the other hand, by inputting the frequency of the fixed oscillator 14 of the quasi-synchronous detection type demodulator 13 to the frequency divider 116,
A signal whose frequency is 1 / N of the fixed oscillator 14 is obtained.
Then, the phase detector 17 detects the frequency difference between the 1 / N frequency of the carrier frequency of the intermediate frequency signal and the 1 / N frequency of the oscillation frequency of the fixed oscillator 14. In the loop filter 18, the output signal of the phase detector 17 is averaged and input to the voltage controlled oscillator 19 to control the oscillation frequency of the voltage controlled oscillator 19.
【0017】ここで分周器16の出力信号の周波数と分
周器116の出力信号の周波数とが等しくなるように、
すなわち、中間周波信号の搬送波周波数と固定発振器1
4の発振周波数とが等しくなるように電圧制御発振器1
9の発振周波数はループフィルタ18を介して制御され
るので、中間周波信号の搬送波周波数がAFC制御ルー
プの周波数引き込み範囲内では、準同期検波型復調器1
3に入力される中間周波信号の搬送波周波数と固定発振
器14の発振周波数とは一致する。Here, the frequency of the output signal of the frequency divider 16 and the frequency of the output signal of the frequency divider 116 are made equal to each other.
That is, the carrier frequency of the intermediate frequency signal and the fixed oscillator 1
Voltage controlled oscillator 1 so that the oscillation frequency of 4 becomes equal.
Since the oscillation frequency of 9 is controlled via the loop filter 18, the quasi-synchronous detection type demodulator 1 is used when the carrier frequency of the intermediate frequency signal is within the frequency pull-in range of the AFC control loop.
The carrier frequency of the intermediate frequency signal input to 3 and the oscillation frequency of the fixed oscillator 14 match.
【0018】以上のように、第1の実施例によれば、M
相位相変調された高周波信号の搬送波周波数が公称周波
数からドリフトしているとしても準同期検波型復調器1
3の固定発振器14の発振周波数を基準にしてM相位相
変調された中間周波信号の搬送波周波数が安定化される
ため、準同期検波型復調器13に入力される中間周波信
号の搬送波周波数と固定発振器14の発振周波数とは一
致し、準同期検波型復調器13の復調動作は極めて安定
化される。As described above, according to the first embodiment, M
Quasi-synchronous detection demodulator 1 even if the carrier frequency of the phase-phase modulated high-frequency signal drifts from the nominal frequency
Since the carrier frequency of the intermediate frequency signal M-phase-phase-modulated with the oscillation frequency of the fixed oscillator 14 of No. 3 is stabilized, it is fixed to the carrier frequency of the intermediate frequency signal input to the quasi-synchronous detection type demodulator 13. It matches the oscillation frequency of the oscillator 14, and the demodulation operation of the quasi-synchronous detection type demodulator 13 is extremely stabilized.
【0019】更に、準同期検波型復調器13に入力され
る中間周波信号の搬送波周波数は、常に固定発振器14
の発振周波数と一致するようにAFC制御されるので、
固定発振器14の発振周波数の精度および安定度を厳し
くする必要がなくなると同時に、中間周波信号の搬送波
周波数を高くしたとしても、それに比例して固定発振器
14の発振周波数の精度および安定度を厳しくする必要
がない。Further, the carrier frequency of the intermediate frequency signal input to the quasi-synchronous detection type demodulator 13 is always the fixed oscillator 14.
Since AFC control is performed to match the oscillation frequency of
There is no need to tighten the precision and stability of the oscillation frequency of the fixed oscillator 14, and at the same time, even if the carrier frequency of the intermediate frequency signal is increased, the precision and stability of the oscillation frequency of the fixed oscillator 14 are proportionally increased. No need.
【0020】また、一つの固定発振器14でAFC制御
の基準周波数としての機能と直交位相検波器10に入力
される局部発振器としての機能を兼ねているので、従来
例のような中間周波発振器を省略できる効果がある。Further, since one fixed oscillator 14 has both a function as a reference frequency for AFC control and a function as a local oscillator input to the quadrature phase detector 10, an intermediate frequency oscillator as in the conventional example is omitted. There is an effect that can be done.
【0021】なお、本実施例では、分周器16、116
で周波数を低くした後、位相比較器17で周波数差を検
出しているため、位相比較器17は動作周波数の低いも
のでよい。In this embodiment, the frequency dividers 16 and 116 are used.
Since the frequency difference is detected by the phase comparator 17 after the frequency is lowered by, the phase comparator 17 may have a low operating frequency.
【0022】図2は本発明の第2の実施例に係るAFC
装置のブロック構成図である。21はM相位相変調され
た高周波信号を中間周波信号に変換する周波数変換器、
22は中間周波帯域通過フィルタ、23は準同期検波型
復調器、24は発振周波数が中間周波信号の公称周波数
にほぼ等しい固定発振器、20は準同期検波型復調器2
3の直交位相検波器、25は中間周波信号の周波数をM
逓倍するM逓倍器、26はM逓倍器25の出力信号の周
波数を(M×N)分周する分周器、226は固定発振器
24の周波数をN分周する分周器、27は分周器26の
出力信号と分周器226の出力信号との周波数差を検出
する位相検波器、28は位相検波器27からの出力信号
を平均化するループフィルタ、29は周波数変換器21
に入力され、ループフィルタ28の出力電圧により発振
周波数が制御される電圧制御発振器、201は準同期検
波型復調器23が正しくデータを復調しているか否かを
判定する同期判定器、202は電圧制御発振器29の発
振周波数を強制スイープさせる掃引信号発生器、203
はループフィルタ28の出力電圧と掃引信号発生器20
2の出力電圧を加算し、電圧制御発振器29に入力する
加算器である。FIG. 2 shows an AFC according to the second embodiment of the present invention.
It is a block block diagram of an apparatus. Reference numeral 21 is a frequency converter for converting a high frequency signal phase-modulated by M phase into an intermediate frequency signal,
22 is an intermediate frequency band pass filter, 23 is a quasi-synchronous detection type demodulator, 24 is a fixed oscillator whose oscillation frequency is substantially equal to the nominal frequency of the intermediate frequency signal, 20 is a quasi-synchronous detection type demodulator 2
3 is a quadrature phase detector, 25 is the frequency of the intermediate frequency signal
M is a multiplier for multiplying, 26 is a divider for dividing the frequency of the output signal of the M multiplier 25 by (M × N), 226 is a divider for dividing the frequency of the fixed oscillator 24 by N, and 27 is a divider. The phase detector that detects the frequency difference between the output signal of the frequency detector 26 and the output signal of the frequency divider 226, 28 is a loop filter that averages the output signal from the phase detector 27, and 29 is the frequency converter 21.
Voltage controlled oscillator whose oscillation frequency is controlled by the output voltage of the loop filter 28, 201 is a synchronous determiner that determines whether the quasi-synchronous detection type demodulator 23 is correctly demodulating data, and 202 is a voltage. A sweep signal generator for forcibly sweeping the oscillation frequency of the controlled oscillator 29, 203
Is the output voltage of the loop filter 28 and the sweep signal generator 20.
It is an adder for adding the output voltages of 2 and inputting to the voltage controlled oscillator 29.
【0023】以上のように構成されたAFC装置につい
て、その動作を説明する。まず、M相位相変調された高
周波信号は周波数変換器21により中間周波信号に変換
され、中間周波帯域通過フィルタ22では中間周波信号
以外の余分なスプリアス信号が除かれた後、準同期検波
型復調器23に入力される。準同期検波型復調器23で
は、入力された中間周波信号を直交位相検波器20と該
直交位相検波器20に入力される固定発振器24とでベ
ースバンド信号に変換した後、データが復調される。し
かし、中間周波信号の搬送波周波数が固定発振器24の
周波数と大きくずれていると、準同期検波型復調器23
では搬送波に対する位相同期がとれなくなり、正しくデ
ータが復調されない。The operation of the AFC device configured as above will be described. First, the M-phase phase-modulated high-frequency signal is converted into an intermediate-frequency signal by the frequency converter 21, the extra spurious signal other than the intermediate-frequency signal is removed by the intermediate-frequency bandpass filter 22, and then the quasi-synchronous detection demodulation is performed. Input to the container 23. The quasi-coherent detection demodulator 23 converts the input intermediate frequency signal into a baseband signal by the quadrature detector 20 and the fixed oscillator 24 input to the quadrature detector 20, and then demodulates the data. . However, if the carrier frequency of the intermediate frequency signal deviates greatly from the frequency of the fixed oscillator 24, the quasi-synchronous detection type demodulator 23
In that case, the phase synchronization with the carrier wave is lost, and the data is not demodulated correctly.
【0024】一方、中間周波帯域通過フィルタ22を通
過した中間周波信号は、M逓倍器25に入力される。中
間周波信号の周波数をM逓倍することにより、周波数が
中間周波信号の搬送波周波数のM倍で、M相位相変調成
分が除去された無変調信号が得られる。更に、この無変
調信号を分周器26で(M×N)分周することにより中
間周波信号の搬送波周波数のN分の1の周波数を有する
無変調信号が得られる。On the other hand, the intermediate frequency signal passed through the intermediate frequency band pass filter 22 is input to the M multiplier 25. By multiplying the frequency of the intermediate frequency signal by M, a non-modulated signal whose frequency is M times the carrier frequency of the intermediate frequency signal and in which the M-phase phase modulation component is removed can be obtained. Further, by dividing this non-modulated signal by (M × N) by the frequency divider 26, a non-modulated signal having a frequency of 1 / N of the carrier frequency of the intermediate frequency signal can be obtained.
【0025】一方、準同期検波型復調器23の固定発振
器24の周波数を分周器226に入力することにより、
周波数が固定発振器24のN分の1の信号が得られる。
そして、位相検波器27では、中間周波信号の搬送波周
波数のN分の1の周波数と、固定発振器24の発振周波
数のN分の1の周波数との周波数差が検出される。ルー
プフィルタ28では位相検波器27の出力信号が平均化
され、電圧制御発振器29に入力されて電圧制御発振器
29の発振周波数が制御される。On the other hand, by inputting the frequency of the fixed oscillator 24 of the quasi-synchronous detection type demodulator 23 to the frequency divider 226,
A signal whose frequency is 1 / N of the fixed oscillator 24 is obtained.
Then, the phase detector 27 detects the frequency difference between the 1 / N frequency of the carrier frequency of the intermediate frequency signal and the 1 / N frequency of the oscillation frequency of the fixed oscillator 24. In the loop filter 28, the output signal of the phase detector 27 is averaged and input to the voltage controlled oscillator 29 to control the oscillation frequency of the voltage controlled oscillator 29.
【0026】ここで分周器26の出力信号の周波数と分
周器226の出力信号の周波数とが等しくなるように、
すなわち、中間周波信号の搬送波周波数と固定発振器2
4の発振周波数とが等しくなるように電圧制御発振器2
9の発振周波数はループフィルタ28を介して制御され
るので、中間周波信号の搬送波周波数がAFC制御ルー
プの周波数引き込み範囲内では、準同期検波型復調器2
3に入力される中間周波信号の搬送波周波数と固定発振
器24の発振周波数とは一致する。Here, the frequency of the output signal of the frequency divider 26 and the frequency of the output signal of the frequency divider 226 are made equal to each other.
That is, the carrier frequency of the intermediate frequency signal and the fixed oscillator 2
Voltage controlled oscillator 2 so that the oscillation frequency of 4 becomes equal.
Since the oscillation frequency of 9 is controlled via the loop filter 28, the quasi-synchronous detection type demodulator 2 is operated when the carrier frequency of the intermediate frequency signal is within the frequency pull-in range of the AFC control loop.
The carrier frequency of the intermediate frequency signal input to 3 and the oscillation frequency of the fixed oscillator 24 match.
【0027】同期判定器201は準同期検波型復調器2
3が正しくデータを復調しているか否かを判定し、正し
くデータを復調していないときには同期判定器201か
ら掃引制御信号を掃引信号発生器202に送出し、掃引
信号発生器202では上記掃引制御信号に基づいて掃引
信号を発生し、加算器203を介して電圧制御発振器2
9の発振周波数を強制スイープさせる。The synchronization decision unit 201 is a quasi-synchronization detection type demodulator 2
3 determines whether the data is correctly demodulated, and when the data is not correctly demodulated, the synchronization determiner 201 sends a sweep control signal to the sweep signal generator 202, and the sweep signal generator 202 causes the sweep control to be performed. A sweep signal is generated based on the signal, and the voltage-controlled oscillator 2 is generated via the adder 203.
Forcibly sweep the oscillation frequency of 9.
【0028】もしも、初期状態で、中間周波信号の搬送
波周波数がAFC制御ループの周波数引き込み範囲外に
あり、かつ、中間周波信号の搬送波周波数が固定発振器
24の周波数と大きくずれていると、準同期検波型復調
器23では搬送波に対する位相同期がとれなくなり、正
しくデータが復調されない。この時には同期判定器20
1から掃引制御信号が掃引信号発生器202に送出さ
れ、掃引信号発生器202では上記掃引制御信号に基づ
いて掃引信号を発生し、加算器203を介して電圧制御
発振器29の発振周波数を強制スイ−プさせ、準同期検
波型復調器23内で中間周波信号の搬送波に対する位相
同期がとれて、正しくデータが復調されるまで電圧制御
発振器29の発振周波数を強制スイープさせる。If, in the initial state, the carrier frequency of the intermediate frequency signal is outside the frequency pull-in range of the AFC control loop, and the carrier frequency of the intermediate frequency signal deviates greatly from the frequency of the fixed oscillator 24, the quasi-synchronization occurs. In the detection type demodulator 23, the phase synchronization with the carrier wave is lost, and the data is not demodulated correctly. At this time, the synchronization determiner 20
1, a sweep control signal is sent to the sweep signal generator 202, the sweep signal generator 202 generates a sweep signal based on the sweep control signal, and the oscillation frequency of the voltage controlled oscillator 29 is forcedly switched via the adder 203. Then, the oscillation frequency of the voltage controlled oscillator 29 is forcibly swept until the intermediate frequency signal is phase-synchronized with the carrier in the quasi-synchronous detection type demodulator 23 and the data is correctly demodulated.
【0029】以上のように、第2の実施例によれば、M
相位相変調された高周波信号の搬送波周波数が公称周波
数からドリフトしているとしても準同期検波型復調器2
3の固定発振器24の発振周波数を基準にしてM相位相
変調された中間周波信号の搬送波周波数が安定化される
ため、準同期検波型復調器23に入力される中間周波信
号の搬送波周波数と固定発振器24の発振周波数とは一
致し、準同期検波型復調器23の復調動作は極めて安定
化される。As described above, according to the second embodiment, M
Quasi-synchronous detection demodulator 2 even if the carrier frequency of the phase-phase modulated high-frequency signal drifts from the nominal frequency
Since the carrier frequency of the intermediate frequency signal M-phase-phase-modulated with the oscillation frequency of the fixed oscillator 24 of No. 3 is stabilized, the carrier frequency of the intermediate frequency signal input to the quasi-synchronous detection demodulator 23 is fixed. It matches the oscillation frequency of the oscillator 24, and the demodulation operation of the quasi-synchronous detection type demodulator 23 is extremely stabilized.
【0030】更に、準同期検波型復調器23に入力され
る中間周波信号の搬送波周波数は、常に固定発振器24
の発振周波数と一致するようにAFC制御されるので、
固定発振器24の発振周波数の精度および安定度を厳し
くする必要がなくなると同時に、中間周波信号の搬送波
周波数を高くしたとしても、それに比例して固定発振器
24の発振周波数の精度および安定度を厳しくする必要
がない。Further, the carrier frequency of the intermediate frequency signal input to the quasi-synchronous detection type demodulator 23 is always the fixed oscillator 24.
Since AFC control is performed to match the oscillation frequency of
There is no need to tighten the precision and stability of the oscillation frequency of the fixed oscillator 24, and at the same time, even if the carrier frequency of the intermediate frequency signal is increased, the precision and stability of the oscillation frequency of the fixed oscillator 24 are increased in proportion thereto. No need.
【0031】しかも、一つの固定発振器24でAFC制
御の基準周波数としての機能と直交位相検波器20に入
力される局部発振器としての機能を兼ねているので、従
来例のような中間周波発振器を省略できる効果がある。
また、同期判定により掃印信号を出力する掃引信号発生
器202を設けることにより、AFCの引き込み範囲を
拡大することができる。Moreover, since one fixed oscillator 24 has both a function as a reference frequency for AFC control and a function as a local oscillator input to the quadrature detector 20, an intermediate frequency oscillator as in the conventional example is omitted. There is an effect that can be done.
Further, by providing the sweep signal generator 202 which outputs the sweep signal according to the synchronization determination, the pull-in range of the AFC can be expanded.
【0032】なお、本実施例では、分周器26、226
で周波数を低くした後、位相検波器27で周波数差を検
出しているため、位相検波器27は動作周波数の低いも
のでよい。In the present embodiment, the frequency dividers 26, 226 are used.
Since the frequency difference is detected by the phase detector 27 after the frequency is lowered by, the phase detector 27 may have a low operating frequency.
【0033】図3は本発明の第3の実施例に係るAFC
装置の説明図であり、特に、図2に示した準同期検波型
復調器23の同期判定器201による同期判定の方法を
示す図である。33は準同期検波型復調器、34は準同
期検波型復調器33の固定発振器、30は準同期検波型
復調器33の直交位相検波器、300は復調されたデー
タの誤り率を検出する誤り率検出器、301は準同期検
波型復調器33が正しくデータを復調しているか否かを
判定する同期判定器である。FIG. 3 shows an AFC according to the third embodiment of the present invention.
FIG. 3 is an explanatory diagram of the apparatus, and particularly a diagram showing a synchronization determination method by the synchronization determiner 201 of the quasi-synchronous detection type demodulator 23 shown in FIG. 2. Reference numeral 33 is a quasi-synchronous detection type demodulator, 34 is a fixed oscillator of the quasi-synchronous detection type demodulator 33, 30 is a quadrature phase detector of the quasi-synchronous detection type demodulator 33, and 300 is an error for detecting an error rate of demodulated data. A rate detector 301 is a synchronization determiner that determines whether or not the quasi-synchronization detection type demodulator 33 is demodulating data correctly.
【0034】以上のように構成されたAFC装置の同期
判定方法について説明する。準同期検波型復調器33に
入力された中間周波信号は直交位相検波器30と固定発
振器34とによりベースバンド信号に変換された後、デ
ータ復調される。復調データの誤りが公知の誤り訂正復
号器(図示せず)で訂正される過程で、復調データの誤
り率が誤り率検出器300で検出され、この検出された
誤り率は誤り率情報として同期判定器301に送られ
る。同期判定器301では誤り率情報を所定の基準値と
比較し、誤り率がこの基準値を越えている場合には準同
期検波型復調器33が正しくデータを復調していないと
判定し、掃引信号発生器202に掃引制御信号を送出す
る。A synchronization determination method of the AFC device configured as above will be described. The intermediate frequency signal input to the quasi-coherent detection type demodulator 33 is converted into a baseband signal by the quadrature phase detector 30 and the fixed oscillator 34, and then data demodulated. The error rate of the demodulated data is detected by the error rate detector 300 in the process of correcting the error of the demodulated data by a known error correction decoder (not shown), and the detected error rate is synchronized as error rate information. It is sent to the determiner 301. The synchronization determiner 301 compares the error rate information with a predetermined reference value, and if the error rate exceeds this reference value, the quasi-synchronous detection type demodulator 33 determines that the data is not correctly demodulated, and the sweep is performed. The sweep control signal is sent to the signal generator 202.
【0035】図4は本発明の第4の実施例に係るAFC
装置の説明図であり、特に、図2に示した準同期検波型
復調器23の同期判定器201による同期判定の方法を
示す図である。43は準同期検波型復調器、44は準同
期検波型復調器43の固定発振器、40は準同期検波型
復調器43の直交位相検波器、400は準同期検波型復
調器43の位相同期ループ回路、401は位相同期ルー
プ回路400から出力される位相誤差信号に基づいて、
準同期検波型復調器43が正しくデータを復調している
か否かを判定する同期判定器である。FIG. 4 shows an AFC according to the fourth embodiment of the present invention.
FIG. 3 is an explanatory diagram of the apparatus, and particularly a diagram showing a synchronization determination method by the synchronization determiner 201 of the quasi-synchronous detection type demodulator 23 shown in FIG. 2. 43 is a quasi-synchronous detection type demodulator, 44 is a fixed oscillator of the quasi-synchronous detection type demodulator 43, 40 is a quadrature phase detector of the quasi-synchronous detection type demodulator 43, and 400 is a phase-locked loop of the quasi-synchronous detection type demodulator 43. The circuit 401 is based on the phase error signal output from the phase-locked loop circuit 400,
The quasi-coherent detection type demodulator 43 is a synchronism decision device for deciding whether or not data is correctly demodulated.
【0036】以上のように構成されたAFC装置の同期
判定方法について説明する。準同期検波型復調器43に
入力された中間周波信号は直交位相検波器40と固定発
振器44とでI軸とQ軸のベースバンド信号に変換され
る。このベースバンド信号には、中間周波信号の搬送波
の周波数・位相と固定発振器44の周波数・位相との誤
差(周波数誤差および位相誤差)が含まれており、これ
らの誤差をベースバンド信号から除去する回路が準同期
検波型復調器43には一般的に含まれている。そして、
位相誤差を除去する回路が位相同期ループ回路400で
ある。The synchronization determination method of the AFC device configured as above will be described. The intermediate frequency signal input to the quasi-synchronous detection demodulator 43 is converted by the quadrature detector 40 and the fixed oscillator 44 into I-axis and Q-axis baseband signals. This baseband signal includes an error (frequency error and phase error) between the frequency / phase of the carrier of the intermediate frequency signal and the frequency / phase of the fixed oscillator 44, and these errors are removed from the baseband signal. A circuit is generally included in the quasi-coherent detection type demodulator 43. And
The circuit that removes the phase error is the phase locked loop circuit 400.
【0037】従って、位相同期ループ回路400には位
相検波器(図示せず)が含まれており、この位相検波器
で位相誤差が検出され、この位相誤差はループフィルタ
(図示せず)で平均化されて位相誤差信号として同期判
定器401に提供される。同期判定器401では、提供
された位相誤差信号に基づいて、位相同期ループ回路4
00でベースバンド信号から位相誤差が除去されている
かどうか、すなわち位相同期ループ回路400が同期し
ているか否かを判定し、位相誤差信号が所定の基準レベ
ルを越えている場合には位相同期ループ回路400が同
期していないものと判断されるので、準同期検波型復調
器43も正しくデータを復調していないものと判定し、
掃引信号発生器202に掃引制御信号を送出する。Therefore, the phase locked loop circuit 400 includes a phase detector (not shown), the phase error is detected by this phase detector, and this phase error is averaged by a loop filter (not shown). It is converted into a phase error signal and provided to the synchronization decision unit 401. In the synchronism determiner 401, based on the provided phase error signal, the phase lock loop circuit 4
At 00, it is determined whether the phase error is removed from the baseband signal, that is, whether the phase locked loop circuit 400 is synchronized. If the phase error signal exceeds a predetermined reference level, the phase locked loop is detected. Since it is determined that the circuit 400 is not synchronized, it is also determined that the quasi-coherent detection type demodulator 43 is not correctly demodulating data,
A sweep control signal is sent to the sweep signal generator 202.
【0038】[0038]
【発明の効果】以上のように、本発明によれば次の効果
が発揮される。As described above, according to the present invention, the following effects are exhibited.
【0039】(1)準同期検波型復調器の固定発振器の
発振周波数を基準として、M相位相変調された中間周波
信号の搬送波周波数が安定化されるので、準同期検波型
復調器の復調動作が極めて安定化される。(1) Since the carrier frequency of the M-phase phase-modulated intermediate frequency signal is stabilized with reference to the oscillation frequency of the fixed oscillator of the quasi-synchronous detection type demodulator, the demodulation operation of the quasi-synchronous detection type demodulator is stabilized. Is extremely stable.
【0040】(2)中間周波信号の搬送波周波数と準同
期検波型復調器の固定発振器の発振周波数とが一致する
ようにAFC制御されるので、固定発振器に要求される
周波数精度や周波数安定度は厳しくなくてもよい。(2) Since the carrier frequency of the intermediate frequency signal and the oscillation frequency of the fixed oscillator of the quasi-synchronous detection type demodulator are AFC controlled, the frequency accuracy and frequency stability required for the fixed oscillator are It doesn't have to be strict.
【0041】(3)分周器で周波数を低くした後、位相
検波器で周波数差を検出しているので、動作周波数の低
い位相検波器でよい。(3) Since the frequency difference is detected by the phase detector after lowering the frequency by the frequency divider, a phase detector with a low operating frequency may be used.
【0042】(4)準同期検波型復調器の固定発振器が
基準発振器となっているので中間周波発振器を省略する
ことができる。(4) Since the fixed oscillator of the quasi-synchronous detection type demodulator is the reference oscillator, the intermediate frequency oscillator can be omitted.
【0043】(5)同期判定器から掃引制御信号を送出
し、電圧制御発振器の中心周波数を掃引する掃引信号発
生器を設けることにより、AFCの引き込み範囲を拡大
することができる。(5) By providing the sweep signal generator for sending the sweep control signal from the synchronization determiner and sweeping the center frequency of the voltage controlled oscillator, the pull-in range of the AFC can be expanded.
【図1】本発明の第1の実施例におけるAFC装置のブ
ロック図FIG. 1 is a block diagram of an AFC device according to a first embodiment of the present invention.
【図2】本発明の第2の実施例におけるAFC装置のブ
ロック図FIG. 2 is a block diagram of an AFC device according to a second embodiment of the present invention.
【図3】本発明の第3の実施例におけるAFC装置を示
し、特に図2の実施例での同期判定器の同期判定の方法
を示す図FIG. 3 is a diagram showing an AFC device according to a third embodiment of the present invention, and particularly a diagram showing a synchronization determination method of a synchronization determiner in the embodiment of FIG.
【図4】本発明の第4の実施例におけるAFC装置を示
し、特に図2の実施例での同期判定器の同期判定の方法
を示す図FIG. 4 is a diagram showing an AFC device according to a fourth embodiment of the present invention, and in particular, a diagram showing a synchronization determination method of a synchronization determiner in the embodiment of FIG. 2;
【図5】従来例におけるAFC装置のブロック図FIG. 5 is a block diagram of an AFC device in a conventional example.
10、20、30、40 直交位相検波器 11、21 周波数変換器 12、22 中間周波帯域通過フィルタ 13、23、33、43 準同期検波型復調器 14、24、34、44 固定発振器 15、25 M逓倍器 16、26、116、226 分周器 17、27 位相検波器 18、28 ループフィルタ 19、29 電圧制御発振器 201、301、401 同期判定器 202 掃引信号発生器 203 加算器 300 誤り率検出器 400 位相同期ループ回路 10, 20, 30, 40 Quadrature phase detector 11, 21 Frequency converter 12, 22 Intermediate frequency band pass filter 13, 23, 33, 43 Quasi-synchronous detection type demodulator 14, 24, 34, 44 Fixed oscillator 15, 25 M multiplier 16, 26, 116, 226 frequency divider 17, 27 phase detector 18, 28 loop filter 19, 29 voltage controlled oscillator 201, 301, 401 synchronization decision unit 202 sweep signal generator 203 adder 300 error rate detection 400 Phase locked loop circuit
───────────────────────────────────────────────────── フロントページの続き (72)発明者 加藤 久也 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hisaya Kato 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (4)
信号に変換する周波数変換器と、前記中間周波信号を、
直交位相検波器と該直交位相検波器に入力される固定発
振器とでベースバンド信号に変換した後、ディジタル復
調する準同期検波型復調器と、前記中間周波信号の周波
数をM逓倍するM逓倍器と、前記M逓倍器の出力信号を
(M×N)分周する第1の分周器と、前記固定発振器の
周波数をN分周する第2の分周器と、前記第1の分周器
の出力信号と前記第2の分周器の出力信号との周波数差
を検出する位相検波器と、前記周波数変換器に入力さ
れ、前記位相検波器からの出力電圧に基づいて発振周波
数が制御される電圧制御発振器とからなることを特徴と
した自動周波数制御装置。1. A frequency converter for converting a M-phase phase-modulated high-frequency signal into an intermediate-frequency signal, and the intermediate-frequency signal,
A quasi-synchronous detection type demodulator that performs digital demodulation after converting to a baseband signal by a quadrature phase detector and a fixed oscillator that is input to the quadrature phase detector, and an M multiplier that multiplies the frequency of the intermediate frequency signal by M A first divider that divides the output signal of the M multiplier by (M × N), a second divider that divides the frequency of the fixed oscillator by N, and the first divider. Detector for detecting the frequency difference between the output signal of the frequency divider and the output signal of the second frequency divider, and the oscillation frequency is controlled based on the output voltage from the phase detector which is input to the frequency converter. Automatic frequency control device comprising:
信号に変換する周波数変換器と、前記中間周波信号を、
直交位相検波器と該直交位相検波器に入力される固定発
振器とでベースバンド信号に変換した後、ディジタル復
調する準同期検波型復調器と、前記中間周波信号の周波
数をM逓倍するM逓倍器と、前記M逓倍器の出力信号を
(M×N)分周する第1の分周器と、前記固定発振器の
周波数をN分周する第2の分周器と、前記第1の分周器
の出力信号と前記第2の分周器の出力信号との周波数差
を検出する位相検波器と、前記周波数変換器に入力さ
れ、前記位相検波器からの出力電圧に基づいて発振周波
数が制御される電圧制御発振器と、前記準同期検波型復
調器が正しくデータを復調しているか否かを判定し、こ
の判定結果に対応して掃引制御信号を送出する同期判定
器と、該掃引制御信号に基づいて前記電圧制御発振器の
中心周波数を掃引させる掃引信号を前記電圧制御発振器
へ出力する掃引信号発生器とからなることを特徴とした
自動周波数制御装置。2. A frequency converter for converting an M-phase phase-modulated high frequency signal into an intermediate frequency signal, and the intermediate frequency signal,
A quasi-synchronous detection type demodulator that performs digital demodulation after converting to a baseband signal by a quadrature phase detector and a fixed oscillator that is input to the quadrature phase detector, and an M multiplier that multiplies the frequency of the intermediate frequency signal by M A first divider that divides the output signal of the M multiplier by (M × N), a second divider that divides the frequency of the fixed oscillator by N, and the first divider. Detector for detecting the frequency difference between the output signal of the frequency divider and the output signal of the second frequency divider, and the oscillation frequency is controlled based on the output voltage from the phase detector which is input to the frequency converter. A voltage controlled oscillator, a quasi-synchronous detection type demodulator, which determines whether or not the data is correctly demodulated, and which outputs a sweep control signal corresponding to the determination result, and the sweep control signal. Sweep the center frequency of the voltage controlled oscillator based on Automatic frequency control device of the sweep signal that has been characterized to consist of a sweep signal generator for outputting to the voltage controlled oscillator.
復調されたデータの誤り率情報に基づいて同期判定する
ことを特徴とする請求項2記載の自動周波数制御装置。3. The automatic frequency control device according to claim 2, wherein the synchronism judging device judges synchronism based on error rate information of data demodulated by the quasi-coherent detection type demodulator.
構成する位相同期ループ回路から出力される位相誤差信
号に基づいて、前記位相同期ループ回路が位相同期して
いるか否かを判定し同期判定することを特徴とする請求
項2記載の自動周波数制御装置。4. A synchronization judging device judges whether or not the phase locking loop circuit is phase locked based on a phase error signal output from a phase locking loop circuit which constitutes the quasi-synchronization detection type demodulator. 3. The automatic frequency control device according to claim 2, wherein the synchronization is determined.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5144601A JPH0715480A (en) | 1993-06-16 | 1993-06-16 | Automatic frequency controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5144601A JPH0715480A (en) | 1993-06-16 | 1993-06-16 | Automatic frequency controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0715480A true JPH0715480A (en) | 1995-01-17 |
Family
ID=15365835
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5144601A Pending JPH0715480A (en) | 1993-06-16 | 1993-06-16 | Automatic frequency controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0715480A (en) |
-
1993
- 1993-06-16 JP JP5144601A patent/JPH0715480A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2074974C (en) | Demodulator for digitally modulated wave | |
| US6023491A (en) | Demodulation apparatus performing different frequency control functions using separately provided oscillators | |
| US6731698B1 (en) | Quadrature demodulation circuit capable for canceling offset | |
| JPH0738023B2 (en) | Satellite radio wave capturing method of GPS receiver | |
| JP2932861B2 (en) | Phase synchronization detection circuit | |
| KR100424376B1 (en) | Pseudo-lock detection system | |
| EP1209872B1 (en) | Frequency control in a PSK receiver | |
| JP3693963B2 (en) | Digital demodulation circuit | |
| JPH0715480A (en) | Automatic frequency controller | |
| JPH0715482A (en) | Automatic frequency controller | |
| JPH07297872A (en) | Demodulator | |
| JPH0715481A (en) | Automatic frequency controller | |
| JPH07143199A (en) | Digital signal demodulator | |
| JPH0715479A (en) | Automatic frequency controller | |
| JPH07162470A (en) | Digital receiver | |
| JP2541009B2 (en) | Demodulator control circuit | |
| JPH06216769A (en) | PLL circuit and digital demodulation circuit having PLL circuit | |
| JP3410841B2 (en) | Phase modulated wave carrier regeneration circuit | |
| JP3396047B2 (en) | Receiver | |
| JP2943625B2 (en) | Carrier recovery method | |
| JPS6178250A (en) | Circuit for frequency conversion | |
| JPH0723071A (en) | Automatic frequency controller | |
| JPH07273821A (en) | Demodulator | |
| JP3074752B2 (en) | Minimum displacement modulation wave demodulation circuit | |
| JPH02249330A (en) | Pseudo lock detection circuit for costas loop type demodulator |