JPH0716207B2 - Digital communication demodulator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital communication demodulator of a system for identifying data after integrating a baseband signal.

[Conventional technology]

Figure 8 shows GMSK (Gaussian filtered Minimam Shiff Ke).
ying) This is a configuration of a 2-bit integral 4-level discriminator for the modulation method. (The IEICE Technical Report. SAT86-2
Five. (Refer to “Adaptive discrimination level control type digital FM demodulator for mobile communication”) In the figure, (1) is the limiter output of the IF signal, (2) is the frequency detector (discriminator),
(3) is a baseband filter, (5) is a clock recovery circuit, (6) is a timing generation circuit (7), (8) is 2
A bit integration discharge circuit, (9) a switching circuit, (10) an identification circuit, (11) a demodulated data output, and (12) a reproduced clock output.

Next, the operation will be described. The baseband signal extracted by the baseband filter (3) after being frequency-detected by the frequency detector (2) shows an eye pattern as shown in FIG. The timing generation circuit (6) generates timing signals for integration and discharge by the reproduction clock reproduced by the clock reproduction circuit (5) from this signal. The 2-bit integration / discharge circuits (7) and (8) integrate the baseband signal over the 2-bit period by the timing signal shifted by the 1-bit period. As shown in FIG. 10, the integrated waveform is divided into four cases according to the past 2-bit data. For example, in Fig. 10 (a), the past 2 bits are "1.1".
The path in the case of is shown by the solid line. There are four paths depending on the data of the current bit and the next bit,
The paths corresponding to "1" and "0" of the current bit are far apart at the end of integration, and the current bit can be determined by comparing with the level indicated by LEVEL-1. The outputs of the two 2-bit integrators are switched by the switching circuit (9) every one bit period, and the discriminator (10) reproduces the data. The discriminator selects a discrimination level from the past 2-bit reproduction data and judges the data by using the discrimination level.

[Problems to be solved by the invention]

The frequency-detected baseband signal may deviate from the range that should originally be suppressed as shown in FIG. 11A due to filter characteristics, noise, and the like. Since the conventional digital signal demodulator is configured as described above, the baseband signal including this distortion is integrated as it is.
In some cases, the integration result exceeded the discrimination level and reached a level judged as the opposite data as shown in FIG.

The present invention has been made to solve the above problems, and an object thereof is to reduce the adverse effect of an abnormal baseband signal on the integrated waveform and reduce the error rate of reproduced data.

[Means for solving problems]

The digital communication demodulator according to the present invention has a waveform shaping circuit added so that the baseband signal is within a predetermined level range.

[Action]

The waveform shaping circuit according to the present invention keeps the baseband signal within a predetermined level range to reduce the influence of the abnormal baseband waveform on the integrated waveform, reduce the error rate of the digital communication demodulator, and reduce the reception sensitivity. Improve.

Example of Invention

An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, (4) is a baseband waveform shaping circuit for preventing the baseband signal generated by the frequency detector (2) and the baseband filter (3) from deviating from the range where it should originally be suppressed. FIG. 2 shows a concrete circuit example of the baseband waveform shaping circuit (4). (13) is a baseband signal input, (14) is a reference voltage corresponding to the center level of the baseband signal, and (15) is a waveform-shaped baseband output. (17), (1
8) is a Zener diode for waveform shaping. (16) is an operational amplifier.

Next, the operation will be described. The baseband signal detected by the frequency detector (2) and taken out by the baseband filter (3) usually has a waveform that falls within a certain amplitude range as shown in FIG. 9, but due to filter characteristics and noise. , As shown in FIG. 11 (a), the amplitude may deviate from a certain value. Such a signal is generated by the waveform shaping circuit (4).
The waveform is shaped as shown in FIG. The timing generation circuit (6) generates integration and discharge timing signals by the reproduction clock reproduced from the clock reproduction circuit (5). 2-bit integration and discharge circuits (7) and (8) are
Integrate the shaped baseband waveform over a bit period. At this time, the integrated waveform becomes, for example, as shown in FIG. 3 (b), and the influence of the abnormal baseband waveform on the integration result is reduced as compared with FIG. 11 (b) which is the integrated waveform when the waveform is not shaped. ing. The outputs of the two 2-bit integrators are switched by the switching circuit (9) every one bit period, and the discriminator (10) reproduces the data.

The waveform shaping circuit in FIG. 2 will be described. The baseband waveform input (13) is amplified by the operational amplifier (16) at an amplification rate determined by the resistance ratio centered on the reference voltage (14).
The output (15) is waveform shaped because the output (15) cannot be higher than the breakdown voltage of the Zener diode (18) and lower than the breakdown voltage of the Zener diode (17) compared to the reference voltage (14). Will be things.

In the above embodiment, the GMSK 2-bit integral 4-level identification method is shown, but it may be applied to the integral identification of PLL-QPSK. Figure 4 shows the eye pattern and integrated waveform of PLL-QPSK. Further, it may be applied to the GMSK 1-bit integral identification method and the GMSK 1.5-bit integral identification method. This GMSK 1-bit integral identification method
The eye pattern and integral waveform in the 1.5-bit identification method are shown in Figs.

Further, the GMSK 2-bit integral discrimination method may be applied to the configuration shown in FIG. In the figure, (13) is a 1-bit integrator, (14) is an A / D converter, and (15) is a CPU. In FIG. 7, the output of the 1-bit integrator (13) is digitized by the A / D converter (14) and then the CPU (1
It is input to 5), but the CPU (15) obtains the same result as the 2-bit integration by adding it with the previous 1-bit input.

〔The invention's effect〕

As described above, according to the present invention, since the baseband signal is configured to be integrated and identified after being passed through the waveform shaping circuit, the adverse effect of the abnormal baseband signal on the integrated waveform is reduced, and the reproduction data error is reduced. The effect is to reduce the rate and improve the sensitivity of the receiver.

[Brief description of drawings]

1 is a block diagram of a digital communication demodulator according to an embodiment of the present invention, FIG. 2 is a concrete circuit diagram of the waveform shaping circuit of FIG. 1, and FIG. 3 is an embodiment shown in FIG. 1 of the present invention. An operation waveform diagram for explaining the operation of the example, FIGS. 4A and 4B are an eye pattern diagram and an integrated waveform diagram of the PLL-QPSK according to the present invention,
5 (a) and 5 (b) are an eye pattern diagram and an integral waveform diagram of the GMSK 1-bit integral identification method according to the present invention, and FIG. 6 (a).
(B) is an eye pattern diagram and integral waveform diagram of the GMSK 1.5-bit integral identification method according to the present invention, FIG. 7 is a configuration diagram showing another embodiment of the present invention, and FIG. 8 shows a conventional demodulator. Block diagram, FIG. 9 is a baseband filter (3) shown in FIG.
Eye pattern diagram of the baseband signal extracted from
FIG. 10 is a GMSK 2-bit integration output waveform diagram in the conventional demodulator, and FIG. 11 is an operation waveform diagram for explaining the operation of the conventional demodulator. In the figure, (4) is a waveform shaping circuit, (7) and (8) are integral discharge circuits, and (10) is a discriminator. In the drawings, the same reference numerals indicate the same or corresponding parts.

Continuation of front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H04L 27/22 9297-5K H04L 27/22 Z

Claims (1)

[Claims] 1. A digital communication demodulator that integrates an input baseband signal by an integration discharge circuit and identifies and outputs data by the integrated output, and is connected in series to the input side of the integration discharge circuit to obtain the baseband signal. A digital communication demodulator characterized by comprising a waveform shaper for limiting the signal level of the signal to a predetermined level when the signal level reaches a predetermined level.