JPH0719019Y2 - Temperature correction circuit - Google Patents
Temperature correction circuitInfo
- Publication number
- JPH0719019Y2 JPH0719019Y2 JP1989098084U JP9808489U JPH0719019Y2 JP H0719019 Y2 JPH0719019 Y2 JP H0719019Y2 JP 1989098084 U JP1989098084 U JP 1989098084U JP 9808489 U JP9808489 U JP 9808489U JP H0719019 Y2 JPH0719019 Y2 JP H0719019Y2
- Authority
- JP
- Japan
- Prior art keywords
- magnetoresistive element
- terminal
- output
- thermistor
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Semiconductor Integrated Circuits (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
- Measuring Magnetic Variables (AREA)
Description
【考案の詳細な説明】 〔産業上の利用分野〕 この考案は、半導体磁気抵抗素子を使用する機器の周囲
温度の影響を低減する温度補正回路に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a temperature correction circuit for reducing the influence of the ambient temperature of a device using a semiconductor magnetoresistive element.
〔従来の技術〕 第４図はたとえば、特公昭63−63049号公報に示された
磁気抵抗素子を示す斜視図であり、この第４図におい
て、磁気抵抗素子３は５個の磁気抵抗部1a〜1eがあり、
磁石２は第５図のように磁気抵抗素子３の磁気抵抗部1
a,1bの配列方向に沿って相対的に移動できるようにされ
ている。[Prior Art] FIG. 4 is a perspective view showing a magnetoresistive element disclosed in, for example, Japanese Patent Publication No. 63-63049, and in FIG. 4, the magnetoresistive element 3 includes five magnetoresistive portions 1a. There is ~ 1e,
As shown in FIG. 5, the magnet 2 is the magnetoresistive portion 1 of the magnetoresistive element 3.
It is configured to be relatively movable along the arrangement direction of a and 1b.
この場合、磁気抵抗部1cには、磁石２の磁界が常に印加
され、磁気抵抗部1d,1eには、磁石２の磁界は常に印加
されないようにされている。In this case, the magnetic field of the magnet 2 is always applied to the magnetic resistance portion 1c, and the magnetic field of the magnet 2 is not always applied to the magnetic resistance portions 1d and 1e.
この磁気抵抗素子３を使用するには、たとえば、第６図
のような回路に接続する。すなわち、端子4a,4bをそれ
ぞれ差動増幅器5a,5bの一方の入力側に接続し、差動増
幅器5a,5bの他方の端子は共通にして、抵抗R1とR2との
接続点に接続している。To use this magnetoresistive element 3, for example, it is connected to a circuit as shown in FIG. That is, the terminals 4a and 4b are respectively connected to one input side of the differential amplifiers 5a and 5b, and the other terminals of the differential amplifiers 5a and 5b are commonly connected to the connection point of the resistors R 1 and R 2. is doing.
抵抗R1，R2の各他の一端は電源端子7a,7bに接続されて
いる。電源端子7a,7bはそれぞれ＋E,−Ｅの電圧を発生
している。The other ends of the resistors R 1 and R 2 are connected to the power supply terminals 7a and 7b. The power supply terminals 7a and 7b generate voltages of + E and -E, respectively.
この電源端子7a,7bにそれぞれ磁気抵抗素子３の端子4c,
4dがそれぞれ接続されている。The power supply terminals 7a and 7b are connected to the terminals 4c and 4c of the magnetoresistive element 3, respectively.
4d are connected respectively.
上記磁気抵抗素子３の端子4aの電圧値は磁石２の位置を
出力しており、端子4bの電圧値は動作範囲では、磁石２
の位置によらず、温度の影響分を出力している。The voltage value of the terminal 4a of the magnetoresistive element 3 outputs the position of the magnet 2, and the voltage value of the terminal 4b is the magnet 2 in the operating range.
The influence of temperature is output regardless of the position.
端子4a,4bの両電圧をそれぞれ差動増幅器5a,5bに入力
し、抵抗R1とR2との接続点の電圧を基準電圧として、こ
の差動増幅器5a,5bで偏差をとり、その出力電圧をE1，E
2とし、この電圧E1，E2は割算回路６に入力され、出力E
0とする。割算回路６の出力E0＝E1／E2は温度の影響を
相殺された値となっている。And input terminals 4a, 4b both voltages of each differential amplifier 5a, to 5b, as a reference voltage the voltage at the node between the resistors R 1 and R 2, the differential amplifier 5a, takes the deviation 5b, the output Voltage is E 1 , E
2 and these voltages E 1 and E 2 are input to the division circuit 6 and output E
Set to 0 . The output E 0 = E 1 / E 2 of the division circuit 6 has a value offset by the influence of temperature.
従来の磁気抵抗素子３は以上のように構成されているの
で、素子構造が複雑で、コストが高くなり、３端子の磁
気抵抗素子に比べ、素子が大きくなるという問題点があ
った。Since the conventional magnetoresistive element 3 is configured as described above, there are problems that the element structure is complicated, the cost is high, and the element is larger than the 3-terminal magnetoresistive element.
この考案は、上記のような問題点を解消するためになさ
れたもので、安価な３端子磁気抵抗素子に温度補正を施
すことができる温度補正回路を得ることを目的とする。The present invention has been made in order to solve the above problems, and an object thereof is to obtain a temperature correction circuit capable of performing temperature correction on an inexpensive 3-terminal magnetoresistive element.
この考案に係る温度補正回路は、抵抗とブリッジ回路を
構成し、磁石を含む３端子半導体磁気抵抗素子と、この
３端子半導体磁気抵抗素子の出力電圧と基準電圧との偏
差をとる差動増幅器の入力端子と出力端子との間に正特
性リニアサーミスタと負特性サーミスタおよび調整抵抗
とで組み合わせ３端子半導体磁気抵抗素子の出力の温度
補正を行う帰還抵抗とを設けたものである。A temperature correction circuit according to the present invention comprises a resistor and a bridge circuit, a three-terminal semiconductor magnetoresistive element including a magnet, and a differential amplifier for taking a deviation between an output voltage of the three-terminal semiconductor magnetoresistive element and a reference voltage. A feedback resistor for correcting the temperature of the output of the three-terminal semiconductor magnetoresistive element is provided between the input terminal and the output terminal by combining a positive characteristic linear thermistor, a negative characteristic thermistor and an adjusting resistor.
この考案における温度補正回路は、正特性リニアサーミ
スタと負特性サーミスタと調整用抵抗の合成抵抗による
帰還抵抗で３端子半導体磁気抵抗素子の出力の温度変化
を打ち消し、調整用抵抗の抵抗値を調整することによ
り、３端子半導体磁気抵抗素子の出力の温度バラツキを
補正する。The temperature correction circuit according to the present invention adjusts the resistance value of the adjusting resistor by canceling the temperature change of the output of the three-terminal semiconductor magnetoresistive element by the feedback resistance of the combined resistance of the positive characteristic linear thermistor, the negative characteristic thermistor and the adjusting resistor. As a result, the temperature variation of the output of the 3-terminal semiconductor magnetoresistive element is corrected.
以下、この考案の温度補正回路の実施例を図について説
明する。第１図はその一実施例の回路図である。この第
１図において、1.7は磁石を組み込んだ３端子半導体磁
気抵抗素子（以下、磁気抵抗素子という）である。An embodiment of the temperature correction circuit of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of one embodiment thereof. In FIG. 1, 1.7 is a three-terminal semiconductor magnetoresistive element (hereinafter referred to as a magnetoresistive element) incorporating a magnet.
この磁気抵抗素子17の端子18a〜18cのうち、磁気抵抗素
子17の両端の端子18a,18cはそれぞれ電源端子19,20に接
続されている。電源端子19は＋Ｅの電圧を発生してお
り、電源端子20は−Ｅの電圧を発生している。Of the terminals 18a to 18c of the magnetoresistive element 17, the terminals 18a and 18c at both ends of the magnetoresistive element 17 are connected to power supply terminals 19 and 20, respectively. The power supply terminal 19 generates a voltage of + E, and the power supply terminal 20 generates a voltage of -E.
この電源端子19と20との間に抵抗21a,21bが直列に接続
されている。抵抗21a,21bは磁気抵抗素子17とブリッジ
回路を構成している。Resistors 21a and 21b are connected in series between the power supply terminals 19 and 20. The resistors 21a and 21b form a bridge circuit with the magnetoresistive element 17.
抵抗21aと21bとの接続点には、基準電圧を発生するよう
になっており、この接続点はオペレーショナルアンプに
よる差動増幅器16の（＋）入力端子に接続されている。A reference voltage is generated at the connection point between the resistors 21a and 21b, and this connection point is connected to the (+) input terminal of the differential amplifier 16 which is an operational amplifier.
差動増幅器16の（−）入力端子には、磁気抵抗素子17の
中点より導出される３端子18cが接続されている。差動
増幅器16の出力端子には、出力電圧E0を発生するように
なっている。The (−) input terminal of the differential amplifier 16 is connected to the three terminal 18c derived from the midpoint of the magnetoresistive element 17. An output voltage E 0 is generated at the output terminal of the differential amplifier 16.
差動増幅器16の（−）入力端子と出力端子間には、負特
性サーミスタ12と、正特性リニアサーミスタ11と、調整
用抵抗13との直列回路が接続されている。A series circuit of a negative characteristic thermistor 12, a positive characteristic linear thermistor 11, and an adjusting resistor 13 is connected between the (−) input terminal and the output terminal of the differential amplifier 16.
また、正特性リニアサーミスタ11と負特性サーミスタ12
にそれぞれ並列に調整用抵抗14,15が接続されている。In addition, positive characteristic linear thermistor 11 and negative characteristic thermistor 12
The adjusting resistors 14 and 15 are connected in parallel with each other.
これらの正特性リニアサーミスタ11、負特性サーミスタ
12、調整用抵抗13〜15は差動増幅器16の帰還抵抗をなし
ている。These positive characteristic linear thermistors 11 and negative characteristic thermistors
12, the adjusting resistors 13 to 15 are feedback resistors of the differential amplifier 16.
次に、動作について説明する。磁気抵抗素子17の中点の
端子18cの電圧と基準電圧が差動増幅器16に入力され、
そこで両者の偏差をとって出力E0が出力される。このと
き、磁気抵抗素子17の周囲温度は正特性リニアサーミス
タ11と負特性サーミスタ12とにより検出されている。Next, the operation will be described. The voltage of the terminal 18c at the midpoint of the magnetoresistive element 17 and the reference voltage are input to the differential amplifier 16,
Therefore, the difference between the two is taken and the output E 0 is output. At this time, the ambient temperature of the magnetoresistive element 17 is detected by the positive characteristic linear thermistor 11 and the negative characteristic thermistor 12.
ところで、磁気抵抗素子17の出力の一般的な温度特性は
第２図に示すように、磁石の位置Ｘによって一様な比で
出力感度が変化している。By the way, in the general temperature characteristic of the output of the magnetoresistive element 17, as shown in FIG. 2, the output sensitivity changes at a uniform ratio depending on the position X of the magnet.
この温度特性に合う正特性リニアサーミスタ11と、負特
性サーミスタ12を組み合わせることにより、差動増幅器
16にて磁気抵抗素子17の出力の温度変化を相殺する。By combining the positive characteristic linear thermistor 11 and negative characteristic thermistor 12 that match this temperature characteristic, a differential amplifier
At 16, the temperature change of the output of the magnetoresistive element 17 is offset.
調整用抵抗13,14は正特性リニアサーミスタ11に接続
し、第３図のように、20℃での抵抗値は変えずに、温度
勾配を調整する。The adjusting resistors 13 and 14 are connected to the positive characteristic linear thermistor 11 to adjust the temperature gradient without changing the resistance value at 20 ° C. as shown in FIG.
また、調整用抵抗15は負特性サーミスタ12と並列に接続
して温度勾配を調整する。Further, the adjusting resistor 15 is connected in parallel with the negative characteristic thermistor 12 to adjust the temperature gradient.
このようにして、低温，高温それぞれで差動増幅器16の
ゲインを変え、補正量を調整でき、磁気抵抗素子17の出
力の温度バラツキに対応可能となる。In this way, the correction amount can be adjusted by changing the gain of the differential amplifier 16 at each of the low temperature and the high temperature, and it becomes possible to cope with the temperature variation of the output of the magnetoresistive element 17.
以上のように、この考案によれば、二つの抵抗とブリッ
ジ回路を構成する３端子の磁気抵抗素子の出力電圧と基
準電圧との偏差を差動増幅器でとるとともに、磁気抵抗
素子の出力を正特性リニアサーミスタと、負特性サーミ
スタで補正するように構成したので、サーミスタを用い
て安価な３端子構造の磁気抵抗素子の出力電圧を周囲温
度の変化に対して安定化することが可能となる効果があ
る。As described above, according to the present invention, the difference between the output voltage of the three-terminal magnetoresistive element forming the bridge circuit and the two resistors and the reference voltage is taken by the differential amplifier, and the output of the magnetoresistive element is positive. Since the characteristic linear thermistor and the negative characteristic thermistor are used for correction, it is possible to stabilize the output voltage of the inexpensive magnetoresistive element with a three-terminal structure using the thermistor against changes in ambient temperature. There is.
第１図はこの考案の一実施例による温度補正回路の回路
図、第２図は同上実施例における磁気抵抗素子の出力電
圧の温度特性図、第３図は同上実施例における正特性リ
ニアサーミスタと負特性サーミスタと調整用抵抗の合成
抵抗による帰還抵抗の温度特性図、第４図は磁気抵抗素
子の一例を示す斜視図、第５図は磁石と第４図の磁気抵
抗素子との関係を示す斜視図、第６図は従来の磁気抵抗
素子を用いた回路図である。 11…正特性リニアサーミスタ、12…負特性サーミスタ、
13〜15…調整用抵抗、16…差動増幅器、17…磁気抵抗素
子、18a〜18c…端子、21a,21b…抵抗。 なお、図中、同一符号は同一、又は相当部分を示す。FIG. 1 is a circuit diagram of a temperature correction circuit according to an embodiment of the present invention, FIG. 2 is a temperature characteristic diagram of an output voltage of a magnetoresistive element in the same embodiment, and FIG. 3 is a positive characteristic linear thermistor in the same embodiment. FIG. 4 is a perspective view showing an example of a magnetoresistive element, FIG. 5 is a perspective view showing an example of a magnetoresistive element, and FIG. 5 is a relationship between a magnet and the magnetoresistive element shown in FIG. FIG. 6 is a perspective view and a circuit diagram using a conventional magnetoresistive element. 11… Positive characteristic linear thermistor, 12… Negative characteristic thermistor,
13 to 15 ... Adjustment resistors, 16 ... Differential amplifiers, 17 ... Magnetoresistive elements, 18a-18c ... Terminals, 21a, 21b ... Resistors. In the drawings, the same reference numerals indicate the same or corresponding parts.
Claims (1)
磁石を含む３端子半導体磁気抵抗素子と、この３端子半
導体磁気抵抗素子の出力電圧と基準電圧の偏差をとる差
動増幅器と、この差動増幅器の入力端子と出力端子間に
接続され正特性リニアサーミスタと負特性サーミスタお
よび調整用抵抗とにより構成され、上記３端子半導体磁
気抵抗素子の出力の温度バラツキを補正する帰還抵抗と
を備えた温度補正回路。1. A three-terminal semiconductor magnetoresistive element which comprises two resistors and a bridge circuit and which includes a magnet, a differential amplifier which obtains a deviation between an output voltage of the three-terminal semiconductor magnetoresistive element and a reference voltage, and The differential amplifier is connected between the input terminal and the output terminal and is composed of a positive characteristic linear thermistor, a negative characteristic thermistor, and an adjusting resistor, and is provided with a feedback resistor for correcting the temperature variation of the output of the three-terminal semiconductor magnetoresistive element. Temperature correction circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989098084U JPH0719019Y2 (en) | 1989-08-23 | 1989-08-23 | Temperature correction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989098084U JPH0719019Y2 (en) | 1989-08-23 | 1989-08-23 | Temperature correction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0336979U JPH0336979U (en) | 1991-04-10 |
| JPH0719019Y2 true JPH0719019Y2 (en) | 1995-05-01 |
Family
ID=31647201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989098084U Expired - Lifetime JPH0719019Y2 (en) | 1989-08-23 | 1989-08-23 | Temperature correction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0719019Y2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007050190A (en) * | 2005-08-19 | 2007-03-01 | Takashi Kinoshita | Golf form correcting device |
| JP2007301315A (en) * | 2006-05-08 | 2007-11-22 | Yutaka Maeda | Expander |
| JP4914502B2 (en) * | 2008-01-08 | 2012-04-11 | アルプス電気株式会社 | Magnetic sensor and magnetic encoder |
| WO2009119471A1 (en) * | 2008-03-25 | 2009-10-01 | アルプス電気株式会社 | Magnetic sensor and magnetic encoder |
-
1989
- 1989-08-23 JP JP1989098084U patent/JPH0719019Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0336979U (en) | 1991-04-10 |
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