JPH07201603A - Electrode structure for electronic device and its formation - Google Patents
Electrode structure for electronic device and its formationInfo
- Publication number
- JPH07201603A JPH07201603A JP33807693A JP33807693A JPH07201603A JP H07201603 A JPH07201603 A JP H07201603A JP 33807693 A JP33807693 A JP 33807693A JP 33807693 A JP33807693 A JP 33807693A JP H07201603 A JPH07201603 A JP H07201603A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- metal layer
- electrode
- electrode structure
- silver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015572 biosynthetic process Effects 0.000 title abstract description 4
- 229910000859 α-Fe Inorganic materials 0.000 claims abstract description 20
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000011521 glass Substances 0.000 claims abstract description 17
- 229910000679 solder Inorganic materials 0.000 claims abstract description 9
- 229910052751 metal Inorganic materials 0.000 claims description 31
- 239000002184 metal Substances 0.000 claims description 31
- 229910052709 silver Inorganic materials 0.000 claims description 12
- 239000004332 silver Substances 0.000 claims description 12
- 239000000696 magnetic material Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 239000011810 insulating material Substances 0.000 claims description 2
- 241000239290 Araneae Species 0.000 abstract 1
- 239000011162 core material Substances 0.000 description 32
- 238000009792 diffusion process Methods 0.000 description 23
- 239000004020 conductor Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 10
- 230000000694 effects Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Manufacturing Cores, Coils, And Magnets (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は電子部品の電極構造およ
びその形成方法に関し、とくに、フェライトなどの磁性
体界面に電極を形成する電子部品の電極構造およびその
形成方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode structure for an electronic component and a method for forming the same, and more particularly to an electrode structure for an electronic component for forming an electrode on the interface of a magnetic material such as ferrite and a method for forming the same.
【0002】[0002]
【従来の技術】従来、チップインダクタなどの電極は、
磁心材のフェライト表面に銀または銀パラジウムを焼付
け、その上に鉛やはんだをめっきした構造であった。図
1はチップインダクタの従来の電極構造の詳細を示す断
面図である。同図において、1はフェライトの磁心、2
は銀パラジウムの第一層、3ははんだの第二層である。
磁心1と第一層2との間には、第一層2を形成する際に
ペースト中に含まれていたガラスがフェライト中に拡散
した拡散層2'が形成される。また、第一層と第二層と
の間には、銀パラジウムとはんだとが拡散した拡散層
3'が形成される。これらの拡散層は、磁心1と電極と
を密着させる作用をもち、その形成状態は電極の強度に
大きく関係する。2. Description of the Related Art Conventionally, electrodes such as chip inductors are
The structure was such that silver or silver palladium was baked on the ferrite surface of the magnetic core material, and lead or solder was plated on it. FIG. 1 is a sectional view showing details of a conventional electrode structure of a chip inductor. In the figure, 1 is a magnetic core of ferrite, 2
Is a first layer of silver palladium and 3 is a second layer of solder.
A diffusion layer 2 ′ is formed between the magnetic core 1 and the first layer 2 in which the glass contained in the paste when forming the first layer 2 is diffused into the ferrite. Further, a diffusion layer 3 ′ in which silver palladium and solder are diffused is formed between the first layer and the second layer. These diffusion layers have a function of bringing the magnetic core 1 and the electrodes into close contact with each other, and the formation state thereof is greatly related to the strength of the electrodes.
【0003】[0003]
【発明が解決しようとする課題】しかし、上記従来例に
おいては、次のような問題点があった。すなわち、従来
の電極構造においては、フェライト中にはガラスだけで
なく銀または銀パラジウムも拡散され、形成された拡散
層2'は、銀または銀パラジウムも含んでポーラスな状
態であった。このため、拡散層2'は本来の性能を発揮
できず、形成された電極はその密着強度が低いため、素
子を構成する導体を電極に接続しようとすると、電極が
剥離するなど作業性が悪かった。However, the above-mentioned conventional example has the following problems. That is, in the conventional electrode structure, not only glass but also silver or silver palladium was diffused into the ferrite, and the diffusion layer 2 ′ thus formed was in a porous state including silver or silver palladium. For this reason, the diffusion layer 2'cannot exhibit its original performance, and the formed electrode has a low adhesion strength. Therefore, when an attempt is made to connect a conductor forming an element to the electrode, the workability such as peeling of the electrode is deteriorated. It was
【0004】[0004]
【課題を解決するための手段】本発明は、前記の課題を
解決することを目的としたもので、前記の課題を解決す
る一手段として、以下の構成を備える。すなわち、磁性
体界面の所定部位に形成した所定厚さの絶縁層と、前記
絶縁層の上に形成した所定厚さの第1の金属層と、前記
第1の金属層の上に形成した所定厚さの第2の金属層と
を有する電子部品の電極構造にする。SUMMARY OF THE INVENTION The present invention is intended to solve the above problems, and has the following structure as one means for solving the above problems. That is, an insulating layer having a predetermined thickness formed at a predetermined portion of the magnetic interface, a first metal layer having a predetermined thickness formed on the insulating layer, and a predetermined metal layer formed on the first metal layer. And an electrode structure of an electronic component having a second metal layer having a thickness.
【0005】また、所定サイズの磁性体界面の所定部位
に所定厚さの絶縁層を形成する絶縁層形成工程と、前記
絶縁層形成工程で形成された絶縁層の上に所定厚さの金
属層を形成する第1の金属層形成工程と、前記第1の金
属層形成工程で形成された金属層の上に該金属層とは異
なる材料で所定厚さの金属層を形成する第2の金属層形
成工程と、を有する電子部品の電極形成方法にする。Further, an insulating layer forming step of forming an insulating layer having a predetermined thickness on a predetermined portion of a magnetic material interface having a predetermined size, and a metal layer having a predetermined thickness on the insulating layer formed in the insulating layer forming step. And a second metal for forming a metal layer having a predetermined thickness on the metal layer formed in the first metal layer forming step, the metal layer being formed of a material different from the metal layer. A method of forming an electrode of an electronic component, comprising: a layer forming step.
【0006】[0006]
【作用】以上の構成によれば、磁性体界面の所定部位に
所定厚さの絶縁層を形成し、その絶縁層の上に所定厚さ
の第1の金属層を形成し、その第1の金属層の上に所定
厚さの第2の金属層を形成した電子部品の電極構造およ
びその形成方法を提供でき、例えば、磁性体に絶縁層の
材料が拡散した拡散層は本来の性能を発揮し、形成され
た電極はその密着強度が高く、素子を構成する導体を電
極に接続する場合に、電極剥離が発生し難く作業性を向
上することができる。According to the above structure, an insulating layer having a predetermined thickness is formed at a predetermined portion of the magnetic material interface, and a first metal layer having a predetermined thickness is formed on the insulating layer. It is possible to provide an electrode structure of an electronic component in which a second metal layer having a predetermined thickness is formed on a metal layer, and a method for forming the electrode structure. For example, a diffusion layer in which a material of an insulating layer is diffused in a magnetic body exhibits original performance. The formed electrode has high adhesion strength, and when a conductor forming an element is connected to the electrode, electrode peeling is unlikely to occur and workability can be improved.
【0007】[0007]
【実施例】以下、本発明にかかる一実施例の電子部品の
電極構造を図面を参照して詳細に説明する。以下、本発
明をフェライト磁心を用いたチップインダクタに適用す
る一実施例を説明するが、本発明は、これに限定される
ものではなく、磁性材料を焼結した磁心または圧粉成形
した磁心(所謂ダストコア)の界面に電極を形成するす
べての電子部品に適用できる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The electrode structure of an electronic component according to one embodiment of the present invention will be described in detail below with reference to the drawings. Hereinafter, an example in which the present invention is applied to a chip inductor using a ferrite magnetic core will be described, but the present invention is not limited to this, and a magnetic core obtained by sintering a magnetic material or a magnetic core formed by powder compacting ( It can be applied to all electronic components that form electrodes on the interface of a so-called dust core.
【0008】図2は本実施例のチップインダクタの形状
例を示す斜視図、図3は図2のA-A矢視断面図である。
同図において、11は磁心で、例えばNi-Zi系やMn-Zn系
の所定透磁率のフェライトからなる。12は電極で、そ
の詳細は後述するが、磁心11の両端部に形成されてい
る。FIG. 2 is a perspective view showing an example of the shape of the chip inductor of this embodiment, and FIG. 3 is a sectional view taken along the line AA of FIG.
In the figure, reference numeral 11 denotes a magnetic core, which is made of, for example, a Ni-Zi-based or Mn-Zn-based ferrite having a predetermined magnetic permeability. Reference numeral 12 denotes an electrode, which will be described later in detail, but is formed at both ends of the magnetic core 11.
【0009】13は導体で、所定断面積の銅帯や平角銅
線などからなり、磁心11の二つの孔11aを貫通し
て、その両端は電極12それぞれとはんだ付け,溶接あ
るいは導電性接着剤により接続されている。なお、導体
13の断面積は許容電流値や抵抗値から決定されるもの
である。また、導体13の断面は略円形でもよく、一般
的なマグネットワイヤなども使用できる。さらに、図
2,3においては、二つの孔11aを備えた磁心11の
例を示したが、孔11aの数はインダクタンス値から決
定されるものであり、一つでもあるいは三つ以上でもよ
く、一般に、導体13が孔11aを貫通する数が多いほ
ど大きなインダクタンス値を得ることができる。Reference numeral 13 denotes a conductor, which is composed of a copper strip or a rectangular copper wire having a predetermined cross-sectional area, penetrates through two holes 11a of the magnetic core 11, and both ends thereof are soldered, welded or a conductive adhesive to each of the electrodes 12. Connected by. The cross-sectional area of the conductor 13 is determined from the allowable current value and the resistance value. Moreover, the cross section of the conductor 13 may be substantially circular, and a general magnet wire or the like can also be used. Furthermore, in FIGS. 2 and 3, an example of the magnetic core 11 provided with two holes 11a is shown, but the number of holes 11a is determined from the inductance value, and may be one or three or more, Generally, the larger the number of conductors 13 penetrating the hole 11a, the larger the inductance value can be obtained.
【0010】図4は電極12の詳細な構造例を示す断面
図である。同図において、14は所定厚さのガラスの第
一層、15は所定厚さの銀パラジウムの第二層、16は
所定厚さのはんだの第三層であり、磁心11と第一層1
4との間には、ガラスがフェライト中に拡散した拡散層
14aが形成される。また、第一層と第二層との間に
は、ガラスと銀パラジウムとが拡散した拡散層15aが
形成される。さらに、第二層と第三層との間には、銀パ
ラジウムとはんだとが拡散した拡散層16aが形成され
る。なお、第二層15は銀であってもよく、この場合、
拡散層15aはガラスと銀の拡散層になる。また、第三
層16は鉛であってもよく、この場合、拡散層16aは
銀または銀パラジウムと鉛の拡散層になる。FIG. 4 is a sectional view showing a detailed structural example of the electrode 12. In the figure, 14 is a first layer of glass having a predetermined thickness, 15 is a second layer of silver palladium having a predetermined thickness, and 16 is a third layer of solder having a predetermined thickness.
A diffusion layer 14a in which glass is diffused into the ferrite is formed between the diffusion layer 14a and the glass. A diffusion layer 15a in which glass and silver-palladium are diffused is formed between the first layer and the second layer. Further, a diffusion layer 16a in which silver palladium and solder are diffused is formed between the second layer and the third layer. The second layer 15 may be silver, and in this case,
The diffusion layer 15a becomes a diffusion layer of glass and silver. The third layer 16 may be lead, and in this case, the diffusion layer 16a is a diffusion layer of silver or silver palladium and lead.
【0011】これらの拡散層は、前述したように、磁心
11と電極12とを密着させる作用をもち、その形成状
態は電極の強度に大きく関係する。すなわち、本実施例
の電極構造によれば、磁心11のフェライトの界面にガ
ラスからなる第一層を形成した後、銀または銀パラジウ
ムなどのペーストを塗布して第二層を焼成するので、フ
ェライト中に銀または銀パラジウムが拡散されることは
なく、フェライト中にはガラスだけが拡散された拡散層
14aが形成される。このため、拡散層14aは本来の
性能を発揮して、形成された電極12はその密着強度が
高く、導体13を電極12に接続しようとする際に、電
極剥離が発生し難く作業性を向上することができる。As described above, these diffusion layers have a function of bringing the magnetic core 11 and the electrode 12 into close contact with each other, and the formation state thereof is largely related to the strength of the electrode. That is, according to the electrode structure of the present embodiment, after the first layer made of glass is formed on the interface of the ferrite of the magnetic core 11, the paste such as silver or silver palladium is applied and the second layer is fired. Silver or silver-palladium is not diffused therein, and a diffusion layer 14a in which only glass is diffused is formed in the ferrite. Therefore, the diffusion layer 14a exhibits the original performance, the formed electrode 12 has high adhesion strength, and when the conductor 13 is connected to the electrode 12, electrode peeling is unlikely to occur and workability is improved. can do.
【0012】さらに、磁心11と電極13とは、第一層
14によって電気的に絶縁されるので、電極13と磁心
11との絶縁性を高めることができる。これは、Mn-Zn
系フェライトで磁心11を構成する場合など、磁心11
の材料の比抵抗が比較的小さい場合にとくに有用であ
り、磁心11を介して電極13間に電流が流れるのを防
いで、インダクタのQを向上し損失を低減する効果があ
る。Further, since the magnetic core 11 and the electrode 13 are electrically insulated by the first layer 14, the insulating property between the electrode 13 and the magnetic core 11 can be enhanced. This is Mn-Zn
When the magnetic core 11 is made of ferrite, the magnetic core 11
It is particularly useful when the specific resistance of the material is relatively small, and has the effect of preventing a current from flowing between the electrodes 13 via the magnetic core 11, improving the Q of the inductor and reducing the loss.
【0013】なお、第一層14の形成に用いる材料は、
フェライトなどの磁性体と密着性が良好な絶縁材料であ
ればよく、例えば、SiO_2-Al_2O_3-BaO系の緻密なガラ
スが好ましいが、これに限定されるものではない。次
に、本実施例の製造方法について説明するが、電極形成
に関するペーストの塗布やその焼成、はんだや鉛のめっ
きなどについては周知の技術であるので、その詳細は省
略する。The material used to form the first layer 14 is
Any insulating material having good adhesion to a magnetic substance such as ferrite may be used, and for example, SiO_2-Al_2O_3-BaO-based dense glass is preferable, but the present invention is not limited thereto. Next, the manufacturing method of the present embodiment will be described. The application of the paste for forming the electrode, the firing thereof, the plating of solder and lead, and the like are known techniques, and thus the details thereof will be omitted.
【0014】図5は本実施例の製造工程の一例を示す工
程図である。まず、工程P1でフェライトを所定サイズ
に形成し、工程P2で、所定サイズに形成したフェライ
ト(磁心11)の端部に、ガラスペーストを塗布し焼成
して第一層14を形成し、工程P3で、形成した第一層
14の上に、銀または銀パラジウムのペーストを塗布し
焼成して第二層15を形成し、工程P4で、形成した第
二層15の上に、はんだまたは鉛をめっきして第三層1
6を形成する。FIG. 5 is a process chart showing an example of the manufacturing process of this embodiment. First, in step P1, ferrite is formed to a predetermined size, and in step P2, glass paste is applied to the end portion of the ferrite (magnetic core 11) formed to a predetermined size and fired to form the first layer 14, and step P3 Then, a paste of silver or silver-palladium is applied on the formed first layer 14 and fired to form a second layer 15, and in Step P4, solder or lead is added on the formed second layer 15. Plate the third layer 1
6 is formed.
【0015】続いて、工程P5で、複数の磁心11に同
時に電極形成を行った場合は、各磁心11を分割する。
図6はその様子を示す概略図で、短冊状のフェライト1
7の対向する端部に電極12を形成し、その後、カッタ
などで切断して一つ一つの磁心11に分割する。なお、
磁心11一つ一つに電極を形成することも可能であり、
この場合、工程P5は不要である。Then, in step P5, when electrodes are simultaneously formed on a plurality of magnetic cores 11, each magnetic core 11 is divided.
FIG. 6 is a schematic diagram showing the state, and a strip-shaped ferrite 1
Electrodes 12 are formed at the opposite ends of 7 and then cut by a cutter or the like to divide each magnetic core 11. In addition,
It is also possible to form electrodes on each of the magnetic cores 11,
In this case, the process P5 is unnecessary.
【0016】続いて、工程P6で、孔11aを貫通して
導体13を取付けて、その両端を電極12へ接続する。
続いて、工程P7で、磁心11の表面に印刷するなどに
よって、インダクタンスや製品番号などをマーキング
し、最後に、工程P8で検査を実施してインダクタが完
成する。Then, in step P6, the conductor 13 is attached through the hole 11a and both ends thereof are connected to the electrode 12.
Subsequently, in step P7, the inductance, the product number, etc. are marked by printing on the surface of the magnetic core 11, and finally, in step P8, inspection is performed to complete the inductor.
【0017】このように、本実施例によれば、磁心の界
面にガラスからなる第一層を形成した後、銀または銀パ
ラジウムなどのペーストを塗布して第二層を焼成するの
で、フェライト中に銀または銀パラジウムが拡散される
ことはなく、フェライト中にはガラスだけが拡散された
拡散層が形成される。このため、その拡散層は本来の性
能を発揮して、形成された電極の密着強度を高くする効
果があり、導体を電極に接続しようとする際に、電極剥
離が発生し難く作業性を向上することができる。As described above, according to this embodiment, since the first layer made of glass is formed on the interface of the magnetic core, the paste such as silver or silver palladium is applied and the second layer is fired. No silver or silver-palladium is diffused into the ferrite, and a diffusion layer in which only glass is diffused is formed in the ferrite. Therefore, the diffusion layer has the effect of exerting its original performance and increasing the adhesion strength of the formed electrode, and when attempting to connect the conductor to the electrode, electrode peeling is less likely to occur and workability is improved. can do.
【0018】さらに、本実施例によれば、磁心と電極と
は第一層によって電気的に絶縁され、電極と磁心との絶
縁性を高めることができるので、磁心を介して電極間に
電流が流れるのを防ぎ、インダクタのQを向上し損失を
低減する効果がある。Further, according to the present embodiment, the magnetic core and the electrode are electrically insulated by the first layer, and the insulating property between the electrode and the magnetic core can be enhanced, so that a current flows between the electrodes via the magnetic core. It has the effect of preventing the current from flowing, improving the Q of the inductor and reducing the loss.
【0019】[0019]
【発明の効果】以上、本発明によれば、磁性体界面の所
定部位に所定厚さの絶縁層を形成し、その絶縁層の上に
所定厚さの第1の金属層を形成し、その第1の金属層の
上に所定厚さの第2の金属層を形成した電子部品の電極
構造およびその形成方法を提供でき、例えば、磁性体に
絶縁層の材料が拡散した拡散層は本来の性能を発揮し、
形成された電極の密着強度を高くする効果があるので、
素子を構成する導体を電極に接続する場合に、電極剥離
が発生し難く作業性を向上することができる。As described above, according to the present invention, an insulating layer having a predetermined thickness is formed at a predetermined portion of a magnetic material interface, and a first metal layer having a predetermined thickness is formed on the insulating layer. It is possible to provide an electrode structure of an electronic component in which a second metal layer having a predetermined thickness is formed on a first metal layer, and a method for forming the electrode structure. For example, a diffusion layer in which a material of an insulating layer is diffused in a magnetic body is an original structure. Demonstrate the performance,
Since it has the effect of increasing the adhesion strength of the formed electrode,
When a conductor forming an element is connected to an electrode, electrode peeling is less likely to occur and workability can be improved.
【図1】チップインダクタの従来の電極構造の詳細を示
す断面図である。FIG. 1 is a cross-sectional view showing details of a conventional electrode structure of a chip inductor.
【図2】本発明にかかる一本実施例の電子部品の電極構
造を適用するチップインダクタの形状例を示す斜視図で
ある。FIG. 2 is a perspective view showing a shape example of a chip inductor to which an electrode structure of an electronic component of one embodiment according to the present invention is applied.
【図3】図2のA-A矢視断面図である。FIG. 3 is a sectional view taken along the line AA of FIG.
【図4】図2の電極の詳細な構造例を示す断面図であ
る。FIG. 4 is a cross-sectional view showing a detailed structural example of the electrode of FIG.
【図5】図2のチップインダクタの製造工程の一例を示
す工程図である。5A to 5C are process drawings showing an example of a manufacturing process of the chip inductor of FIG.
【図6】複数の磁心に同時に電極形成を行った場合に、
図5の工程P5において各磁心に分割する様子を示す概
略図である。FIG. 6 shows a case where electrodes are simultaneously formed on a plurality of magnetic cores,
It is a schematic diagram showing signs that each magnetic core is divided in process P5 of Drawing 5.
11 磁心 12 電極 13 導体 14 第一層 14a 拡散層 15 第二層 15a 拡散層 16 第三層 16a 拡散層 11 magnetic core 12 electrode 13 conductor 14 first layer 14a diffusion layer 15 second layer 15a diffusion layer 16 third layer 16a diffusion layer
Claims (7)
さの絶縁層と、 前記絶縁層の上に形成した所定厚さの第1の金属層と、 前記第1の金属層の上に形成した所定厚さの第2の金属
層とを有することを特徴とする電子部品の電極構造。1. An insulating layer having a predetermined thickness formed at a predetermined portion of a magnetic material interface, a first metal layer having a predetermined thickness formed on the insulating layer, and a first metal layer formed on the first metal layer. An electrode structure for an electronic component, comprising: the formed second metal layer having a predetermined thickness.
徴とする請求項1に記載の電子部品の電極構造。2. The electrode structure for an electronic component according to claim 1, wherein the magnetic body is ferrite.
好な絶縁材料で形成することを特徴とする請求項1また
は請求項2に記載の電子部品の電極構造。3. The electrode structure of an electronic component according to claim 1, wherein the insulating layer is formed of an insulating material having a good adhesiveness with the magnetic body.
徴とする請求項1または請求項2に記載の電子部品の電
極構造。4. The electrode structure of the electronic component according to claim 1, wherein the insulating layer is made of glass.
ムによって形成することを特徴とする請求項1に記載の
電子部品の電極構造。5. The electrode structure of an electronic component according to claim 1, wherein the first metal layer is formed of silver or silver palladium.
って形成することを特徴とする請求項1に記載の電子部
品の電極構造。6. The electrode structure for an electronic component according to claim 1, wherein the second metal layer is formed of lead or solder.
定厚さの絶縁層を形成する絶縁層形成工程と、 前記絶縁層形成工程で形成された絶縁層の上に所定厚さ
の金属層を形成する第1の金属層形成工程と、 前記第1の金属層形成工程で形成された金属層の上に該
金属層とは異なる材料で所定厚さの金属層を形成する第
2の金属層形成工程と、を有することを特徴とする電子
部品の電極形成方法。7. An insulating layer forming step of forming an insulating layer of a predetermined thickness on a predetermined portion of a magnetic body interface of a predetermined size, and a metal layer of a predetermined thickness on the insulating layer formed in the insulating layer forming step. A first metal layer forming step of forming a metal layer, and a second metal forming a metal layer having a predetermined thickness on the metal layer formed in the first metal layer forming step with a material different from the metal layer. And a step of forming a layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33807693A JP3476887B2 (en) | 1993-12-28 | 1993-12-28 | Method of forming coil component and electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33807693A JP3476887B2 (en) | 1993-12-28 | 1993-12-28 | Method of forming coil component and electrode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07201603A true JPH07201603A (en) | 1995-08-04 |
| JP3476887B2 JP3476887B2 (en) | 2003-12-10 |
Family
ID=18314683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33807693A Expired - Lifetime JP3476887B2 (en) | 1993-12-28 | 1993-12-28 | Method of forming coil component and electrode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3476887B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1207539A1 (en) * | 2000-11-18 | 2002-05-22 | Joseph M.E. Hsu | Glazing covered ferrite core electrode terminal of a surface mounting inductor |
| JP2013045926A (en) * | 2011-08-25 | 2013-03-04 | Taiyo Yuden Co Ltd | Electrode electrode forming method |
| JP2017017366A (en) * | 2016-10-27 | 2017-01-19 | 太陽誘電株式会社 | Electronic components |
-
1993
- 1993-12-28 JP JP33807693A patent/JP3476887B2/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1207539A1 (en) * | 2000-11-18 | 2002-05-22 | Joseph M.E. Hsu | Glazing covered ferrite core electrode terminal of a surface mounting inductor |
| JP2013045926A (en) * | 2011-08-25 | 2013-03-04 | Taiyo Yuden Co Ltd | Electrode electrode forming method |
| JP2017017366A (en) * | 2016-10-27 | 2017-01-19 | 太陽誘電株式会社 | Electronic components |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3476887B2 (en) | 2003-12-10 |
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