JPH07201977A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) [Summary] [Object] In a semiconductor device for element isolation using a field shield method, a semiconductor device capable of removing heavy metal impurities contained in a silicon substrate and preventing element characteristic deterioration, and The manufacturing method is provided. A field shield electrode film of polycrystalline silicon is formed on the surface of a semiconductor substrate via an insulating film so as to surround the impurity diffusion region formed in the element isolation region, and the electrode film is in direct contact with the impurity diffusion region. And 700
Since the heavy metal element in the silicon substrate is gettered to the polycrystalline silicon thin film (field shield electrode film) by performing the heat treatment at ℃ or higher, there is no concern that the heavy metal element remains in the silicon substrate after the element is completed, The characteristics of the device are improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for element isolation by a field shield method and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, a device isolation method called a field shield method has attracted attention. This is an effective method for cutting off the potential of the parasitic transistor by fixing the field shield (gate) electrode to GND or Vcc, and it is possible to narrow the interval between the active regions, thus reducing the size of the semiconductor device. Has been attracting attention as a material suitable for commercialization (for example, IEDM-88 P246
~reference).

FIG. 5 shows a MOS transistor structure to which field shield element isolation according to the conventional method is applied.
In this structure, first, a field shield oxide film 22 having a thickness of 50 nm is formed on a silicon substrate 21, and then 1E12io is formed by an ion implantation method in order to adjust a threshold value between a transistor 23 in an active region and a parasitic MOS transistor in an element isolation region.
Under the condition of ns / cm ² , boron ions are added to the oxide film 22.
To introduce. Then, the field shield electrode 24 is formed of phosphorus-doped polycrystalline silicon so as to have a film thickness of 200 nm, and then the gate oxide film 25 and the gate electrode 26 of the transistor 23 are formed.

This field shield electrode 24 is connected to GND
By fixing the active transistors 23 adjacent to each other, the transistor formed between the source / drain of the active transistors 23 adjacent to each other does not turn on, and the elements can be appropriately isolated.

[0005]

However, unlike the case of using the known LOCOS method, for example, when the conventional field shield method is used, heavy metal impurity elements such as Fe contained in the silicon substrate are adsorbed, That is, since there is no gettering layer and no step capable of gettering, this impurity element remains in the silicon substrate even after the completion of the fabrication of the semiconductor device, resulting in deterioration of transistor characteristics such as increase in junction leakage current. It was one of the important factors of the yield reduction.

Therefore, the present invention is a semiconductor device for element isolation using the field shield method, which is capable of removing heavy metal impurities contained in a silicon substrate and preventing deterioration of the characteristics of the element, and the same. It is intended to provide a manufacturing method.

[0007]

In order to solve the above-mentioned problems, according to the present invention, a field shield electrode film made of a thin film of polycrystalline silicon provided on the surface of an element isolation region of a semiconductor substrate via an insulating film. And a window formed in the insulating film on the impurity diffusion region of the element isolation region, the field shield electrode film having the window. It is characterized in that the potential of the surface of the semiconductor substrate in the element isolation region is controlled by directly contacting the impurity diffusion region with the potential of the field shield electrode film fixed to a predetermined value. And a field shield electrode film made of a polycrystalline silicon thin film provided on the surface of an element isolation region of a semiconductor substrate via an insulating film, An impurity diffusion region formed in an appropriate position of the child isolation region, and a window formed in the insulating film on the impurity diffusion region of the element isolation region, wherein the field shield electrode film is formed through the window. In the method of manufacturing a semiconductor device, which directly contacts the impurity diffusion region and controls the potential of the surface of the semiconductor substrate in the element isolation region by fixing the potential of the field shield electrode film to a predetermined value, Provided is a method for manufacturing a semiconductor device, which comprises a step of performing a heat treatment at 700 ° C. or higher on the entire substrate after forming a field shield electrode film.

[0008]

It is known that polycrystalline silicon is suitable for gettering heavy metal elements in a silicon substrate. A field shield electrode film is formed so as to surround the impurity diffusion region with this polycrystalline silicon, and the field shield electrode film is further brought into direct contact with the impurity diffusion region. When the heat treatment is performed at a temperature of ℃ or more, the heavy metal element in the silicon substrate is gettered to the field shield electrode film (polycrystalline silicon thin film) from the contact portion between the substrate and the field shield electrode film, so that the transistor is formed in the active region. The heavy metal element in the silicon substrate disappears after the formation of, and the characteristics of the element are not deteriorated.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 is a plan view showing essential parts of a MOS transistor and an element isolation region of a DRAM memory cell to which the present invention is applied. As shown in FIG. 2 taken along line II-II of FIG. 1 and FIG. 3 taken along line III-III of FIG. 1, a gate oxide film is formed in the active region 2 on the surface of the P-type silicon substrate 1. Gate electrode 4 through 3
Are formed. Further, n-type impurity diffusion regions 5 are provided as impurity diffusion layers on the left and right sides of the figure with the gate oxide film 3 and the gate electrode 4 interposed therebetween. These gate oxide film 3, gate electrode 4, n-type impurity diffusion region 5
A MOS transistor is constituted by.

On the other hand, the impurity diffusion regions 8 of other MOS transistors are adjacent to the n-type impurity diffusion regions 5 with the element isolation region 7 interposed therebetween. Further, in the element isolation region 7 on the surface of the P-type silicon substrate 1, a field shield electrode film 10 made of a thin film of polycrystalline silicon is formed via an oxide insulating film 9. Further, an impurity diffusion region 11 is formed at a proper position in the element isolation region 7, and a window 9a is formed in the oxide insulating film 9 above it. That is, the field shield electrode film 10 is formed so as to surround the impurity diffusion region 11. The field shield electrode film 10 is also in direct contact with and connected to the impurity diffusion region 11. As a result, a deformable transistor having the impurity diffusion region 11 as the source / drain and the periphery thereof as the gate is formed.

Here, the P-type silicon substrate 1 has a voltage of 1/2 Vc.
The field shield electrode 10 is connected to the c (-2.5V) potential, and the field shield electrode 10 is connected to the GND by a contact portion (not shown).
Connected to the electric potential. Therefore, the deformation transistor in the element isolation region 7 does not turn on, and even if the field shield electrode film 10 directly contacts the surface of the P-type silicon substrate 1, there is no concern that current will flow from the electrode to the substrate.

FIG. 4 shows a manufacturing procedure of the semiconductor device in this embodiment. First, the oxide insulating film 9 is formed to a thickness of 50 nm on the P-type silicon substrate 1 by thermal oxidation, and the window 9a is formed by photolithography and dry etching. After that, a polycrystalline silicon thin film is formed into 200 by low pressure CVD.
Then, the field shield electrode 10 is patterned by photolithography and dry etching. Here, the field shield electrode 10 is phosphorus,
It contains impurities such as boron or As. Next, the insulating film in the active region 2 is removed by wet etching using HF, and the gate oxide film 3 is formed by thermal oxidation so as to have a thickness of 15 nm. Then, after forming a polycrystalline silicon thin film to a thickness of 300 nm by the low pressure CVD method,
The gate electrode 5 is patterned by photolithography and dry etching. The polycrystalline silicon thin film contains impurities such as phosphorus, boron or As.
After that, 1E15ions of As is obtained by the ion implantation method.
/ Cm ² is introduced into the P-type silicon substrate 1 and heat treatment is performed at 85
The n-type impurity layer 8 is formed by performing the treatment at 0 ° C. for 90 minutes. After that, capacitors, various wirings, etc. are formed, and the semiconductor device is completed (not shown).

Here, in the heat treatment at 850 ° C. for 90 minutes and the thermal oxidation step when forming the gate oxide film 3, P
Since the heavy metal element in the silicon substrate 1 is gettered to the field shield electrode 10 made of a polycrystalline silicon thin film and removed from the substrate 1, the characteristics of the element (MOS transistor) are not deteriorated. Further, an impurity for improving conductivity is introduced into the field shield electrode 10. However, since this impurity naturally diffuses into the impurity diffusion region 11 at the time of heat treatment or the like, it is not necessary to perform a process for introducing the impurity. Is also good.

Amorphous silicon may be used instead of the polycrystalline silicon thin film which is the field shield electrode 10.

[0016]

As is apparent from the above description, according to the semiconductor device and the method of manufacturing the same according to the present invention, the insulating film is provided on the surface of the semiconductor substrate so as to surround the impurity diffusion region formed in the element isolation region. By forming a field shield electrode film of polycrystalline silicon by directly contacting the electrode film with the impurity diffusion region and performing a heat treatment at 700 ° C. or higher, the heavy metal element in the silicon substrate becomes a polycrystalline silicon thin film ( Since gettering is performed on the field shield electrode film), there is no concern that a heavy metal element remains in the silicon substrate after the element is completed, and the characteristics of the semiconductor device are improved. Since the heat treatment for gettering may be a heat treatment at 700 ° C. or higher, for example, a heat treatment for forming an n-type impurity layer, a heat treatment for forming an insulating layer, or the like, a field shield made of a polycrystalline silicon thin film. All the treatments after the electrode formation are effective, and the combined use thereof does not increase the man-hours.

[Brief description of drawings]

FIG. 1 is an MO of a DRAM memory cell to which the present invention is applied.
FIG. 6 is a plan view showing a main part of an S transistor and an element isolation region.

FIG. 2 is a sectional view taken along line II-II in FIG.

FIG. 3 is a sectional view taken along line III-III in FIG.

FIG. 4 is a process diagram showing a manufacturing procedure of the semiconductor device of FIG.

5 is a sectional view similar to FIG. 2 showing the structure of a conventional semiconductor device.

[Explanation of symbols]

 1 P-type silicon substrate 2 Active region 3 Gate oxide film 4 Gate electrode 5 n-type impurity diffusion region 7 Element isolation region 8 Impurity diffusion region of another MOS transistor 9 Oxide insulating film 9a window 10 Field shield electrode 11 Impurity diffusion region 21 Silicon Substrate 22 Field shield oxide film 23 Transistor 24 Field shield electrode 25 Gate oxide film 26 Gate electrode

Claims (3)

[Claims] 1. A field shield electrode film made of a thin film of polycrystalline silicon provided on the surface of an element isolation region of a semiconductor substrate with an insulating film interposed therebetween, and an impurity diffusion region formed at an appropriate position of the element isolation region, A window formed in the insulating film on the impurity diffusion region of the element isolation region, the field shield electrode film is in direct contact with the impurity diffusion region through the window, A semiconductor device characterized in that the potential of the surface of the semiconductor substrate in the element isolation region is controlled by fixing the potential to a predetermined value. 2. The semiconductor device according to claim 1, wherein the field shield electrode film is fixed to a ground potential. 3. A field shield electrode film made of a thin film of polycrystalline silicon provided on the surface of an element isolation region of a semiconductor substrate with an insulating film interposed therebetween, and an impurity diffusion region formed at an appropriate position of the element isolation region, A window formed in the insulating film on the impurity diffusion region of the element isolation region, the field shield electrode film is in direct contact with the impurity diffusion region through the window, In a method of manufacturing a semiconductor device in which the potential of the surface of the semiconductor substrate in the element isolation region is controlled by fixing the potential to a predetermined value, 700 ° C. is formed on the entire substrate after forming the field shield electrode film. A method of manufacturing a semiconductor device, comprising the above heat treatment process.