JPH0720573U - Voltage monitoring circuit - Google Patents

Abstract

(57) [Summary] [Purpose] To provide a voltage monitoring circuit having snap characteristics and hysteresis characteristics while saving power. [Configuration] The monitored voltage across the series circuit of the transistors Q ₂₀ to Q ₂₂ and a plurality of resistors R ₁₈ to R ₂₄ for generating a constant voltage is applied, each other the current density voltage across the one resistor R ₂₂ It is applied to the input of a comparator consisting of a differential amplifier composed of different first and second transistors Q ₂₅ and Q _26, and an offset input voltage of a differential voltage is generated between the bases of the two transistors, which causes The comparator output is inverted according to the change of the monitoring voltage. When the monitored voltage is n times the voltage corresponding to the Si energy band gap, the output of the comparator is inverted.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a voltage monitoring circuit, which detects an initial reset when power is turned on in a CPU system, a logic system, or the like and an abnormal power supply voltage at a momentary power interruption, and resets the system accurately. The present invention relates to a voltage monitoring circuit.

[0002]

[Prior art]

FIG. 10 shows a conventional voltage monitoring circuit. V _CC is a power supply to be measured, and this power supply is used as a power supply for a CPU, for example. A detection circuit is composed of the Zener diode D ₁ , the resistors R _{1 to} R ₄ and the transistors Q _{1 to} Q ₄ . This detection circuit is a circuit for setting a reset voltage for the power supply V _CC for outputting a reset signal from the transistors Q ₁ and Q _{2 which} will be described later and detecting it when the voltage V _CC drops.

The transistor Q ₅ and the resistor R ₅ are turned on / off by the output of the detection circuit in the drive circuit.

The resistors R ₆ and R ₇ and the transistors Q ₆ and Q _{7 form} an output circuit and are controlled by the output of Q ₅ of the drive circuit.

FIG. 11 shows the operation timing of the transistor Q ₅ . Voltage of the measured power supply V _CC is, the transistor Q ₅ is turned off in the following (the measured voltage of the constant power supply V _CC when the output circuit Q _6, Q ₇ outputs a reset output) reset voltage V _L, also more It turns on.

FIG. 12 is a diagram showing the relationship between the current consumption I of the voltage monitoring circuit, the voltage of the power supply to be measured V _CC , and the operation of the drive transistor Q ₅ , in which Q ₅ is turned on when the reset voltage is V _L or more. And below that it is off. Further, according to this operation, it can be seen that the consumed current (dotted line) is large above _VL and small below that.

[0007]

[Problems to be solved by the device]

Recently, batteries have been used more and more as power sources for CPU systems. From such a relationship, it is desired that each device of the system saves power. Therefore, in the conventional example shown in FIG. 10, the transistor Q ₅ is turned on when the voltage of the power supply to be measured V _CC is equal to or higher than the reset voltage V _{L for} resetting. As a result, the power source V _CC is normal and current flows through Q _{5 of the} voltage monitoring circuit during the operation of the system, which causes a problem that battery consumption is increased accordingly.

Next, when the power supply V _CC drops from the normal value and the reset voltage becomes V _L or less, the detection circuit detects it and turns off Q ₅ , and the output transistors Q ₆ and Q ₇ turn on. Reset signal is output. Since the reset operation when this reset signal is output is slow (does not have a snap characteristic), there is a time delay until the reset output is output after the measured power supply reaches the reset voltage V _L. There was a problem.

Further, since this voltage monitoring circuit does not have a hysteresis characteristic, the reset output _chatters when the measured power source V _CC fluctuates in a short cycle around the reset voltage V _L. There was a problem of causing.

There is also a problem that the transistors and diodes used in the circuit are easily affected by temperature changes, and the detection output of the voltage monitoring circuit becomes unstable with respect to temperature.

[0011] The present invention is intended to solve the above various problems, connect the voltage drop element between the voltage monitoring circuit and the measured power V _CC, measured power V _CC is reset voltage V _L By turning the drive circuit off or on in the above or below, it is possible to save power, have a snap characteristic, a hysteresis characteristic, and provide a stable voltage monitoring circuit against temperature changes. To aim.

[0012]

[Means for Solving the Problems]

The voltage monitoring circuit of the present invention uses a power supply line connected to the power supply to be measured as a power supply, and outputs a switching output that is turned on or off depending on the voltage level of the power supply. The voltage is applied to both ends of a series circuit with a constant voltage element that generates a constant voltage that is n times the forward voltage drop, and the voltage between both ends of any one of the plurality of resistors is the same as the emitter current density. The difference voltage ΔV _BE is applied to the inputs of the differential amplifier composed of different first and second transistors, and the difference of the current densities is caused between the bases of the first and second transistors which are the inputs of the differential amplifier. An offset voltage is generated so that the output of the differential amplifier is inverted according to the change of the voltage, and the voltage across the series circuit of the constant voltage element and a plurality of resistors is the Si energy at absolute zero. When the voltage V _LO is n times the voltage V _go corresponding to the band gap, when the voltage across one of the resistors and the offset voltage of the differential amplifier match, The feature is that the output is inverted.

[0013]

[Action]

According to the present invention, the potential difference between both input terminals when the differential amplifier is balanced and the voltage across the series circuit of the resistor and the diode (transistor) are equivalent to the voltage V corresponding to the energy band gap of Si at absolute zero. By making it equal to the voltage across the resistor that applies a voltage to the input of the differential amplifier when n times _GO , the temperature coefficient of the monitoring voltage for inverting the differential amplifier can be made zero.

[0014]

【Example】

FIG. 1 shows a voltage monitoring circuit according to a first embodiment of the present invention. A resistor R _{8 to} R ₁₀ , a Zener diode D ₂ and a transistor Q _{8 to} Q ₁₁ constitute a detection circuit composed of an operational amplifier, and resistors R ₁₁ and R ₁₂ and a transistor Q ₁₂ which is an amplification element constitute a drive circuit. An output circuit is composed of the transistor Q ₁₃ . 3 is an output terminal, and GND is a ground terminal. R is a resistor connected between the power supply line of the voltage monitoring circuit and the power supply to be measured V _CC .

FIG. 2 shows the operation timing of Q ₁₂ of the circuit shown in FIG. When the voltage of the power supply to be measured V _CC is equal to or lower than the reset start voltage V _L set by the resistors R _{8 to} R ₁₀ and the Zener diode D ₂ of the detection circuit, Q ₁₂ is turned on, and at a steady voltage higher than that, it is turned off. It When V _CC becomes V _L or less, the detection circuit detects it, turns on Q ₁₂ and Q ₁₃ , and outputs a reset signal from the terminal 3. This will be described in more detail with reference to the operation explanatory diagram of FIG. After power V _CC-on, V _CC is Q ₁₂ until the reset voltage V _L rises from zero is on, the current consumption I indicated by the dotted line is highest at the point reaching the V _L rises from zero, V _{When CC} becomes _VL or more, Q ₁₂ is turned off by the detection circuit (solid line), and I suddenly decreases. On the other hand, the case where V _CC decreases from the steady state to V _L or less will be described. Even if V _CC decreases and reaches V _L , Q ₁₂ inverts (does not turn on), and when it reaches the V _L' point, Q ₁₂ inverts (turns on). Correspondingly, the consumption current I rapidly increases with the ON operation of Q ₁₂ at the time of _{VL ′} . Thereafter, I also decreases as V _CC further decreases. Inverted voltage difference to the Q ₁₂ as of this (V _L -V _{L ')} is to be hysteresis characteristics has been granted.

Assuming that the detection voltage of the detection circuit is V _L0 , V _L0 = V _Z2 (1 + R ₈ / R ₉ ) (1) where V _Z2 is the voltage of the Zener diode D ₂ , and V _L is changed from the lower V _CC to the lower V _L. when reaching the and Kino consumption current I _L, the _'current consumption when it reaches I _L' V _L from the direction _{V L = V L0 + R ·} I L (2) V CC is high and, V L _' = V _L0 + R · I _{L ′} (3) Therefore, the hysteresis voltage ΔV _SH becomes ΔV _SH = V _L −V _{L ′} = R (I _L + I _{L ′} ) (4). If I _L >> I _{L '} , ΔV _SH ≈R · I _L.

Next, the positive feedback action in the resistor R, the detection circuit and the drive circuit will be described. When the measured power supply V _CC fluctuates from a steady state to an abnormal state (below V _{L '} ), when V _CC falls below V _L', the base potential of Q ₁₀ drops, which causes the collector potential of Q ₁₁ to drop. Q ₁₂ turns on due to the decrease. Since the operating current I ₁₂ resulting from this flows through the resistor R, the consumption current I also increases. Then, the voltage V _L0 across the resistors R ₈ and R ₉ further decreases, which further lowers the base potential of Q ₁₀ and further increases I ₁₂ of Q ₁₂ . Positive feedback is applied by this repetition. With the above operation, the snap characteristic is added to the switching of Q ₁₂ , and the switching speed of Q ₁₃ is accelerated.

The first embodiment shown in FIG. 1 is a low reset system in which a low level reset signal is output at a reset voltage or lower, but in the next FIG. 4, a high level reset signal is output. 2 shows a high-reset type voltage monitoring circuit (second embodiment of the present invention). Resistance R₁₃~ R₁₅, Zener diode D₃And transistor Q₁₄~ Q ₁₇ The detection circuit is composed of a transistor Q₁₈, Resistance R₁₆, R₁₇The drive circuit is composed of₁₉The output circuit is composed of. Reference numeral 4 represents an output terminal. The basic circuit operation is the same as that of FIG. 1 except that a high-level signal is output from the terminal 4 to the reset output below the reset voltage.

FIG. 5 shows a third embodiment of the present invention. The resistors R _{18 to} R ₂₆ and the transistors Q ₂₀ to Q ₂₇ form a detection circuit, the resistors Q _{27 to} Q ₃₁ and the transistors Q _{28 to} Q ₃₁ form a drive circuit, and the transistor Q ₃₂ forms an output circuit. Has been done. R is a resistor connected between the voltage monitoring circuit and the power supply to be measured V _CC , and 5 is an output terminal.

The current density of the transistors Q ₂₅ and Q ₂₆ forming the differential amplifier is set to 8: 1, for example. As a result, the two inputs of the differential amplifier have an offset voltage of ΔV _BE . The reset detection voltage V _{L0 at which} the output of the detection circuit of the voltage monitoring circuit is inverted, that is, the voltage across the Q _{20 to} Q ₂₂ and the resistors R _{21 to} R ₂₄ corresponds to the Si energy band gap at absolute zero (V It is supposed to be n times that of _go ). Then, when the voltage generated across the resistor R ₂₂ at that time matches the offset input voltage of the differential amplifier (Q ₂₅ , Q ₂₆ ), the output of the differential amplifier is inverted.

FIG. 6 shows a principle circuit diagram for explaining an operation principle diagram of the voltage monitoring circuit according to the present embodiment.

Resistors R ₃ , R ₄ and a diode D are connected in series between the input terminals 10, 20 to which the monitored voltage V _in is applied, and the voltage across R ₄ is the two inputs 70, 70 of the comparator 60. 80 is applied. The power of the comparator 60 may be a power to be monitored voltage V _in, but may be another power supply thereto.

While a normal comparator has a balanced differential input so that the input offset voltage is zero, the comparator 60 of FIG. 6 has the configuration shown in FIG. 90 indicates an amplifier. The emitter area of the transistor Q ₂ to the size of the transistor Q ₁ to ₁ times n, and Q _1, the current density of the _{Q 2 J 1 / J 2 =} n 1, form a comparator having an offset voltage of intentionally [Delta] V _BE is doing.

In this case, the transistor Q₁, Q₂The collector side is changed by changing the load side of_C1, I _C2 The ratio of n₂You can double the relationship. The collector current ratio and the transistor Q₁, Q₂Both area ratios of₁× n₂And comprehensively n₀It is also possible to obtain double the current density.

The base-emitter voltage difference ΔV _BE of the differential transistors Q ₁ and Q ₂ is represented by ΔV _BE = ΔV _BE1 −ΔV _BE2 = kT / qIn (n ₁ ) (5).

Generally, the voltage source V across the diode is_BEIs V_BE= V_g0(1-T / T₀) + V_BE0(T / T₀) + N₁kT / q · In (T ₀ / T) + kT / q · In (I_C/ I_C) (6) is represented.

Here, V _g0 is a voltage corresponding to the Si energy band gap at absolute zero, q is an electron charge, k is a Boltzmann constant, T is an absolute temperature, T ₀ is a reference operating temperature, and I _C = I _C0 (at _{T = T 0) V bE =} V BE0 is _{(T = T 0, I C} = I C0). By the way, n ₁ kT / q · In (T ₀ / T) + kT / q · In (I _C / I _C0 ) has a small deviation from the theoretical expression and can be ignored. Therefore, V _BE ≈V _g0 (1-T / T ₀ ) + V _BE0 (T / T ₀ ) (7) Now, the voltage Vinoffset of the monitored voltage V _in which the comparator inverts in FIG. 6 is both ends of the resistor R ₄ . Is when the voltage of is equal to ΔV _BE . When the input current of the comparator 60 is neglected (actually, this current can be ignored because it is a minimum), Vinoffset is expressed by Vinoffset = (1 + R ₃ / R ₄ ) ΔV _BE + V _BE (8).

From equations (8), (5) and (7), Vinoffset≈ (1 + R ₃ / R ₄ ) · kT / q · In (n ₁ ) + V _g0 (1-T / T ₀ ) + V _BE0 (T / T ₀ ) (9) is obtained.

Here, the condition for the temperature coefficient of Vinoffset to become zero can be obtained by making the partial differential of the equation (9) by T zero.

In order that the temperature coefficient of Vinoffset becomes zero, the value obtained by partially differentiating the equation (9) by T becomes zero. Therefore, ∂Vinoffset / ∂T = (1 + R 3 / R 4) · k / q · In (n 1) -V gO / T 0 + V BEO / T 0 = 0 (10) ∴V g0 = (1 + R 3 / R ₄ ) · kT ₀ / q · In (n ₁ ) + V _BE0 (11) On the other hand, the value of Vinoffset at T = T ₀ is Vinoffset = (1 + R ₃ / R ₄ ) · kT ₀ / q · In from the equation (9). (n ₁₎ + V _BE0 and (12) (11) from (12), Vinoffset = V _g0 i.e., if equal to the Vinoffset = V _g0 at the operating temperature, a stable voltage monitoring circuit with respect to temperature changes realizable. At this time, the relationship between the resistances R ₃ , R ₄ and V _BE is ΔV _BE = (V _g0 −V _BE ) · R ₄ / (R ₃ + R ₄ ) (13).

Since there is one diode D in the principle circuit diagram of FIG. 6, only a voltage monitoring circuit with a Vinoffset of 1.2 V can be provided, but in order to obtain a wide range of Vinoffset, the principle of a modified example as shown in FIG. This is easily possible with the circuit diagram configuration. Hereinafter, FIG. 8 will be described. The same components as those in FIG. 6 are designated by the same reference numerals and the description thereof will be omitted. The difference from FIG. 6 is that a plurality of diodes D n _x are provided.

By establishing the relationship ΔV _BE = (V _g0 −V _BE ) R ₄ / (R ₃ + R ₄ ) · n _X / (R ₃ + R ₄ ) (14), Vinoffset = n _X · V _g0 (15) A voltage monitoring circuit that is stable against temperature changes can be created. ΔV _BE is expressed by kT / q · In (n), and normally n is set to 8th place, and ΔV _{BE at} this time is 56mV, which constitutes a sufficiently stable voltage comparison circuit. obtain.

As described above, by using an arbitrary number of diodes D, a desired Vino ffset voltage can be obtained with a simple configuration.

FIG. 9 is a point in which the transistor Q ₃ is connected to the middle point of the series connection of the resistors R ₅ and R ₆ in the diode D portion of FIG. Vinoffset according to this configuration is Vinoffset≈ (1 + R ₃ / R ₄ ) ΔV _BE + K · V _BE (16) where K = 1 + R ₅ / R ₆ . From equations (16), (5), and (7), Vinoffset ≈ (1 + R ₃ / R ₄ ) · kT / q · In (n ₁ ) + KV _g0 (1-T / T ₀ ) + K · V _BE0 ( T / T ₀ ) (17) In order for the temperature coefficient of Vinoffset to become zero, the partial differentiation of Eq. (17) with T becomes zero.

Therefore, ∂Vinoffset / ∂T = (1 + R ₃ / R ₄ ) · k / q · In (n ₁ ) _{−KV g0} / T ₀ + KV _BE0 / T ₀ = 0 (18) ∴KV _g0 = (1 + R ₃ / R ₄ ) kT ₀ / q · In (n ₁ ) + KV _BEO (19) On the other hand, the value of Vinoffset at T = T ₀ is Vinoffset = (1 + R ₃ / R ₄ ) kT / q · In (n) + _{KV BE0} (20) From equations (19) and (20), Vinoffset = KV _g0 (21). That is, from this equation (21), it is possible to select any Vinoffset by selecting K to any value as Vinoffset.

As is clear from the above, the potential difference between both input terminals when the differential amplifiers (Q ₁ , Q ₂ ) are balanced and the voltage across the series circuit of the resistors R ₃ , R ₄ and the diode is S at absolute zero. The temperature coefficient of Vinoffset is zero by making the potential difference between both ends of the resistor R ₄ when n times V _g0 corresponding to the energy bandgap of i is obtained. With such a simple configuration, the conventional reference voltage source can be omitted.

Next, the circuit operation of FIG. 5 will be described. This operation can be explained by referring to FIG. Will be measured power decreases from the voltage of the normal, reaches the reset voltage V _{L ',} the voltage across the resistor R ₁₈ to R ₂₄ and transistor Q ₂₀ to Q ₂₂ is connected to a voltage V _L0 exits the reset detection At the same time, the voltage across R ₂₂ and the input offset voltage of the differential amplifier match, the output of the differential amplifier is inverted, and the transistors Q _{28 to} Q ₃₁ of the drive circuit are turned on, and the transistor Q of the output circuit is turned on. ₃₂ also turns on and outputs a low-level reset signal.

Like the first and second embodiments, the positive feedback action is formed by the resistor R, the differential amplifier of the detection circuit and the amplification element including the transistor of the drive circuit, and the gain of this positive feedback circuit is It is sufficiently larger than 1 and has snap characteristics and hysteresis characteristics.

In the first to third embodiments, the voltage drop element connected between the voltage monitoring circuit and the power supply to be measured V _CC has been described as a resistor, but the present invention is not limited to this. Any element (for example, a diode or the like) that causes a voltage drop due to the current flowing may be used.

In the voltage monitoring circuit according to the present invention described above, the voltage drop element is connected between the power source to be measured and the power supply line serving as the power source of the voltage monitoring circuit, and when the voltage to be measured is in a normal state, the driving circuit is driven. Is turned off and turned on when the voltage drops to an abnormal voltage.Because positive feedback is applied by the voltage drop element, detection circuit and drive circuit, the consumption current is extremely small. Power saving has been achieved. Incidentally, the current consumption (when the power source to be measured is normal) is conventionally 70 to 80 μA, but is reduced to about 10 μA in the embodiment of the present invention. In addition, the snap-back characteristic is given to the drive circuit and the output circuit by the positive feedback action, and the responsiveness to the power supply fluctuation is improved. At the same time, since it has a hysteresis characteristic, it is possible to eliminate the chattering phenomenon of the reset output even when the power supply voltage fluctuates in a short period.

If the voltage monitoring circuit is composed of a monolithic IC and a three-terminal type voltage monitoring circuit has three terminals of a power supply terminal, a reset output terminal and a ground terminal as external terminals, one resistor is connected to the power supply line. It is possible to realize a voltage monitoring circuit whose hysteresis can be freely changed.

[0042]

[Effect of device]

According to the voltage monitoring circuit of the present invention, the potential difference between both input terminals when the differential amplifier is balanced and the voltage V _gO corresponding to the energy bandgap of Si at the absolute zero degree when the voltage across the series circuit of the resistor and the transistor is zero. By making the potential difference of the resistor that applies the voltage to the input of the differential amplifier at the time of n times equal, the output of the differential amplifier has a monitored temperature coefficient of zero. . Then, with a simple configuration, it is possible to realize a low power consumption voltage monitoring circuit that does not have a reference voltage circuit.

[Brief description of drawings]

FIG. 1 is a first embodiment of the present invention.

FIG. 2 is a diagram for explaining the circuit operation of FIG.

FIG. 3 is a diagram for explaining the circuit operation of FIG.

FIG. 4 is a second embodiment of the present invention.

FIG. 5 is a diagram showing respective voltage monitoring circuits according to a third embodiment of the present invention.

FIG. 6 is a principle circuit diagram of the present invention.

FIG. 7 is a principle circuit diagram of a differential amplifier of the present invention.

FIG. 8 is another basic circuit diagram to which the principle of the present invention is applied.

FIG. 9 is another basic circuit diagram to which the principle of the present invention is applied.

FIG. 10 is a conventional voltage monitoring circuit diagram.

FIG. 11 is a diagram for explaining the circuit operation of FIG. 6.

FIG. 12 is a diagram for explaining the circuit operation of FIG. 6;

[Explanation of symbols]

R _{1 to} R ₃₁ , R resistance D _{1 to} D ₃ Zener diode Q _{1 to} Q ₃₂ Transistor V _CC Measured power supply 1 to 5 Reset output terminal 10, 20 Monitored voltage input terminal 50 Output terminal 60 Differential amplifier (comparator )

Claims (1)

[Scope of utility model registration request] 1. A voltage monitoring circuit, which uses a power supply line connected to a power supply to be measured as a power supply and outputs an on / off switching output according to the voltage level of the power supply, wherein a plurality of resistors and a forward voltage drop of a silicon diode are detected. n
The voltage is applied to both ends of a series circuit with a constant voltage element that generates a double constant voltage, and the voltage across one of the plurality of resistors is set to the first and second different current densities of the emitters. An offset voltage of a difference voltage ΔV _BE is generated between the bases of the first and second transistors, which are the inputs of the differential amplifier, and an offset voltage of a difference voltage ΔV _BE is generated. The output of the differential amplifier is inverted according to the change of, and the voltage across the series circuit of the constant voltage element and a plurality of resistors is
When the voltage V _LO , which is n times the voltage V _go corresponding to the Si energy band gap at absolute zero, and the offset voltage of the differential amplifier coincides with the voltage across one of the resistors. A voltage monitoring circuit characterized in that the output of the differential amplifier is inverted.