JPH07225566A - Display driving device and multi-gradation driving method - Google Patents

Abstract

(57) [Abstract] [Purpose] With regard to the improvement of the display drive device, the method for outputting the voltage selection data from the image display data was devised, and a small number of reference voltages were appropriately combined to achieve a simple circuit configuration.
Images with two or more gradations are displayed. [Structure] The data dividing means 11 uses the pixel display data DIN.
From the first decoder 11A that decodes the frame data DF that specifies the number of frames, and the reference voltage data Vn, [n = 1, 2, that selects the reference voltage Vn from the data DIN.
i, j ... n] and a second decoder 11B for decoding
The frame modulation means 12 for generating the control flag F for controlling the combination of the reference voltage data Dn, based on the frame data DF and the external control signals VS, HS, DCK,
It has a frame modulator 12A that generates a control flag F.
In addition, a data output means 13, a reference voltage generation source 14 and a liquid crystal driving means 15 are provided.

Description

Detailed Description of the Invention

[Table of Contents] Industrial Application Field of the Prior Art (FIG. 8) Problem to be Solved by the Invention Means for Solving the Problem (FIG. 1) Action Example (FIGS. 2 to 7) Effect of the Invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display driving device and a multi-gradation driving method.
The present invention relates to an apparatus and method for driving multi-gradation of a liquid crystal display panel using a TFT (Thin Film Transistor) and its method. 2. Description of the Related Art In recent years, thin liquid crystal display panels with low power consumption have been used for displays of office automation equipment such as notebook computers and workstations. With the improvement of display performance and the increase in screen size of these displays, not only the display capacity (the number of display pixels) but also the number of display gradations and display colors are required to be improved.

For example, the number of display gradations and the display color are usually 16 gradations / 4096 colors in a personal computer, 64 gradations / 260,000 colors in a multimedia personal computer, and 256 gradations / 16.77 million colors in a high-definition TV. Required. However, in order to drive the liquid crystal display panel in multiple gradations, it is necessary to temporarily convert the image display data into voltage selection data. However, when color display of 32 gradations or more is realized, the P of the data conversion unit is used.
LDs (Programmable Logic Devices) and ROMs (read-only memories) become larger.

Therefore, an apparatus and method capable of displaying an image of 32 gradations or more with a simple circuit configuration by devising a method of outputting voltage selection data from image display data and appropriately combining small reference voltages is desired. It is rare.

[0005]

2. Description of the Related Art FIG. 8 is an explanatory view of a conventional multi-tone liquid crystal driving device. For example, “Liquid crystal display device” for which the present inventors previously applied for a patent (Japanese Patent Application No. 4-201287) and “Liquid crystal display device and a multi-gradation driving method” for which a patent application (Japanese Patent Application No. 4-317104) has been applied. As shown in FIG. 8, the multi-tone liquid crystal driving device shown in FIG. 8 includes a voltage selection unit 1, a reference voltage generation unit 2, a digital driver 3 and a scanning driver 4. The voltage selection unit 1 has data conversion units 1A and 1B and a gate circuit 1C.

The data conversion section 1A has a liquid crystal display panel 5 of 3
When voltage modulation is performed for each frame, image display data DIN
Is converted into voltage selection data. The voltage selection data is data that specifies a combination of reference voltages. The data conversion unit 1B converts the image display data DIN into voltage selection data when voltage modulation is performed every four frames. The function of the device is, for example, when voltage-modulating the liquid crystal display panel 5 every three frames, first, when the image display data DIN is input to the data conversion unit 1A of the voltage selection unit 1, the data conversion unit 1A receives the data. It is converted into voltage selection data by 1A. The voltage selection data is output to the digital driver 3 via the gate circuit 1C. The digital driver 3 combines the eight reference voltages V0 to V7 supplied from the reference voltage generator 2 based on the voltage selection data.

The digital driver 3 has reference voltages V0 to V7.
A liquid crystal drive voltage obtained by combining the above is applied to the pixel electrode of the liquid crystal display panel 5, and the scan driver 4 scans the pixel electrode.
When voltage modulation is performed every four frames, the image conversion data DIN is converted into voltage selection data by the data conversion unit 1B. As a result, color display of about 8 to 32 gradations is realized.

[0008]

By the way, according to the conventional device, the data conversion units 1A and 1B of the voltage selection unit 1 for converting the image display data DIN into the voltage selection data are PLDs.
And ROM. For this reason, the PLD and the ROM become large in scale when realizing color display of 32 gradations or more.
This is because the data with which the reference voltages are combined increases as the number of gradations increases.

According to the conventional multi-gradation driving method,
A data conversion unit is provided for each frame in which voltage modulation is performed, and the image display data DIN is individually converted into voltage selection data. Therefore, in order to increase the number of frames in accordance with the increase in the number of gradations due to the demand for improvement in display quality, it is necessary to provide a data conversion unit that exclusively performs signal processing on upper frames of 5 frames and beyond.

As a result, the number of displayable gradations becomes insufficient in the display for information terminals which requires 64 gradations / 260,000 colors, and the circuit scale of the voltage conversion section and the like becomes complicated, so that the cost of the apparatus is reduced. There is a problem that it hinders The present invention was created in view of the problems of the conventional example, and devises a method of outputting voltage selection data from image display data, appropriately combining a small number of reference voltages, and using a simple circuit configuration to obtain 32 gradations. It is an object of the present invention to provide a display driving device and a multi-gradation driving method capable of displaying the above image.

[0011]

[Means for Solving the Problems] FIGS. 1A and 1B are
3A and 3B respectively show principle diagrams of a display drive device according to the present invention. As shown in FIG. 1A, the display driving device of the present invention converts pixel display data DIN into reference voltage data Dn, [n
= 0,1,2, i, j ... n] and the frame data DF, and the frame data D
Frame modulation means 12 for decoding F to generate a control flag F for controlling the combination of the reference voltage data Dn
And the data output means 1 for outputting the voltage selection data DOUT for executing the multi-frame modulation based on the control flag F.
And 3 are provided.

In the display drive device of the present invention, the data dividing means 11 uses the pixel display data DIN to specify the frame data D for designating the number of frames as shown in FIG. 1B.
The first decoder 11A for decoding F and the reference voltage data V for selecting the reference voltage Vn from the pixel display data DIN.
It has a second decoder 11B for decoding n, [n = 0,1,2, i, j ... n], and the frame modulation means 12 outputs the frame data DF and the external control signals VS, HS, DCK. On the basis of the above, it is characterized by having a frame modulator 12A for generating a control flag F for controlling the combination of the reference voltage data Dn.

In the display driving device of the present invention, the reference voltage source 14 for generating the reference voltage Vn, [n = 0, 1, 2, i, j ... N] and the selection based on the voltage selection data DOUT are selected. Reference voltage Vn, [n = 0, 1, 2, i, j
, N] is provided, and a liquid crystal driving means 15 is provided. In the display drive device of the present invention, the reference voltage generation source 14 is based on the inverted data of the voltage selection data DOUT, with reference to the common potential of the liquid crystal display panel,
It is characterized in that a positive reference voltage for upper gradation and a negative reference voltage for lower gradation are alternately output.

According to the multi-gradation driving method of the present invention, from the pixel display data DIN for multi-frame modulation driving the liquid crystal display panel,
Reference voltage data Dn for selecting the reference voltage Vn, [n = 0, 1, 2, i, j ... N], [n = 0, 1, 2, i, j ...
n] and the frame data DF designating the number of frames are separated, and the reference voltage data D is separated from the frame data DF.
A control flag F that controls a combination of n is calculated, and voltage selection data D that specifies a combination of the reference voltages Vi and Vj with respect to the number of frames based on the control flag F.
It is characterized by generating OUT.

In the multi-gradation driving method of the present invention, the gray scale of the average voltage combined by the reference voltages Vi and Vj has the largest number of frames and the smallest difference (ΔV) between adjacent average voltages. The object is achieved by thinning out a suitable number of keys.

[0016]

The operation of the display drive device of the present invention will be described. For example, the pixel display data DIN is converted by the data dividing means 11 into reference voltage data Dn, [n = 0, 1, 2, i, j ...
n] and the frame data DF, the reference voltage data Dn is output to the data output means 13, and the frame data DF is output to the frame modulation means 12, respectively.

The frame modulation means 12 decodes the frame data DF and generates a control flag F for controlling the combination of the reference voltage data Dn. At this time,
As shown in (B), the first decoder 11A of the data dividing means 11 decodes the frame data DF designating the number of frames from the pixel display data DIN. Further, the frame data DF is output to the frame modulator 12A.

In the frame modulator 12A, the frame data D
A control flag F [0 that controls the combination of the reference voltage data Dn based on F and the external control signals VS, HS, and DCK.
Or 1] is generated. In the second decoder 11B, reference voltage data Vn, [n = 0, 1, 2, i, j ... n] for selecting the reference voltage Vn from the pixel display data DIN.
Is decoded.

The control flag F is output from the frame modulator 12A to the data output means 13. As a result, based on the control flag F, the data output means 13 causes the liquid crystal drive means 1 to operate.
4, voltage selection data DOU combining reference voltage Vn
T is output. For example, when F = 0, the reference voltage data Di is output, and when F = 1, the reference voltage data Dj is output.
[J = i + 1] is output. As a result, in the liquid crystal drive means 14, the reference voltage Vn, [n = 0, 1, is supplied from the reference voltage generation source 14 based on the voltage selection data DOUT.
2, i, j ... n] are combined and output.

Thus, by appropriately combining a small number of reference voltages Vn based on the control flag F, it is possible to perform multi-frame modulation of 64 gray scales or more on the liquid crystal display panel. In addition, the circuit scale is reduced as compared with a complicated voltage conversion unit or the like as in the conventional example, which largely contributes to cost reduction of the device. According to the device of the present invention,
Based on the inverted data of the voltage selection data DOUT, a positive reference voltage for upper gradation and a negative reference voltage for lower gradation are alternately driven from the reference voltage generation source 14 with the common potential of the liquid crystal display panel as a reference. It is output to the means 14.

Therefore, although the liquid crystal drive voltage applied to the pixel electrode of the liquid crystal display panel has a step-like shape for multi-gradation display, the voltage amplitude of the buffer output constituting the output stage of the reference voltage generation source 14 is It becomes possible to make it constant. As a result, the output characteristics of the buffer that outputs the reference voltage for each gradation can be made uniform.

In the multi-gradation driving method of the present invention, the control flag F for controlling the combination of the reference voltage data Dn is calculated from the frame data DF separated from the pixel display data DIN. For this reason, the reference voltage Vn
Even when the number of combinations of the reference voltage data Dn increases, based on the control flag F that controls the combination of the reference voltage data Dn,
It becomes possible to easily output the voltage selection data DOUT. As a result, even when the number of frames is increased in order to achieve multi-gradation, it is not necessary to provide a data conversion unit that exclusively performs signal processing for upper frames as in the conventional example.

In the multi-gradation driving method of the present invention,
An appropriate number of gradations having the largest number of frames and the smallest difference between adjacent reference voltages are thinned out from the gradations of the average voltage combined by the reference voltages Vi and Vj. Therefore, flicker of the liquid crystal display panel can be suppressed, display quality can be improved, and color display of 64 gradations / 260,000 colors can be performed.

[0024]

Embodiments of the present invention will now be described with reference to the drawings. 2 to 7 are views for explaining a display driving device and a multi-gradation driving method according to an embodiment of the present invention.
FIG. 2 is a block diagram of a multi-gradation liquid crystal driving device according to an embodiment of the present invention, and FIG. 3 is an internal block diagram of the frame modulation unit thereof. FIG. 4 is an internal configuration diagram of the frame modulation unit, and FIG. 5 is an internal configuration diagram of the power supply circuit. Figure 6
7 is an output characteristic diagram of the buffer of the power supply circuit.
Is the operation of the multi-tone liquid crystal drive device (common fixed system)
Explanatory drawing is shown respectively.

For example, a multi-gradation liquid crystal driving device for driving a common fixed type liquid crystal display panel 28 with 64 gradations using eight reference voltages is shown in FIG. 2 as a frame modulation unit 100 and a reference power supply circuit 24. , A data driver 25, a scan driver 26, and a driver control signal generator 27. That is, the frame modulation unit 100 uses the dot clock signal DCK (hereinafter referred to as DCK signal), the vertical synchronization signal VS (hereinafter referred to as VS signal), the horizontal synchronization signal HS (hereinafter referred to as HS signal), and the voltage selection data based on the image display data DIN. DOUT is output to the data driver 25. The DCK signal, VS signal, HS signal and image display data DIN are supplied from, for example, a personal computer (hereinafter referred to as a personal computer) 200. The internal configuration of the unit 100 will be described in detail with reference to FIGS.

The reference power supply circuit 24 is an example of the reference voltage generation source 14 shown in FIG. 1 in principle, and is based on the power supply control signal S1.
The data driver 2 outputs the reference voltages Vn, [n = 0 to 7]
5 is output. The circuit 24 also outputs a scan voltage VY to the scan driver 26 and a common voltage Vm to the liquid crystal display panel 28. Reference power supply circuit 24
The internal configuration of will be described in detail in FIG.

The data driver 25 uses the voltage selection data D
Reference voltage V selected based on OUT and drive control signal S2
The liquid crystal driving voltage is output to the liquid crystal display panel 28 by sample-holding 0 to V7. Note that the present inventors first applied for a patent for the data driver 25 (Japanese Patent Application No.
201287) "Liquid crystal display" and patent application (Japanese Patent Application No. 4)
-317104) "liquid crystal display device" can be used.

The scan driver 26 scans the pixel electrodes of the liquid crystal display panel 28 based on the scan voltage VY and the scan control signal S3. Driver control signal generator 2
7 is a power supply control signal S1, a drive control signal S2, and a scan control signal S based on the DCK signal, the VS signal, and the HS signal.
3 and outputs them to the reference power supply circuit 24, the data driver 25, and the scan driver 26. Up to now, the configuration is the same as that of the conventional example, but the following configuration is different.

That is, the frame modulation unit 100 is a unit which constitutes one example of the data dividing means 11 and the frame modulating means 12 of FIG. For example, as shown in FIG. 3, the unit includes a frame decoder (hereinafter simply referred to as DF decoder) 21A, a reference voltage decoder (hereinafter simply referred to as Dn).
Decoder 21B, 5 frame counter (hereinafter simply called counter) 22A, 4 frame counter (hereinafter simply called counter) 22B, 3 frame counter (hereinafter simply called counter) 22C, 2 frame counter (hereinafter simply called counter) 22D, flag It has an arithmetic unit 22E and a voltage selection data output unit 23.

The DF decoder 21A and the Dn decoder 21B constitute an example of the data dividing means 11 of FIG. DF
The decoder 21A is an example of the first decoder 11A, and decodes 4-bit frame data DF designating the number of frames from 6-bit pixel display data DIN of RGB (red, blue, green), for example. The frame data DF is output to the flag calculator 22E.

The Dn decoder 21B is an example of the second decoder 11B, and the reference voltages V0 to V0 are derived from the pixel display data DIN.
The 3-bit reference voltage data D0 to D7 for selecting V7 is decoded. The reference voltage data D0 to D7 are output to the voltage selection data output unit 23. The counters 22A to 22D and the flag calculation unit 22E are an example of the frame modulation unit 12A in FIG. 1, and the counter 22A uses the frame value 5F required for 5 frame modulation based on the DCK signal, the VS signal and the HS signal.
Flag value calculation unit 22E for line value 5L and dot data 5D
Output to. Here, the 5-frame modulation means performing voltage modulation once in every 5 frames.

Similarly, the counter 22B has a DCK signal, V
Based on the S signal and the HS signal, the frame value 4F, the line value 4L, and the dot data 4D required for 4-frame modulation are output to the flag calculator 22E. Here, 4-frame modulation means that voltage modulation is performed once in 4 frames.
Thereafter, the counter 22C outputs the frame value 3F, line value 3L and pixel data 3D required for 3-frame modulation to the flag calculation unit 22E. Here, the 3-frame modulation refers to performing voltage modulation once in 3 frames. For example, 9 pixels in the horizontal direction (data side) and 3 pixels in the vertical direction (scanning side) of the liquid crystal display panel 28 are set as one unit, and which pixel is to be voltage-modulated during the three frame periods is determined in advance. The counter 22D is a frame value 2F required for 2 frame modulation,
The line value 2L and the dot data 2D are set to the flag calculator 22E.
Output to each. Here, 2 frame modulation means 2
This refers to performing voltage modulation once in a frame.

The flag calculator 22E generates a control flag F for controlling the combination of the reference voltage data D0 to D7 on the basis of the frame data DF and the VS, HS and DCK signals. For example, the flag calculation unit 22E may use a frame selector (hereinafter simply referred to as an F selector) 201 as shown in FIG.
, Line selector (hereinafter simply referred to as L selector) 202,
Pixel data selector (hereinafter simply referred to as D selector) 203
And an arithmetic unit 204.

The F selector 201 selects the frame value SF required for the frame modulation from the four frame values 5F to 2F based on the frame data DF and outputs it to the arithmetic unit 204. L selector 202 is the frame data D
The line value SL required for the frame modulation is selected from the four line values 5L to 2L based on F, and is output to the arithmetic unit 204.

The D selector 203 selects the pixel data value DL required for the frame modulation from the four pixel data values 5D to 2D based on the frame data DF and outputs it to the arithmetic unit 204. The calculator 204 calculates the frame value SF, line value SL, pixel data value DL and frame data DF required for the frame modulation, and the control flag F
Is output. As a result, the frame data DF can be decoded to generate the control flag F that controls the combination of the reference voltage data Dn.

The voltage selection data output unit 23 is an example of the data output means 13 of FIG. 1 in principle, and the voltage selection data DOU for performing multi-frame modulation based on the control flag F.
T is output to the data driver 25. In addition,
The reference power supply circuit 24 has 14 resistors R as shown in FIG.
And one resistor R0 and eight switching elements SW0-
It has SW7 and eight output buffers B0 to B7.

That is, 14 resistors R and 1 resistor R
0 is connected in series, and the resistor R0 is connected between circuits in which seven resistors R are connected in series. One end of this resistor series circuit is connected to the positive power supply VH, and the other end is connected to the negative power supply VL. Positive voltages Va7 to Va0 and negative voltages Va7 to Va0 are generated from the resistor series points. Upper positive voltage Va7
And the lower negative voltage Va0 are supplied to the switching element SW0, and the middle positive voltage Va6 and the lower negative voltage Va1 are supplied.
Are supplied to the switching element SW1. Hereinafter, similarly, the lower positive voltage Va0 and the upper negative voltage Va7 are supplied to the switching element SW7.

The switching element SW0 receives the positive voltage Va7 based on the data inversion signal (hereinafter simply referred to as HAN signal).
Alternatively, select the negative voltage Va0 and set it to the output buffer B0.
Output to. The output buffer B0 outputs this to the data driver 25 as the reference voltage V0. The switching element SW1 selects the positive voltage Va6 or the negative voltage Va1 based on the HAN signal and outputs it to the output buffer B1. The output buffer B1 outputs this to the data driver 25 as the reference voltage V1. Similarly, the switching element SW7 selects the positive voltage Va0 or the negative voltage Va7 based on the HAN signal and outputs it to the output buffer B7. The output buffer B7 outputs this to the data driver 25 as the reference voltage V7. The HAN signal is the inverted data of the voltage selection data DOUT. The HAN signal is input to the data driver 25, and the HAN signal inverts the voltage selection data DOUT input to the output buffer for black display and the voltage selection data DOUT input to the output buffer for white display.

For example, the voltage selection data DOUT = in the output buffer B0 for displaying black by the HAN signal = “L” level.
When "0,0,0" is input, as shown in the buffer output characteristic of FIG. 6, the voltage selection data DO is output to the output buffer B0 that displays white by the next HAN signal = "H" level.
The inverted data of UT = "0,0,0" is input, and the voltage selection data DOUT = "0,0,
It means that "0" is input.

As a result, a positive reference voltage for upper gradation and a negative reference voltage for lower gradation are alternately output based on the common potential of the liquid crystal display panel based on the HAN signal, as shown in FIG. can do. Next, the operation of the device will be described for the multi-gradation driving method according to the embodiment of the present invention. For example, when the liquid crystal display panel 28 is subjected to the multi-frame modulation driving, first, the reference voltage data D0 for selecting the reference voltages V0 to V7 [n = 7] from the pixel display data DIN.
~ D7 and the frame data DF that specifies the number of frames are separated. Specifically, when the pixel display data DIN is divided into the reference voltage data D0 to D7 and the frame data DF by the DF decoder 21A and the Dn decoder 21B,
The reference voltage data Dn is output to the data output unit 23, and the frame data DF is output to the flag calculation unit 22E.

Next, the control flag F for controlling the combination of the reference voltage data Dn is calculated from the frame data DF. Specifically, the flag calculator 22E decodes the frame data DF and generates a control flag F for controlling the combination of the reference voltage data Dn. At this time, as shown in FIG. 3, the DF decoder 21A of the frame modulation unit 100
As a result, the frame data DF designating the number of frames is decoded from the pixel display data DIN. Further, the frame data DF is output to the flag calculator 22E.

In the flag calculation unit 22E, the frame data DF
And reference voltage data D based on VS, HS and DCK signals
A control flag F is generated which controls the combination of n.
For example, in the case of 5 frame modulation, DCK signal, VS
The counter 22A generates a frame value 5F, a line value 5L and dot data 5D based on the signal and the HS signal.

Similarly, in the case of 4-frame modulation, the counter 22B generates a frame value 4F, a line value 4L and dot data 4D. In the case of 3-frame modulation, the counter 22B causes the frame value 3F and the line value 3
L and dot data 3D are generated. In the case of 2-frame modulation, the counter 22D generates a frame value 2F, a line value 2L and dot data 2D. These values are output to the flag calculator 22E.

After that, the F selector 20 of the flag calculator 22E
By 1, the frame value SF required for the frame modulation is selected from the four frame values 5F to 2F based on the frame data DF, and the selected frame value SF is output to the arithmetic unit 204. In addition, the L selector 202 allows the frame data DF
The line value SL required for the frame modulation is selected from the four line values 5L to 2L based on the above, and is output to the arithmetic unit 204.

Further, the selector 203 selects the pixel data value DL required for the frame modulation from the four pixel data values 5D to 2D based on the frame data DF, and outputs it to the arithmetic unit 204. The computing unit 204 computes the frame value SF, line value SL, pixel data value SD, and frame data DF required for the frame modulation, and as a result, the control flag F is output.

In the Dn decoder 21B, reference voltage data V0 to V7 for selecting the reference voltage Vn are decoded in parallel from the pixel display data DIN. Next, based on the control flag F, voltage selection data DOUT designating a combination of the reference voltage Vn with respect to the number of frames is generated. Here, when the control flag F is output from the flag computing unit 22E to the data output unit 23, the voltage selection data D is sent from the data output unit 23 to the data driver 25 based on the control flag F.
OUT is output. Table 1 shows the contents of the voltage selection data DOUT.

[0047]

[Table 1]

In Table 1, when one frame modulation is performed, for example, when the control flag F = “0”, the reference voltage data Di [Di = D0 to D7] is output. As a result, 8-gradation color display is possible. In the case of performing 2-frame modulation, the reference voltage data Di [Di = D0 to D7] is output when the control flag F = “0”, and the reference voltage data Dj [j is output when the control flag F = “1”. = I
+1] is output. As a result, color display with 7 gradations is possible.

Similarly, when performing 3-frame modulation,
There are two data output methods. For example, control flag F =
When the value is "0", the reference voltage data Di is output twice, and subsequently, when the control flag F is "1", Dj is output once. Further, when the control flag F = “0”, the reference voltage data Di is 1
Is output twice, and then Dj is 2 when the control flag F = “1”.
It is output twice. As a result, color display with 14 gradations is possible.

When performing 4-frame modulation, two data output methods are adopted. For example, control flag F = “0”
Then, the reference voltage data Di is output three times, and then Dj is output once with the control flag F = “1”. Further, when the control flag F = “0”, the reference voltage data Di is output once, and subsequently, when the control flag F = “1”, Dj is output three times. As a result, color display with 14 gradations is possible.

When performing 5-frame modulation, four data output methods are adopted. For example, control flag F = “0”
Then, the reference voltage data Di is output four times, and then Dj is output once with the control flag F = “1”. Further, when the control flag F = “0”, the reference voltage data Di is output three times, and subsequently, when the control flag F = “1”, Dj is output twice. Further, when the control flag F = “0”, the reference voltage data Di is output once, and then the control flag F = “1”.
Will output Dj four times. Further, the control flag F = "0"
Then, the reference voltage data Di is output twice, and then Dj is output three times with the control flag F = “1”. As a result, color display of 28 gradations is possible.

As a result, the data driver 25 can combine and output the reference voltages V0 to V7 supplied from the reference power supply circuit 24 based on the voltage selection data DOUT. Table 2 shows the contents of the formula of the average voltage of the pixel electrodes of the liquid crystal display panel 28.

[0053]

[Table 2]

In Table 2, in the case of one frame modulation, the reference power supply circuit 24 is based on the voltage selection data DOUT.
The reference voltage Vi = V0 to V7 supplied from
An average voltage of 8 gradations based on this is applied to the pixel electrode of the liquid crystal display panel 28. Similarly, in the case of 2-frame modulation, an average voltage of 7 gradations based on (Vi + Vj) 1/2, [j = i + 1] is applied to the pixel electrode.

In the case of 3-frame modulation, (2Vi + V
j) 1/3 or (Vi + 2Vj) 1/3, [j = i +
The average voltage of 14 gradations based on 1] is applied to the pixel electrode. In the case of 4-frame modulation, (3Vi + Vj) 1 /
An average voltage of 14 gradations based on 4 or (Vi + 3Vj) 1/4, [j = i + 1] is applied to the pixel electrode. In the case of 5-frame modulation, (4Vi + Vj) 1/5 or (3Vi
2 based on Vi + 2Vj) 1/5, (Vi + 4Vj) 1/5 or (2Vi + 3Vj) 1/5, [j = i + 1]
An average voltage of 8 gradations is applied to the pixel electrode.

Tables 3 to 6 show this relationship using the reference voltages Vi = V0 to V7.

[0057]

[Table 3]

[0058]

[Table 4]

[0059]

[Table 5]

[0060]

[Table 6]

According to this, eight reference voltages V0 to V7 are provided.
It is possible to display 71 gradations by using. here,
From the average voltage of 71 gradations, a suitable number of gradations having the largest number of frames and the smallest difference between adjacent reference voltages are thinned out. For example, 5 frames of 16, 24, 26, 34, 3
Thinning out 6, 44, and 46 gradations. This makes it possible to perform color display of 64 gradations by executing 1 to 5 frame modulation.

In this way, according to the liquid crystal drive device of the embodiment of the present invention, as shown in FIG. 2, the frame modulation unit 100, the reference power supply circuit 24, and the data driver 2 are provided.
5, scan driver 26 and driver control signal generator 27
3, the unit 100 includes a DF decoder 21A, a Dn decoder 21B, counters 22A to 22D, as shown in FIG.
It has a flag computing unit 22E and a voltage selection data output unit 23.

Therefore, the computing unit 204 of the flag computing unit 22E
The voltage selection data DOUT as shown in Table 1 can be output to the digital driver 25 on the basis of the control flag F from No. 1, and the eight reference voltages V0 to V7 can be appropriately combined to produce Tables 3 to 6. It is possible to perform multi-frame modulation with 64 gray levels as shown. In addition, the circuit scale is reduced as compared with a complicated voltage conversion unit or the like as in the conventional example, which largely contributes to cost reduction of the device.

Further, according to the device of the present invention, the positive reference voltage for the upper gradation and the negative reference voltage for the lower gradation are determined based on the common potential Vm of the liquid crystal display panel 28 based on the HAN signal. The data is alternately output to the data driver 25.
Therefore, although the liquid crystal drive voltage applied to the pixel electrode of the liquid crystal display panel 28 has a step-like shape for multi-gradation display, the voltage amplitude of the output buffers B0 to B7 forming the output stage of the reference power supply circuit 24 does not change. It becomes possible to make it constant.

As a result, the reference voltages V0 to V for each gradation are obtained.
It is possible to make the output characteristics of the buffers B0 to B7 that output 7 uniform. Further, according to the multi-gradation driving method according to the embodiment of the present invention, the control flag F for controlling the combination of the reference voltage data Dn is calculated from the frame data DF separated from the pixel display data DIN.

For this reason, the reference voltage V
Even when the number of combinations of n increases, the voltage selection data DOUT can be easily output based on the control flag F that controls the combination of the reference voltage data Dn. As a result, even when the number of frames is increased in order to achieve multi-gradation, it is not necessary to provide a data conversion unit that exclusively performs signal processing for upper frames as in the conventional example.

Further, in the multi-gradation driving method according to the embodiment of the present invention, from the average voltage of 71 gradations combined by the voltage selection data DOUT, 16 and 2 of 5 frames are obtained.
4, 26, 34, 36, 44, 46 gradations are thinned out. Therefore, by performing 1 to 5 frame modulation, color display of 64 gradations is possible, flicker of the liquid crystal display panel 28 can be suppressed, and display quality of the liquid crystal display panel 28 can be improved. 64 gradations /
It is possible to display 260,000 colors.

[0068]

As described above, according to the display driving device of the present invention, the data dividing means, the frame modulating means, the data outputting means, the liquid crystal driving means and the reference voltage generating source are provided. Therefore, based on the control flag generated by the frame modulation means, from the data output means to the liquid crystal drive means,
The voltage selection data that combines the reference voltages is output.
Thus, by appropriately combining a small number of reference voltages based on the control flag, it is possible to perform multi-frame modulation of 64 gray scales or more on the liquid crystal display panel. Also,
The circuit scale can be reduced as compared with a complicated voltage conversion unit as in the conventional example.

Further, according to the device of the present invention, the positive reference voltage for the upper gradation and the negative reference voltage for the lower gradation are alternately output with reference to the common potential. It is possible to make the voltage amplitude of the buffer output constant. According to the multi-gradation driving method of the present invention, the control flag is calculated from the frame data separated from the pixel display data.

Therefore, even when the number of combinations of reference voltages is increased due to the demand for multi-gradation, it becomes possible to easily output the voltage selection data based on the control flag. As a result, when the number of frames is increased to achieve multiple gradations, it is not necessary to provide a data conversion unit that exclusively performs signal processing for higher-order frames as in the conventional example. Further, in the multi-gradation driving method of the present invention, an appropriate number of gradations having the largest number of frames and the smallest difference between adjacent reference voltages are thinned out from the average voltage combined by the voltage selection data.

Therefore, flicker of the liquid crystal display panel can be suppressed. This greatly contributes to the provision of a multi-gradation liquid crystal driving device for driving a display of an OA device that requires multi-gradation / several hundreds of thousands of colors.

[Brief description of drawings]

FIG. 1 is a principle diagram of a display drive device according to the present invention.

FIG. 2 is a configuration diagram of a multi-tone liquid crystal driving device according to an embodiment of the present invention.

FIG. 3 is an internal configuration diagram of a frame modulation unit according to an embodiment of the present invention.

FIG. 4 is an internal configuration diagram of a frame modulator according to an embodiment of the present invention.

FIG. 5 is an internal configuration diagram of a reference power supply circuit according to an embodiment of the present invention.

FIG. 6 is an output waveform diagram of the buffer of the reference power supply circuit according to the embodiment of the present invention.

FIG. 7 is an operation (common fixed system) waveform diagram of the multi-tone liquid crystal driving device according to the embodiment of the present invention.

FIG. 8 is a configuration diagram of a multi-tone liquid crystal driving device according to a conventional example.

[Explanation of symbols]

 11 ... Data dividing means, 12 ... Frame modulating means, 13 ... Data outputting means, 14 ... Reference voltage generating source, 15 ... Liquid crystal driving means, 11A ... First decoder, 11B ... Second decoder, 12A ... Frame modulating section , DIN ... Image display data, DF ... Frame data, Dn [n = 0 to n] ... Reference voltage data, Vn [n = 0 to n] ... Reference voltage, DOUT ... Voltage selection data, F ... Control flag.

Claims (6)

[Claims] 1. A data dividing means (11) for dividing pixel display data (DIN) into reference voltage data (Dn, [n = 0, 1, 2, i, j ... n]) and frame data (DF).
And a control flag (F) for decoding the frame data (DF) and controlling the combination of the reference voltage data (Dn).
And a data output means (13) for outputting voltage selection data (DOUT) for executing multi-frame modulation based on the control flag (F). Drive device. 2. The data dividing means (11) decodes frame data (DF) designating a frame number from the pixel display data (DIN), and the pixel display data (DIN). From the reference voltage data (Vn, [n = 0, 1, 2,
i, j ... n]) and a second decoder (11B) for decoding the frame data (DF) and external control signals (VS, HS, DCK). A frame modulator (12A) that generates a control flag (F) that controls the combination of reference voltage data (Dn) based on
The display drive device according to claim 1, further comprising: 3. A reference voltage (Vn, [n = 0, 1, 2,
i, j ... n]) for generating a reference voltage source (14),
The reference voltage (Vn, [n = 0, 1, 2, i, j ...
2. The display drive device according to claim 1, further comprising a liquid crystal drive means (14) for selecting [n]) based on voltage selection data (DOUT). 4. The reference voltage generation source (15) is based on the inverted data of the voltage selection data (DOUT) and uses the common potential of the liquid crystal display panel as a reference to generate a positive reference voltage for upper gradation and a lower reference voltage for lower gradation. The display drive device according to claim 1, wherein the negative reference voltage is alternately output. 5. The pixel display data (DIN) for multi-frame modulation driving of a liquid crystal display panel is changed to a reference voltage (Vn, [n
= 0,1,2, i, j ... n]) for selecting reference voltage data (Dn, [n = 0,1,2, i, j ... n]) and frame data (DF) for specifying the number of frames. ) And the reference voltage data (D) from the frame data (DF).
n), a control flag (F) for controlling the combination is calculated, and voltage selection data (DOUT) designating a combination of the reference voltages (Vi, Vj) with respect to the number of frames is generated based on the control flag (F). A multi-gradation driving method characterized by the above. 6. An appropriate number of gradations having the largest number of frames and the smallest difference (ΔV) between adjacent average voltages are thinned out from the gradations of the average voltages combined by the reference voltages (Vi, Vj). 6. The multi-gradation driving method according to claim 5.