JPH0726852Y2 - Light emitting diode array - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a light emitting diode array, and more particularly to improvement of a recognition pattern incorporated in the light emitting diode array.

[Prior Art] A light emitting diode printer has recently been drawing attention as a non-impact printer. Light emitting diode printer
It has the advantages of low noise, downsizing, etc.
High-speed printers with a recording speed of 100 to 200 sheets in A4 size per minute have also appeared. The chip of the light emitting diode array used in such a light emitting diode printer is usually 64 or 128 dots of light emitting diodes on one chip together with the bonding pads 1 and 2 having the shape shown in FIG. 6 or 7. High density integration. In this way, a plurality of light emitting diode arrays configured as one chip are mounted with the light emitting portion spacing (dot pitch) and linearity kept constant. The electrical and optical characteristic inspection performed on the light emitting diode needs to be performed for each dot or each chip by using various inspection devices, but since the printer head has a light emitting portion of several thousand dots, these inspections are performed. The device is usually constructed as an automatic inspection device. Further, such an automatic device is not limited to one, but several devices are often connected.

The start and stop positions of these automatic devices are very important and the recognition patterns for this are incorporated in the light emitting diode array. For example, as shown in FIG. 8, a combination of a curved portion 3 and a square portion 4
Nos. 61-79553 and 62-60053), and as shown in FIG. 9, those having a shifted pitch (Japanese Patent Laid-Open No. 62-56163) have been proposed.

[Problems to be Solved by the Invention] However, the conventional technique uses one type of recognition pattern, and may cause misrecognition due to the positional shift or defocus. When a small number of automatic devices such as 1 or 2 are used, this erroneous recognition partially remains and does not cause a fatal problem. A large erroneous recognition is likely to occur by using the recognition pattern, and once this erroneous recognition occurs, a large number of defects are produced, the yield is deteriorated, and there is a serious problem in reliability.

The present invention has been made in order to effectively solve the above problems, and an object of the present invention is to provide a light emitting diode array capable of reducing erroneous recognition and improving yield.

[Means for Solving the Problems] In order to achieve the above object, the present invention arranges a plurality of light emitting diodes linearly on a surface of a substrate, and connects a bonding pad from each light emitting diode at right angles to an alignment direction of the light emitting diodes. In the light-emitting diode array that is formed to extend alternately in the same direction, a plurality of bonding pads from the both ends of the substrate among the above bonding pads are used as a plurality of kinds of recognition patterns that can be recognized by the inspection device and The recognition patterns are provided for each type as a pair on the side orthogonal to the alignment direction of the light emitting diodes.

[Operation] Since a plurality of types of recognition patterns of the bonding pad are provided and the inspection device distinguishes the patterns, the recognition error of the recognition pattern is reduced as a whole.
Further, by recognizing various recognition patterns as a pair at the same time, the pattern recognition can be provided with a check function, so that the recognizability is improved. Therefore, the automatic operation error of the inspection device is reduced, the defects of the light emitting diode array are reduced, and the yield of the light emitting diode array is improved.

[Embodiment] An embodiment of the present invention will be described below with reference to the accompanying drawings.

In the light emitting diode array 5 shown in FIG. 1, the light emitting portions (dots) 8 of the light emitting diodes 7 are formed in a row on the compound semiconductor substrate 6. A bonding pad 9 made of aluminum as an electrode is ohmic-contacted with the light emitting portion 8 and disposed on the substrate 6. On the other hand, the bonding pads 9 are arranged on the substrate 6 in a zigzag manner, and are arranged in pairs in the direction orthogonal to the alignment direction of the light emitting units 8.

Of these bonding pads 9, the plurality of bonding pads 9 on both ends of the substrate 6 are formed as two types of recognition patterns 10 and 11 which are pattern-recognized by the respective inspection devices for wafer inspection and chip inspection. Has been done. The wafer inspection here means that the compound semiconductor wafer is appropriately subjected to operations such as multi-layer epitaxial crystal growth, photo ringing, CVD deposition, and etching, and the emission spectrum, light output of the light emitting diode 7 on the entire surface of the wafer, This is an inspection for evaluating the characteristics of the semiconductor device such as the forward current dependence of the light output. The chip inspection is an inspection for evaluating whether or not the characteristics of each dot as described above are complete in the light emitting diode array 5 as a whole in the state where the wafer is made into chips by scribing or dicing. That is, the chip inspection is a characteristic check in a chip state for sorting and shipping.

In this embodiment, four recognition patterns 10 having the same shape are arranged on the substrate 6 in point symmetry with respect to the upper surface of the substrate 6 and the alignment direction of the light emitting portion 8, respectively. The mountability of the light emitting diode array 5 is improved.

The recognition pattern 10 includes first and second rectangular portions 10a and 10b, which are arranged along the alignment direction of the light emitting portions 8 while facing each other, and the first and second rectangular portions 10a and 10b. Each is formed in a substantially I-shape by a third rectangular portion 10c connecting the central portions in the orthogonal direction. This shape is used to improve the position detectability of the light emitting diode array 5 with respect to the coordinate system set in the inspection device. As will be apparent from what will be described later, the first and second rectangular portions 10a and 10b correspond to the inclination angle of the light emitting diode array 5 in the coordinate system and the Y direction in FIG.
Detects the directional coordinate position, and the third rectangular portion 10c
Is for detecting the X-direction coordinate position.

On the other hand, similar to the recognition pattern 10, four recognition patterns 11 are arranged on the substrate 6 in point symmetry with respect to the upper surface of the substrate 6 and the alignment direction of the light emitting portions 8.

The recognition pattern 11 includes first and second rectangular portions 11a and 11b, which are arranged to face each other and are arranged along the alignment direction of the light emitting portions 8, and the first and second rectangular portions 11a and 11b. Each of them is formed in a substantially U-shape from a third rectangular portion 11c connecting one end portion in the orthogonal direction. As in the case of the recognition pattern 10, the first and second rectangular portions 11a and 11b are for detecting the tilt angle and the Y-direction coordinate position of the light emitting diode array 5, and the third rectangular portion 11c is the light emitting diode array 5. For detecting the X-direction coordinate position of the.

It should be noted that each of the recognition patterns 10 and 11 needs to have a size of at least 50 μm × 50 μm so that wire bonding using a normal gold wire having a diameter of about 20 μm can be performed. However, it is recognized that the size can be sufficiently obtained by considering the arrangement and the shape, and the bonding is not hindered. A 96-dot light emitting portion 8 with a dot pitch of 84.66 μm (dot density 300 dots / inch) is formed on the substrate 6 having a total length of 8.128 mm, and the bonding pad 9 and the recognition pattern 1 are formed from the light emitting portion 4.
When 48 dots of 0 and 11 were arranged in the opposite direction, the recognition patterns 10 and 11 had the first size of 60 μm × 70 μm, respectively.
Square portions 10a and 11a of were obtained. Furthermore, even if wire bonding was performed using a gold wire having a diameter of 15 μm, the gold wire did not protrude from the recognition patterns 10 and 11, and the wire bonding was easily performed.

Next, application of the wafer inspection and the chip inspection in the inspection process of the light emitting diode array 5 will be described.

The inspection devices for wafer inspection and chip inspection each detect the recognition patterns 10 and 11 by the sensor, and according to the relationship between the preset standard pattern shape and the automatic operation instruction, the content of the operation instruction (start, move) , Stop, etc.).

More specifically, as shown in FIG. 2, when performing a wafer inspection in a state where a large number of light emitting diodes 7 are aligned and formed on one wafer 12, the light emission arranged in a matrix of m columns and n rows is performed. (I, j) th of the diode array (however,
A probe is placed on the array of i = 1 to m, j = 1 to n), and the electrical and optical characteristics of each light emitting diode 7 are measured. After measuring the (1,1) th array, then (1,2)
The second array is measured, this time with a recognition pattern of 10
Is recognized, the probe is lowered to a predetermined position, and the characteristics are measured. Then, when the measurement is completed up to the (1, n) th array,
Attempting to find the recognition pattern 10 corresponding to the (1, n + 1) th position, but since this pattern does not exist, the probe is moved according to a preset promise, and the (2,1) th array in the next row is searched. To measure. In this way, (1,
1) All the characteristics of the 1st to (m, n) th arrays are measured, and the wafer inspection is completed. In the above probing, the recognition patterns 10 and 10 at both ends of the array may be recognized at the same time to align the positions of the probe and the array. In this case, false recognition can be further reduced.

Next, a chip inspection performed in a state where the wafer 12 that has undergone the wafer inspection is made into chips by a process such as dicing will be described. The chip inspection is usually carried out by taking out the chips supplied from a chip tray one by one by vacuum suction or the like and applying a voltage by proving to evaluate the characteristics. At this time, it is necessary to detect the recognition pattern of the chip in order to recognize whether the chip is placed in the correct position or to recognize the start point and the end point of the characteristic evaluation. This recognition pattern is detected by the alignment cursor 13 as shown in FIG. 3 (a), for example. The alignment cursor 13 shown in FIG.
It is assumed to be composed of individual sensors 13a to 13f. When performing the chip inspection of the diode array 5 using the alignment cursor 13, first, the recognition pattern 11 and the alignment cursor 13 are overlaid as shown in FIG. 3 (b). At this time, the four sensors 13a to 13d located in the front are turned off, and the remaining two sensors 13e and 13f are turned on, and it is recognized that the array 5 is at the correct position and the starting point of the characteristic evaluation. Is recognized. As a result, the inspection apparatus starts the automatic operation and the characteristics of the chip are evaluated by the proving. The cursor 13 is set in advance so as to be sent at an equal pitch. So the cursor
When 13 is moved by one pitch, it overlaps with the bonding pad 9 as shown in FIG. 3 (c). At this time, all of the six sensors 13a to 13f are turned on, the continuation of the characteristic evaluation is recognized, the characteristic evaluation is performed again by proving, and then the cursor 13 is moved by one pitch. When this operation is repeated and the cursor 13 again overlaps with the recognition pattern 11 at the other end of the substrate 6 as shown in FIG. 3B, it is recognized that the characteristic evaluation end point is reached according to the on / off state of the cursor 13. , Stop the proving operation.

After that, the array 5 is mounted on the wiring board and bonding is performed. In this case, the bonding machine is automatically operated while detecting the electrode pattern similarly to the chip inspection.

The chip inspection described above can be performed by superposing the alignment cursor 13 on the recognition pattern 10 as shown in FIG. In this case, the positions of the sensors 13a to 13f that are turned on / off are different, and the recognition pattern 10 is identified in the same manner as above. Note that the specific detection operation of the recognition pattern 10 in the case of wafer inspection is also the same as that of the recognition pattern 11, and the details thereof will be omitted.

According to the present embodiment, even when an inspection process is constructed using a large number of inspection devices, the recognition patterns 10 and 11 having different shapes which can be distinguished and recognized by the inspection devices.
Is incorporated in the light emitting diode array 5, the influence of erroneous recognition in automatic operation of the inspection device is reduced, and accordingly, errors in selection, placement, wiring, etc. of the array 5 can be suppressed and yield can be improved. . Especially, the recognition pattern according to each inspection device for wafer inspection and chip inspection.
Since 10 and 11 can be used, erroneous recognition can be reduced in the wafer inspection and the chip inspection in which the difference in the way of capturing the pattern is large in the inspection process of the light emitting diode array 5.

Further, according to the present embodiment, the recognition patterns 10 and 11 are printed on the substrate 2
Since each position is provided as a pair at the end portion, the recognition function can be improved by recognizing various recognition patterns 10, 10 comrades or 11, 11 comrades as one pair at the same time, and holding the check function in the pattern recognition. . Therefore, it is possible to reduce the malfunction of the inspection device due to the positional shift of the alignment cursor 13 with respect to the recognition patterns 10 and 11 and the defocus. In addition, since the degree of freedom in the shape of each of the recognition patterns 10 and 11 is increased, a complicated operation instruction can be given to the inspection device.

Further, according to the present embodiment, both the recognition patterns 10 and 11 have the first rectangular portions 10a and 11 arranged along the alignment direction of the light emitting portions 8.
a and the second rectangular portions 10b and 11b, and the third rectangular portions 10c and 11c arranged in the orthogonal direction, the pattern can be immediately recognized by simply overlapping the respective sensors 13a to 13f of the cursor 13, so that the pattern The versatility of recognition is excellent, and the light emitting diode array 5 can be arranged accurately and quickly.

In the above embodiment, the light emitting diode array 5
Although two kinds of recognition patterns 10 and 11 are incorporated in the above, the recognition patterns may be three kinds or more. At this time, recognize different types of recognition patterns in combination,
The wafer inspection and the chip inspection may be performed by changing the combination.

Further, the shapes of the recognition patterns 10 and 11 are not limited to those described above, and may be other shapes.

Further, the shape of the bonding pad 9 may be formed into an elliptical shape as shown in FIG. 7 in order to facilitate operations such as lift-off.

FIG. 5 shows a second embodiment of the present invention. In the second embodiment, in order to prevent the recognition patterns 10 and 11 from peeling off due to the pressure of the cooling water when the wafer is made into chips by the dicing process, the normal bonding pad 9 is provided at the end of the substrate 6. It is formed, and the recognition patterns 10 and 11 are formed inside the bonding pad 9.
The recognition patterns 10 and 11 are 2 from both ends of the substrate 6, respectively.
It is formed by the third and third bonding pads 9. Therefore, according to the second embodiment, during the dicing process, a large pressure is applied to the endmost bonding pad 9 by the cooling water, but the bonding pad 9 has a large area and a small number of corners, resulting in peeling. There is nothing to do. Further, the recognition patterns 10 and 11 can be prevented from peeling off without being applied with high pressure cooling water.

[Effects of the Invention] According to the present invention, the following excellent effects are exhibited.

Since the light emitting diode array incorporates multiple types of recognition patterns, the inspection device distinguishes these recognition patterns and recognizes the recognition patterns without error, thus reducing defects in the light emitting diode array due to misrecognition of the recognition patterns and improving yield. Can be improved.

[Brief description of drawings]

FIG. 1 is a partial front view of an embodiment of the present invention, FIG. 2 is a partial front view showing a state where a light emitting diode array is formed on a wafer used for wafer inspection, and FIG. 3 is an alignment cursor at the time of chip inspection. FIG. 3 (a) is a diagram showing the relationship between the alignment cursor and FIG.
FIG. 3 (b) is a view showing a relationship at the time of starting and stopping the operation of the inspection apparatus, FIG. 3 (c) is a view showing a relationship at the time of continuing the operation, and FIG. 4 is an alignment with a recognition pattern for wafer inspection. FIG. 5 is a view showing a detection state of a cursor, FIG. 5 is a partial front view of another embodiment of the present invention, FIGS. 6 and 7 are front views of a conventional light emitting diode array in which a recognition pattern is not incorporated, and FIG. FIG. 9 and FIG. 9 are front views of a conventional light emitting diode array in which a recognition pattern is incorporated. In the figure, 5 is a light emitting diode array, 6 is a substrate, 7 is a light emitting diode, 9 is a bonding pad, and 10 and 11 are recognition patterns.

Continuation of front page (72) Teruji Sato Inventor, 5-1-1 Hidaka Town, Hitachi City, Ibaraki Prefecture Hidaka Plant, Hitachi Cable, Ltd. (56) References JP 59-96729 (JP, A) Special Features Kai 59-143159 (JP, A) JP 64-90527 (JP, A) JP 62-29138 (JP, A) JP 62-170655 (JP, U)

Claims (1)

[Scope of utility model registration request] 1. A light emitting diode array in which a plurality of light emitting diodes are linearly arranged on a surface of a substrate, and bonding pads are alternately extended from the respective light emitting diodes in a direction orthogonal to an alignment direction of the light emitting diodes. Among the bonding pads, a plurality of bonding pads from both ends of the substrate are used as a plurality of types of recognition patterns that can be recognized by an inspection device, and the plurality of types of recognition patterns correspond to the alignment direction of the light emitting diodes for each type. A light emitting diode array characterized by being provided as a pair on a side orthogonal to each other.