JPH0727708A - Wafer defect inspection method - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a wafer defect inspection method capable of easily specifying the location of a defect. [Structure] First, an image of a partial pattern of the chip A on the wafer 1 is captured by the optical reading mechanism 3, and then an image of a partial pattern of the chip B corresponding to this pattern is captured by the optical reading mechanism 3. First compared with each
Get the comparison result of. Then, the image of the partial pattern of the chip A ′ corresponding to the partial pattern of the chip B is captured, and the image is compared with the partial pattern of the chip B to obtain the second comparison result. Then, based on the first comparison result and the second comparison result, which of the chips A, B, and A ′ is defective is specified.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer defect inspection method that uses a wafer on which a plurality of chips having the same pattern are formed and specifies the presence and position of defects on the wafer.

[0002]

2. Description of the Related Art In the manufacture of a semiconductor device, a reticle on which a predetermined circuit pattern is drawn is used to transfer the circuit pattern onto a wafer by a so-called photolithography process. A plurality of chips each having a circuit pattern are formed.

Before dicing a wafer on which a plurality of chips have been formed in this way and proceeding to the next step, it is necessary to inspect whether there are any defects on the wafer. Defects that occur in the photolithography process are mainly so-called fixed defects, in which defects that occur on the reticle are transferred to the wafer as they are, and defects occur at the same position on the chip, and due to the inclusion of foreign matter and uneven development. There is a so-called random defect that occurs. The presence or absence of these defects is inspected to eliminate defective chips so that defective products are not manufactured.

FIG. 4 is a diagram for explaining a conventional wafer defect inspection method, and a method for inspecting a defect on a wafer will be described based on this. It should be noted that, here, a case will be described as an example in which the wafer 1 on which two identical chips 2 are formed by one shot (one exposure area) is inspected. To inspect for defects on the wafer 1, first, a scan (scanning direction a) is performed from the left to the right of the chip A with a width of about 100 μm, and the optical reading mechanism 3 scans in the scanning direction a.
The image of the pattern of the length from the left end to the right end (hereinafter, referred to as one line) along is taken in and stored in a memory (not shown).

Subsequently, scanning is performed in the same direction from left to right of the adjacent chip B with a width of about 100 μm, and an image of one line pattern is captured by the optical reading mechanism. Then, this image is compared with the image of the pattern for one line of the chip A stored in the memory (subtraction of the image signal) to obtain a comparison result (difference signal).

Since the pattern for one line of chip A and the pattern for one line of chip B captured as an image are the same, if there is no defect, nothing is detected in the difference signal according to the comparison result. become. Further, if the chip A has a defect, a signal based on the image of the defect remains in the difference signal of the comparison result, and the existence of the defect can be confirmed.

When the defect inspection in the scan direction a is completed, the scan width is lowered by one and the chip B is reversed.
A similar scan (scanning direction b) is performed from the right side to the left side of the chip A, and the defect inspection is performed on the pattern for each one line. Such an optical reading mechanism 3
By repeating the video capture and comparison by
The defect inspection for one shot is performed.

[0008]

However, such a wafer defect inspection method has the following problems. That is, the difference signal obtained by comparing the captured images of the two chips can judge whether or not there is a defect, but cannot judge which chip has the defect. . Therefore, after checking the existence of a defect by such a difference signal, the operator actually confirms the patterns of the two chips by using an optical microscope or the like, and confirms which of the two chips has the defect position. Doing specific work. Due to such a specific work, it is difficult to perform a quick defect inspection, and the product yield is adversely affected. Therefore, it is an object of the present invention to provide a wafer defect inspection method capable of easily specifying the location of a defect.

[0009]

SUMMARY OF THE INVENTION The present invention is a wafer defect inspection method, which has been made to solve such problems. That is, this defect inspection method uses a wafer on which at least three chips having the same pattern are formed,
A method of inspecting a defect existing on this wafer, which comprises first capturing an image of a pattern of a part of a first chip by an optical reading mechanism and then performing a second pattern corresponding to a part of the pattern of the first chip. A first comparison result is obtained by capturing an image of a part of the pattern of the chip with an optical reading mechanism and comparing the images. Then, an image of a part of the pattern of the third chip corresponding to the part of the pattern of the second chip is captured by the optical reading mechanism, and the image and the image of the part of the pattern of the second chip previously captured are captured. The second comparison result is obtained by performing the comparison. Then, based on the first comparison result and the second comparison result, the first chip, the second chip
This is a defect inspection method for identifying which of the chips or the third chip has a defect.

Further, in such a wafer defect inspection method, when the first chip, the second chip and the third chip are continuously arranged along a certain direction, the image is read by the optical reading mechanism. Part of the pattern to be captured consists of a pattern of a certain length on the chip along the previous fixed direction, that is, the direction in which each chip is lined up. It is also a method of inspecting a wafer for defects.

[0011]

With the optical reading mechanism, an image of a part of the pattern of the first chip and an image of a part of the pattern of the second chip corresponding to the part of the pattern of the first chip are captured by an optical reading mechanism.
According to the first comparison result obtained by comparing each image,
It can be checked whether there is a defect in either the first chip or the second chip.

Further, when there is a defect in either the first chip or the second chip, an image of a partial pattern of the third chip corresponding to a partial pattern of the second chip is obtained and By comparing the image of a part of the pattern of the second chip that was captured earlier and obtaining the second comparison result, if there is no difference in the comparison, it can be determined that there is a defect in the first chip, If there is a difference in comparison, it can be determined that there is a defect in the second chip.

On the other hand, if there is no difference in the first comparison result, there is no defect in either the first chip or the second chip. If there is a difference in the second comparison result in this state, Can be determined to have a defect in the third chip. Further, if there is no difference in any comparison result, it means that there is no defect in all the chips.

When the first chip to the third chip are continuously provided along a certain direction, a pattern of a certain length of the first chip along the certain direction is read, and then it is left as it is. The pattern of the fixed length of the second chip is continuously read, and the pattern of the fixed length of the third chip is continuously read so that the first comparison result and the second comparison result are obtained by one scan. To get. Then, based on the first comparison result and the second comparison result, which chip has a defect is specified.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a wafer defect inspection method of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram for explaining a wafer defect inspection method of the present invention, and FIG. 2 is a diagram for explaining comparison results. That is, in this wafer defect inspection method, the existence and position of a defect are specified by using a wafer 1 on which three or more chips 2 having the same pattern have been exposed, and the defect is detected above the wafer 1. This is a method of performing an inspection by obtaining an image of the pattern of each chip 2 by the optical reading mechanism 3 arranged at.

In order to inspect for defects, first, with the wafer 1 positioned on a stage (not shown), the optical reading mechanism 3 arranged above the wafer 1 is used to move the chip A from left to right, for example. Scan (scan direction a)
I do. The width of the image captured by this scan is 10
Although it is about 0 μm, it may be determined according to the inspection accuracy, inspection time, and the like.

An image of a pattern for one line of the chip A is obtained by this scanning, and the signal thereof is stored in the one-line memory 4 of the comparison circuit shown in FIG. 2 (a). Next, the optical reading mechanism 3 captures the image of the pattern of one line of the chip B from the time when the chip B reaches the left side of the chip B as it is along the scanning direction a. Then, the captured video signal is input to the comparison circuit shown in FIG. 2A, and the video signal for one line of the chip A stored in the one-line memory 4 is read and input to the comparator 5. .

These signals are compared by the comparator 5,
The difference signal is output. That is, the pattern of the chip A captured by the optical reading mechanism 3 and the pattern of the chip B are in the same pattern because they have a corresponding positional relationship, and when neither chip 2 has a defect, Means that nothing is left (not detected) in the output difference signal due to the subtraction of the signal in the comparator 5. On the other hand, if any one of the chips 2 has a defect, only the image signal of the defect remains in the difference signal output from the comparator 5, and the presence of the defect is detected.

The image of the pattern of the chip A and the chip B
The comparison with the image of the pattern is stored as the first comparison result. In addition, since the image signal of the pattern of the chip A is read from the 1-line memory 4 when performing this comparison, this signal disappears from the 1-line memory 4 at the stage when the comparison is completed, and the chip input after that The video signal of the pattern B is newly stored in the 1-line memory 4.

Next, the optical reading mechanism 3 captures the image of the pattern for one line of the chip A ′ from the time when it advances along the scanning direction a and reaches the left of the chip A ′. Along with this, the video signal is shown in FIG.
The image signal of the pattern of the chip B stored in the 1-line memory 4 is input to the comparator 5 of the comparison circuit shown in FIG. Then, these signals are compared to obtain an output composed of a difference signal. The comparison between the image of the pattern of the chip A ′ and the image of the pattern of the chip B is stored as the second comparison result.

The pattern of the incorporated chip A'is
Since the patterns of the chip B and the pattern of the chip A have the same positional relationship, they are composed of the same pattern. The video signal of the pattern of the chip A ′ obtained by the optical reading mechanism 3 and the 1-line memory 4 are formed. Should match the signal of the image of the pattern of chip B stored in. However, if any one of the chips 2 has a defect, the image signal of the defect remains in the second comparison result, and the presence of the defect can be detected based on this.

Then, based on the obtained first comparison result and the second comparison result, which of the chips A, B, and A ′ is defective is specified. FIG. 2B shows the relationship between each comparison result and the defect occurrence location. That is, when a signal (a signal based on an image of a defect) is detected in the first comparison result, it can be determined that a defect exists in either the chip A or the chip B.

If no signal is detected in the second comparison result among those obtained from the first comparison result, it means that the signals of the chip B and the chip A ′ are the same. , These chips, namely chip B
Thus, neither the chip A nor the chip A ′ has any defect. That is, it can be specified that the remaining chip A has a defect.

On the other hand, a signal is detected by the first comparison result,
If a signal is detected also in the second comparison result, it can be specified that there is a defect in the chip B common to the respective comparison results.

If no signal is detected as a result of the first comparison, it means that neither chip A nor chip B has a defect. In this state, a signal is detected as a result of the second comparison. If so, it means that the remaining chip A ′ has a defect. In this way, the chip A, based on the first comparison result and the second comparison result,
It becomes possible to identify which chip 2 of the chip B or the chip A ′ has a defect. It should be noted that if no signal due to a defect is detected in both the first comparison result and the second comparison result, all the patterns match and no defect exists in any chip 2.

Then, when the defect inspection of the pattern of one line of the chip 2 is completed, the comparison circuit is cleared once,
The defect inspection of the pattern for the next one line, which is reduced by one scan width, is performed. In this case, scanning (scanning direction b) is performed from the right side to the left side of the chip A ′,
The image of the pattern is captured by the optical reading mechanism 3.

When capturing an image for one line along the scanning direction b, contrary to the above-described capturing, first, the image of the pattern for one line of the chip A ′ is captured, and then the chip B, Further, the image of the pattern for one line of the chip A is captured. Then, similarly, the images of the respective patterns are compared to identify the position of the defect existing in the pattern for one line along the scanning direction b. The defect inspection of the entire chip 2 is performed by repeating the capturing and comparison of the image of the pattern for one line.

Next, another example of the present invention will be described with reference to FIG. That is, this defect inspection method is a defect inspection using a wafer in which at least three chips 2 having the same pattern are formed in one shot (in the figure, a case where three chips are formed) is shown. For example, when chip A, chip B, and chip C are formed by one shot, first,
An image of a pattern for one line of each chip 2 is taken in along the scanning direction a to obtain a first comparison result and a second comparison result as shown in FIG.
In this case, A'in the figure becomes C).

Then, based on the first comparison result and the second comparison result, it is specified which of the chips A, B, and C has a defect. When the pattern for the next one line is captured, the pattern is folded back at the position where the capture in the scan direction a is completed, and the scan width is lowered by one and the next one line is captured in the scan direction b. To do so.

In this way, when three or more chips 2 having the same pattern are formed in one shot, images of patterns of at least three chips 2 of the chips 2 in one shot are captured and compared. This makes it possible to identify which of the three chips 2 has a defect. Moreover, in this case, since it is not necessary to capture the image of the pattern of the chip 2 (for example, A ′) in the adjacent shot, even if there is a so-called fixed defect in which the defect on the reticle is transferred, it is detected. It becomes possible.

That is, for example, even when a fixed defect exists at the same position on the chip A and the chip A ', only the three chips 2 of the chip A, the chip B, and the chip C are required to capture the image of the pattern. Therefore, it can be specified from the comparison result described above that the chip A has some defect (it cannot be distinguished whether it is a fixed defect or a random defect). In order to distinguish whether the fixed defect is a random defect, the defect inspection is performed on the chips A, B, and C and then the defect inspection on the chips A ′, B ′, and C ′ in the adjacent shot. The positions of the detected defects are compared to calculate whether or not they are present at the same position, and if the defects are present at the same position, it can be determined that they are fixed defects.

In these embodiments, one line of the chip 2 is taken in as the image of the pattern read by the optical reading mechanism 3, but it is not always necessary to take in one line. It is the same when a part of the corresponding patterns in each of the two chips 2 is captured and compared.

When the three chips 2 for capturing the pattern images are arranged in series along the scanning directions a and b, if the pattern images are continuously captured as described above. However, if they are not arranged in series, the images of the three patterns may be individually captured and compared.

[0034]

As described above, the wafer defect inspection method of the present invention has the following effects. That is, by capturing and comparing the images of the patterns of the three chips, it becomes possible to specify which of the three chips has a defect. In addition, when three chips are arranged in a row along a certain direction, defect inspection can be efficiently performed. Therefore, it is not necessary for the operator to visually check the position of the defect by using an optical microscope or the like, and rapid defect inspection of the wafer can be performed, so that the manufacturing yield of the semiconductor device can be improved. Become.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a wafer defect inspection method of the present invention.

FIG. 2 is a diagram illustrating a comparison result, in which (a) is a comparison circuit,
(B) shows a comparison result.

FIG. 3 is a diagram illustrating another example.

FIG. 4 is a diagram illustrating a conventional example.

[Explanation of symbols]

 1 wafer 2 chip 3 optical reading mechanism 4 1 line memory 5 comparator

Claims (2)

[Claims] 1. A method of inspecting a defect existing in a wafer using a wafer having at least three chips each having the same pattern formed, which comprises first imaging a partial pattern of the first chip. Are captured by the optical reading mechanism, and then images of the partial pattern of the second chip corresponding to the partial pattern of the first chip are captured by the optical reading mechanism to compare the respective images. The step of obtaining the comparison result of No. 1, and then the image of the partial pattern of the third chip corresponding to the partial pattern of the second chip is captured by the optical reading mechanism, and the image and the second chip Obtaining a second comparison result by comparing the images of some patterns, and the first chip, the second chip or the second comparison result based on the first comparison result and the second comparison result. A wafer defect inspection method, comprising the step of identifying which of the third chips has the defect. 2. The wafer defect inspection method according to claim 1, wherein when the first chip, the second chip, and the third chip are continuously provided along a certain direction, the part is provided. Pattern of the wafer is a pattern of a certain length on the chip along the certain direction, and an image of the pattern of the certain length of each chip is taken in along the certain direction. Inspection method.