JPH07288466A - Superconducting logic circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a timed inverter with a wide margin that is simple in design, has a high yield, and is less likely to malfunction due to vibration during a transition. [Structure] A series circuit 110 of a Josephson element 102 and a superconducting inductance 101 is connected in parallel with a shunt resistor 103, and one terminal of the parallel circuit is grounded, and the other terminal has an input conducting wire 105 and a power supply resistance 104. And the superconducting inductance 10
1 is composed of a superconducting switch 130 which is magnetically coupled to 1, a power supply resistor 132 and a load resistor 131.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconducting logic circuit which controls a current flow by switching a Josephson element between a superconducting state and a normal conducting state to perform a logical operation.

[0002]

2. Description of the Related Art A superconducting element exhibiting the Josephson effect (hereinafter referred to as Josephson element) has a current region exhibiting two stable states of a superconducting state and a normal conducting state if it is a tunnel type junction. The superconducting state is a state in which only superconducting current flows, and if the current is constant, no voltage is generated between both terminals of the Josephson element. The normal conducting state is a state in which a normal conducting current flows, a voltage is generated between both terminals of the Josephson element, and the Josephson element exhibits resistance. FIG. 2 shows an example of current-voltage characteristics of the tunnel junction Josephson device. When the Josephson device in the superconducting state is initially injected with a current larger than the critical current value, the normal conducting current flows and switches to the normal conducting state. In FIG. 2, a state change occurs like abc. After that, when the current is reduced below the critical current value, it returns to the superconducting state by following the current-voltage trajectory like cda in FIG.

When a Josephson element is used in a logic circuit, a resistor is basically connected in parallel with the Josephson element as shown in FIG. In this parallel circuit, all the current injected into the circuit flows through the Josephson element when the Josephson element is in the superconducting state, but the current injected into the circuit is parallel when the Josephson element is in the normal conducting state. Divided by resistance. In this way, whether the current flows in the parallel resistance or not can be controlled by changing the state of the Josephson element. Usually, a large input current is generated by a small input current, so a bias current is applied to a parallel circuit to a position slightly smaller than the critical current value.
However, in that case, once the input is injected and the Josephson element is switched to the normal conducting state, the superconducting state does not return even if the input current is removed. For this reason, a logical negation cannot be made with such a circuit. Further, it is necessary to remove the bias current each time a logical operation is performed.

Conventionally, there are roughly two types of methods for solving the problem in which logical negation cannot be performed. The first is a dual rail system that does not require a logical NOT operation, and is a method in which all inputs are input in pairs of positive and negative, and operations are also performed in pairs of positive and negative. This method has a drawback that the degree of integration is low because the number of gates required is almost doubled.

The second is a type of circuit called a timed inverter, which requires the input current to be applied before the bias current or some clock signal. A typical example is Giwara; IBM Journal of Research
And Development 24 Vol. 130-142 Page 1
980 (Gheewala, “Design of 2.5- Microm
eter Josephson Current Injection Logic (CIL), "IBM
J. of Research and Development, vol. 24, pp.130-1
42, 1980).

FIG. 4 is an excerpt from this paper. Switch 210, switch 220 and power supply resistor 203
Are connected in series. The shunt resistor 201 is connected in parallel to the switch 210, and the signal input conductor 204 is magnetically coupled. The switch 220 has a load resistor 202
Are connected in parallel and the clock input conductor 205 is magnetically coupled. The bias current is applied to the switch 210 and the switch 220 through the power supply resistor 203. The clock input is injected at a fixed point in time, but the input signal must be injected before that. When the input signal is “0”, the switch 210 does not switch to the normal conducting state, and therefore the switch 22 is switched when the clock input is injected.
When 0 is switched to the normal conducting state, a large current flows through the load resistor 202, and "1" is output. When the input signal is "1", the switch 210 is switched to the normal conducting state, and most of the bias current is shunted to the shunt resistor 201. Therefore, even after the clock input is injected, the switch 220 is normally conducting. Without being switched to state
No current flows through the load resistor 202 and “0” is output.

This circuit has the following problems. When the switch 220 is switched to the normal conducting state, the load resistance 2
Since a shunt resistor 201 having a resistance value similar to that of 02 is provided in parallel, a power supply current that is double that of other switches is required to obtain a standard signal level, and a switch 210 and a switch 220 also require double critical current. is there. However, since the input signal current level is standard, the switch 210 has a narrow margin if it is not twice as sensitive. Because of this problem, the design of this timed inverter is difficult and the yield of circuits containing this timed inverter is low.

[0008]

SUMMARY OF THE INVENTION An object of the present invention is to provide a timed inverter which is simple in design and improves the yield of circuits.

[0009]

To achieve the above object, the simplest circuit, a parallel circuit of Josephson elements and resistors, is used. When the input signal is "1", that is, the input current is injected, the Josephson element switches to the normal conducting state, and the current flows through the resistors put in parallel. Therefore, only a small current flows through the Josephson device. If this current is used for the input of another switch, the input current is sufficiently low and becomes the level of the signal "0". On the other hand, when the input signal is "0", the input current does not flow, and if the bias current of the signal "1" level is applied to the Josephson element,
The logical negation of "0" can be done. When performing a negative operation of "1", "1" is not transmitted to the circuit in the subsequent stage, so that the phase of the element for detecting the current flowing in the Josephson element is delayed.

[0010]

[Function] Since the simplest parallel circuit composed of Josephson elements and resistors is used, the design can be done easily.
Since it does not require an element having a higher sensitivity than other switches, the margin does not decrease.

[0011]

FIG. 1 shows an embodiment of the present invention. The series circuit 110 of the Josephson element 102 and the superconducting inductance 101 is connected in parallel with the shunt resistor 103.
One terminal of this parallel circuit is grounded, and the input conductor 105 and the power supply resistor 104 are connected to the other terminal. The above is the configuration of the preceding circuit. The subsequent circuit is a superconducting switch 1 magnetically coupled with a superconducting inductance 101.
30 and its power supply resistance 132 and load resistance 131.

The input of the superconducting switch 130 is the power source resistance 1
A control current is made to flow in the circuit 04 and the series circuit 110, and is magnetically supplied by the superconducting inductance 101. The critical current value of the Josephson element 102 is designed to be larger than the maximum value of the control current so that the Josephson element 102 does not switch to the normal conducting state by the control current. Further, the power supply current is not initially applied to the superconducting switch 130 so that the control current does not switch the superconducting switch 130 to the normal conducting state.

In this state, an input signal is input from the input conductor 105 to the preceding circuit. When the input signal is "0", a current sufficiently smaller than the standard signal current (for example, a current pulse generated by crosstalk) is input, so that the Josephson element 102 is always in the superconducting state. At that time, when the power supply current is supplied to the superconducting switch 130, the superconducting switch 130 switches. When the input signal is "1", the standard signal current is input and the Josephson element 102
A total current of the control current and the standard signal current flows through the. The critical current value of the Josephson element 102 is designed to be smaller than the minimum value of the total current so that the Josephson element 102 is switched to the normal conducting state by the total current. Josephson element 102 switches, total current is shunt resistor 1
03, but the resistance value of the shunt resistor 103 is designed so that the voltage generated across the shunt resistor 103 does not exceed the characteristic voltage of the Josephson element 102. If this design condition is satisfied, the Josephson element 102
Therefore, the superconducting switch 130 does not switch at this time even if the power supply current is supplied.

In FIG. 1, the Josephson element 102 side of the series circuit 110 is grounded, but the superconducting inductance 101 side may be grounded.

FIG. 5 shows a second embodiment of the present invention. A superconducting quantum interference device is used for the superconducting switch, an example of which is shown in FIG. Josephson device 133,13
4 and superconducting inductance 135 are superconducting loop 136
Make up. Superconducting loop 136 is Josephson device 1
It is grounded between 33 and the Josephson element 134, and is connected to the power supply resistor 132 at the center point of the superconducting inductance 135. The superconducting inductance 135 is magnetically coupled to the superconducting inductance 101, and when a magnetic flux is inserted from the superconducting inductance 101 to the superconducting loop 136, the critical current value of the superconducting quantum interference device decreases. When the critical current becomes lower than the power supply current, the superconducting quantum interference device switches to the normal conducting state. By utilizing this phenomenon, the superconducting quantum interference device can be used as a switch.

FIG. 6 shows a third embodiment of the present invention. The shunt resistor 103 is not directly grounded, is connected to the input terminal of another superconducting switch 120, and is grounded through the superconducting switch 120. When the Josephson element 102 switches, a control current and an input current flow through the shunt resistor 103, and the current level is sufficiently high. Therefore, in this configuration, another positive signal is generated in addition to the negative signal, so that the degree of freedom in circuit design can be increased and the performance of the circuit can be increased.

FIG. 7 shows a fourth embodiment of the present invention. A shunt resistor 106 is connected in parallel with the superconducting inductance 101. The large inductance of the superconducting inductance 101 hinders the transmission of high-speed signals and causes vibration during transition. FIG. 8 shows a computer simulation result in the case where the shunt resistor 106 is not provided, and shows an example in which a malfunction occurs due to vibration during a transition. FIG. 9 shows a computer simulation result under the same initial condition as in FIG. 8 when the shunt resistor 106 is attached, and shows an example of performing a correct operation.

[0018]

By using the superconducting logic circuit of the present invention, a timed inverter having a good margin can be formed by a simple circuit design. Further, there is an effect that a positive signal output can be extracted from the timed inverter. Furthermore, the switching delay of the timed inverter is shortened, malfunctions due to vibration during transients are reduced, and the margin is expanded.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a current-voltage characteristic diagram of a tunnel type Josephson device used in the present invention.

FIG. 3 is a basic switch circuit diagram using a Josephson element and a resistor.

FIG. 4 is a circuit diagram of a previous example of a timed inverter.

FIG. 5 is a circuit diagram of a second embodiment of the present invention.

FIG. 6 is a circuit diagram of a third embodiment of the present invention.

FIG. 7 is a circuit diagram of a fourth embodiment of the present invention.

FIG. 8 is a computer simulation characteristic diagram of malfunction due to vibration during transient.

FIG. 9 is a computer simulation characteristic diagram when the fourth embodiment of the present invention is used.

[Explanation of symbols]

101 ... Superconducting inductance, 102 ... Josephson element, 103 ... Shunt resistance, 104, 132 ... Power source resistance, 105 ... Input line, 120, 130 ... Superconducting switch, 131 ... Load resistance.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazumasa Takagi 1-280 Higashi Koikekubo, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Hideyuki Nagaishi 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. Central Research Laboratory

Claims (4)

[Claims] 1. A front stage including a series circuit of a Josephson element and a superconducting inductance whose one terminal is grounded, an input lead wire connected to another terminal of the series circuit, a power source resistance and a first shunt resistance. A circuit and a rear-stage circuit composed of a superconducting switch magnetically coupled to the superconducting inductance are provided.A control current is caused to flow from the power supply resistance to the superconducting inductance, and an input signal current is injected from the input conductor to the preceding circuit. If not, the Josephson element is always in the superconducting state, the control current becomes the input of the superconducting switch by the superconducting inductance, at which time the superconducting switch is switched when the power supply current is supplied, and When the input signal current is injected from the input conductor to the preceding circuit, the Josephson element is normally conducting. State, the control current and the input signal current flow through the first shunt resistor, and a sufficiently high level input does not flow through the superconducting switch. At that time, the superconducting switch switches even if the power supply current is supplied. A superconducting logic circuit characterized by not doing. 2. The superconducting logic circuit according to claim 1, wherein the superconducting switch is a superconducting quantum interference device. 3. The superconducting device according to claim 1, wherein the first shunt resistor is connected to an input terminal of another superconducting logic circuit without directly grounding the other terminal not connected to the series circuit. When grounded through a logic circuit and an input signal current is injected from the input conductor, the Josephson element switches to the normal conduction state, the control current and the input signal current flow to the first shunt resistor, and the superconducting logic A superconducting logic circuit in which the Josephson device is in a superconducting state and current does not flow from the first shunt resistor to the superconducting logic circuit when the input current of the circuit is reached and no input signal current is injected from the input conducting wire. 4. The method according to claim 1, wherein a second shunt resistor is connected in parallel with the superconducting inductance, and an input signal current is injected from the input wire.
The input signal current is shunted to the second shunt resistor, is made to flow faster to the Josephson element, and when the Josephson element switches to the normal conducting state, the current flowing to the Josephson element immediately before the switching is performed. Superconducting logic circuit that reduces vibration faster and with less vibration.