JPH07297784A - High-speed automatic gain control method for receiver circuit - Google Patents

High-speed automatic gain control method for receiver circuit

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Publication number
JPH07297784A
JPH07297784A JP11399594A JP11399594A JPH07297784A JP H07297784 A JPH07297784 A JP H07297784A JP 11399594 A JP11399594 A JP 11399594A JP 11399594 A JP11399594 A JP 11399594A JP H07297784 A JPH07297784 A JP H07297784A
Authority
JP
Japan
Prior art keywords
level
attenuator
level detector
signal
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11399594A
Other languages
Japanese (ja)
Other versions
JP3270978B2 (en
Inventor
Hideto Okita
英登 大北
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP11399594A priority Critical patent/JP3270978B2/en
Publication of JPH07297784A publication Critical patent/JPH07297784A/en
Application granted granted Critical
Publication of JP3270978B2 publication Critical patent/JP3270978B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

(57)【要約】 【目的】 高速で妨害電波に対しても安定して動作する
受信回路の高速自動利得制御方式を提供すること。 【構成】 高周波信号を増幅するRF増幅器1と並列に
接続されるアッテネ−タ2を設け、アッテネ−タ2は複
数個の減衰素子をスイッチ2−4、2−5で切替る構成
とし、RF増幅器1及び各減衰素子の切替を行い、アッ
テネ−タ2の出力にRF信号レベルを検出するRFレベ
ル検出器14を設け、該RFレベル検出器14とIFレ
ベル検出器12の出力信号をCPU13で処理し、アッ
テネ−タ2の適切な切替位置を計算しアッテネ−タ2の
切替を制御する。
(57) [Abstract] [Purpose] To provide a high-speed automatic gain control method for a receiving circuit that operates stably at high speed even with respect to interference waves. [Structure] An attenuator 2 connected in parallel with an RF amplifier 1 for amplifying a high-frequency signal is provided, and the attenuator 2 has a structure in which a plurality of attenuation elements are switched by switches 2-4 and 2-5. An RF level detector 14 for detecting the RF signal level is provided at the output of the attenuator 2 by switching between the amplifier 1 and each attenuation element, and the output signals of the RF level detector 14 and the IF level detector 12 are sent by the CPU 13. After processing, an appropriate switching position of the attenuator 2 is calculated and switching of the attenuator 2 is controlled.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、PHP(パ−ソナル・
ハンディホン)等の受信回路の高速自動利得制御方式に
関するものである。
BACKGROUND OF THE INVENTION The present invention relates to a PHP (personal
The present invention relates to a high-speed automatic gain control system for a receiving circuit such as a handy phone.

【0002】[0002]

【従来技術】図6は従来の受信回路の自動利得制御方式
の構成例を示すブロック図である。図示するように従来
の受信回路はRF増幅器20、RFフィルタ3、ミキサ
4、第1局部発振器5、IF増幅器6、IFフィルタ
7、ミキサ8、第2局部発振器9、IF増幅器10、I
Fフィルタ11及びIFレベル検出器12で構成され
る。RF増幅器20は制御信号により増幅率が制御され
る増幅率可変式の増幅器である。IFレベル検出器12
は出力信号を整流するダイオ−ド12−1及び抵抗器1
2−2とコンデンサ12−3からなる積分回路で構成さ
れる。
2. Description of the Related Art FIG. 6 is a block diagram showing a configuration example of a conventional automatic gain control system for a receiving circuit. As shown in the figure, the conventional receiving circuit includes an RF amplifier 20, an RF filter 3, a mixer 4, a first local oscillator 5, an IF amplifier 6, an IF filter 7, a mixer 8, a second local oscillator 9, an IF amplifier 10, and I.
It is composed of an F filter 11 and an IF level detector 12. The RF amplifier 20 is a variable gain amplifier whose gain is controlled by a control signal. IF level detector 12
Is a diode 12-1 for rectifying the output signal and a resistor 1
2-2 and a capacitor 12-3.

【0003】RF増幅器20で増幅された入力信号はR
Fフィルタ3を通り、ミキサ4で第1局部発振器5の出
力周波数により第1中間周波数に周波数変換される。更
に、IF増幅器6で増幅された後、IFフィルタ7を通
りミキサ4で第2局部発振器9の出力周波数により第2
中間周波数に周波数変換され、IF増幅器10で増幅さ
れた後、IFフィルタ11を介して出力信号として出力
される。
The input signal amplified by the RF amplifier 20 is R
After passing through the F filter 3, the mixer 4 frequency-converts the output frequency of the first local oscillator 5 into a first intermediate frequency. Further, after being amplified by the IF amplifier 6, the signal is passed through the IF filter 7 and the second frequency by the output frequency of the second local oscillator 9 by the mixer 4.
After being frequency-converted to an intermediate frequency and amplified by the IF amplifier 10, it is output as an output signal via the IF filter 11.

【0004】上記従来の受信回路の自動利得制御方式
は、第2中間周波信号の出力に歪みを検出するIFレベ
ル検出器12を接続し、出力信号を検波整流し直流電圧
に変換し、この電圧をRF増幅器20にフィ−ドバック
し増幅率を適正な値にアナログ的に制御し、信号が感度
よく受信され歪みが生じない範囲で使用する方式であ
る。
In the above conventional automatic gain control method for a receiving circuit, an IF level detector 12 for detecting distortion is connected to the output of the second intermediate frequency signal, and the output signal is detected and rectified and converted into a DC voltage. Is fed back to the RF amplifier 20 and the amplification factor is controlled to an appropriate value in an analog manner, and the signal is received with high sensitivity and used in a range in which distortion does not occur.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、従来の
自動利得制御方式は出力信号を直流電圧に整流して、制
御に使用するために、時定数が長くなり高速動作が出来
ないという問題がある。更に、自動利得制御方式のダイ
ナミックレンジ(自動調整幅)が狭く安定して受信出来
ない場合が生じることがある。上記RF増幅器20は妨
害電波信号を含めて増幅し、IF部(IF増幅器6、I
Fフィルタ7、ミキサ8、IF増幅器10、IFフィル
タ11)は所望する周波数の信号を増幅するので、IF
部の出力信号レベルで歪みレベルを検出する従来のIF
レベル検出器12のみでは妨害電波に対して自動利得制
御(AGC)が作動しない場合があるという問題があ
る。また、アナログ的に制御するためノイズ等により安
定な自動利得制御(AGC)が難しいという問題があっ
た。
However, the conventional automatic gain control method has a problem that the output signal is rectified into a DC voltage and used for control, so that the time constant becomes long and high-speed operation cannot be performed. Furthermore, the dynamic range (automatic adjustment range) of the automatic gain control method may be narrow and stable reception may not be possible. The RF amplifier 20 amplifies including the interfering radio wave signal, and outputs the signal to the IF section (IF amplifier 6, I
The F filter 7, the mixer 8, the IF amplifier 10, the IF filter 11) amplifies a signal of a desired frequency, so
Conventional IF that detects the distortion level based on the output signal level
The level detector 12 alone has a problem that the automatic gain control (AGC) may not operate with respect to jamming radio waves. Further, there is a problem that stable automatic gain control (AGC) is difficult due to noise or the like because the analog control is performed.

【0006】本発明は上述の点に鑑みてなされたもの
で、上記問題点を除去し、高速で妨害電波に対しても安
定して動作する受信回路の高速自動利得制御方式を提供
することを目的とする。
The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a high-speed automatic gain control system for a receiving circuit which eliminates the above-mentioned problems and operates stably at a high speed even against an interfering radio wave. To aim.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
本発明は、高周波信号を増幅するRF増幅器を有するR
F部、該RF部の出力信号を中間周波信号に周波数変換
し増幅するIF部、該IF部の出力信号のレベルを検出
するIFレベル検出器を具備し、該IFレベル検出器の
出力により前記RF増幅器の増幅率を制御し、IF部の
出力信号が歪まないよう制御する受信回路の高速自動利
得制御方式において、図1に示すように、RF増幅器1
の増幅率を固定とし、該RF増幅器1に並列にアッテネ
−タ2を設け、アッテネ−タ2は複数個の減衰素子2−
1,2−2,2−3を制御信号で動作するスイッチで切
替るように構成し、RF部(RF増幅器1、アッテネ−
タ2)からRF信号のレベルを検出するRFレベル検出
器14と、該RFレベル検出器14の出力信号とIFレ
ベル検出器12の出力信号を処理し、RF部及びIF部
の出力信号が否まないようアッテネ−タ2の減衰素子2
−1,2−2,2−3を切替ること特徴とする。
To solve the above problems, the present invention provides an R having an RF amplifier for amplifying a high frequency signal.
The F section, the IF section for frequency-converting and amplifying the output signal of the RF section into an intermediate frequency signal, and the IF level detector for detecting the level of the output signal of the IF section are provided. In the high-speed automatic gain control system of the receiving circuit for controlling the amplification factor of the RF amplifier and controlling the output signal of the IF unit so as not to be distorted, as shown in FIG.
The amplification factor of is fixed and an attenuator 2 is provided in parallel with the RF amplifier 1. The attenuator 2 is composed of a plurality of attenuation elements 2-
1, 2-2, 2-3 are configured to be switched by a switch that operates by a control signal, and the RF unit (RF amplifier 1, attenuator
2) RF level detector 14 for detecting the level of the RF signal, the output signal of the RF level detector 14 and the output signal of the IF level detector 12 are processed, and the output signals of the RF part and the IF part are Attenuator 2 of attenuator 2
A feature is that -1, 2, 2 and 2-3 are switched.

【0008】また、RF増幅器1の増幅率及びスイッチ
2−4,2−5で切替るアッテネ−タ2の減衰素子の2
−1,2−2,2−3の減衰値の差はIFレベル検出器
12とRFレベル検出器14の動作レベル差に等しく設
定することを特徴とする。
The amplification factor of the RF amplifier 1 and the attenuation element 2 of the attenuator 2 which is switched by the switches 2-4 and 2-5.
The difference between the attenuation values of -1, 2-2 and 2-3 is set to be equal to the difference between the operation levels of the IF level detector 12 and the RF level detector 14.

【0009】[0009]

【作用】本発明は、RF部からRF部の出力信号レベル
を検出するRFレベル検出器14及びIF部からIF部
の出力信号レベルを検出するIFレベル検出器12を設
け、該両方の検出信号を処理してアッテネ−タ2の減衰
素子2−1,2−2,2−3を適切な値に切替る。従っ
て、RFレベル検出器14で希望波および妨害電波によ
る歪みを検出し、IFレベル検出器12で希望波の歪み
を検出し適切な処理が出来る。
The present invention is provided with the RF level detector 14 for detecting the output signal level of the RF unit from the RF unit and the IF level detector 12 for detecting the output signal level of the IF unit from the IF unit, and the detection signals of both of them are provided. Is processed to switch the attenuation elements 2-1, 2-2, 2-3 of the attenuator 2 to appropriate values. Therefore, the RF level detector 14 can detect the distortion due to the desired wave and the interfering radio wave, and the IF level detector 12 can detect the distortion of the desired wave to perform appropriate processing.

【0010】RFレベル検出器14を設け、アッテネ−
タ2の切替ステップ値を両検出器の動作レベル差に等し
く設定したので希望波に対して適切なアッテネータ値が
瞬時に判定でき、また妨害電波に対しても適切に動作
し、自動利得制御方式のダイナミックレンジ(自動調整
幅)が広く、常に安定した受信が可能となる。また、C
PU13を使用することで両検出器の時定数を小さくす
ることが可能となり高速に動作することが出来る。アッ
テネ−タ2はステップ状にロジック的に動作するのでノ
イズ等の影響による誤動作は殆ど無くなる。
An RF level detector 14 is provided and the
Since the switching step value of switch 2 is set equal to the operating level difference between both detectors, an appropriate attenuator value can be instantly determined for the desired wave, and it also operates properly for jamming radio waves. Has a wide dynamic range (automatic adjustment range), and stable reception is always possible. Also, C
By using the PU 13, it is possible to reduce the time constants of both detectors and operate at high speed. Since the attenuator 2 operates stepwise in a logic manner, malfunction due to the influence of noise or the like is almost eliminated.

【0011】[0011]

【実施例】以下本発明の一実施例を図面に基づいて詳細
に説明する。図1は本発明の受信回路の高速自動利得制
御方式の構成例を示すブロック図である。図示するよう
に本発明の高速自動利得制御方式は従来のRF増幅器
1、アッテネ−タ2、RFフィルタ3、ミキサ4、第1
局部発振器5、IF増幅器6、IFフィルタ7、ミキサ
8、第2局部発振器9、IF増幅器10及びIFフィル
タ11からなる受信回路に、IFフィルタ11の出力側
にIF信号が歪むレベルを検出するIFレベル検出器1
2を接続し、RF信号(高周波信号)を増幅するRF増
幅器1の出力側にRF信号が歪むレベルを検出するRF
レベル検出器14を接続し、各検出器の出力信号をCP
U(中央処理装置)13で処理し、アッテネ−タ2の減
衰量を適切な値に切替る方式である。以下、図1の動作
を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram showing a configuration example of a high-speed automatic gain control system of a receiving circuit of the present invention. As shown in the figure, the high-speed automatic gain control system of the present invention uses the conventional RF amplifier 1, attenuator 2, RF filter 3, mixer 4, and first
An IF for detecting the level at which the IF signal is distorted at the output side of the IF filter 11 in the receiving circuit including the local oscillator 5, the IF amplifier 6, the IF filter 7, the mixer 8, the second local oscillator 9, the IF amplifier 10 and the IF filter 11. Level detector 1
RF which connects 2 and detects the level at which the RF signal is distorted at the output side of the RF amplifier 1 which amplifies the RF signal (high frequency signal)
Connect the level detector 14 and output the output signal of each detector to CP.
This is a system in which processing is performed by a U (central processing unit) 13 and the attenuation amount of the attenuator 2 is switched to an appropriate value. The operation of FIG. 1 will be described below.

【0012】RFレベル検出器14はダイオード14−
1、コンデンサ14−3とでRF部(RF増幅器1、ア
ッテネ−タ2、RFフィルタ3、ミキサ4)で歪みが生
じる信号レベル(包絡線)を高速に検出し、IFレベル
検出器12もダイオード12−1、コンデンサ12−3
でIF部(IF増幅器6、IFフィルタ7、ミキサ8、
IF増幅器10、IFフィルタ11)で歪みが生じる信
号レベル(包絡線)を高速に検出する。このようにRF
レベル検出器14、IFレベル検出器12とも時定数を
持たないように抵抗を使用せず高速に信号レベルを検出
できるようにしている。さらに、RFレベル検出器14
は検出した信号レベルをオペアンプ14−4で増幅し、
これを比較器14−5でロジック信号に変換してCPU
13に入力させる。同様に、IFレベル検出器12も検
出した信号レベルをオペアンプ12−4を介して比較器
12−5でロジック信号に変換し、CPU13に入力さ
せる。信号レベルは後段に行くに従い高くなるためIF
部の方が早く歪み始め、RF部の入力から見るとIFレ
ベル検出器12の方がRFレベル検出器14より低い入
力信号レベルで動作する。
The RF level detector 14 is a diode 14-
1. The signal level (envelope) in which distortion occurs in the RF section (RF amplifier 1, attenuator 2, RF filter 3, mixer 4) is detected at high speed by the capacitor 14-3 and the IF level detector 12 is also a diode. 12-1, capacitor 12-3
In the IF section (IF amplifier 6, IF filter 7, mixer 8,
A signal level (envelope) in which distortion occurs in the IF amplifier 10 and the IF filter 11) is detected at high speed. RF like this
Both the level detector 14 and the IF level detector 12 do not have a time constant so that the signal level can be detected at high speed without using a resistor. Further, the RF level detector 14
Amplifies the detected signal level with the operational amplifier 14-4,
This is converted into a logic signal by the comparator 14-5, and the CPU
Input to 13. Similarly, the IF level detector 12 also converts the detected signal level into a logic signal by the comparator 12-5 via the operational amplifier 12-4, and inputs it to the CPU 13. The signal level increases as it goes to the latter stage, so IF
The section begins to distort earlier, and the IF level detector 12 operates at a lower input signal level than the RF level detector 14 as seen from the input of the RF section.

【0013】入力信号を調整するアッテネ−タ2は複数
個の減衰素子をスイッチ2−4、スイッチ2−5で切替
るステップ切替構造をなし、そのステップ値を前記IF
レベル検出器12とRFレベル検出器14の検出レベル
差に等しくする。RFレベル検出器14が−30dB入
力信号レベルで動作し、IFレベル検出器12が−40
dB入力信号レベルで動作する場合を考えると、アッテ
ネ−タ2は10dBステップアップとなる。CPU13
はIFレベル検出器12とRFレベル検出器14の出力
信号に応じて、適切な減衰値になるようにアッテネ−タ
2を切替る(後述)。
The attenuator 2 for adjusting the input signal has a step switching structure in which a plurality of attenuation elements are switched by the switch 2-4 and the switch 2-5, and the step value thereof is the IF value.
The detection level difference between the level detector 12 and the RF level detector 14 is made equal. The RF level detector 14 operates at -30 dB input signal level and the IF level detector 12 operates at -40
Considering the case of operating at the dB input signal level, the attenuator 2 is stepped up by 10 dB. CPU13
Switches the attenuator 2 according to the output signals of the IF level detector 12 and the RF level detector 14 so that the attenuation value becomes appropriate (described later).

【0014】一例としてPHP(パ−ソナル・ハンディ
ホン)システムにおける実例を記す。図2に本発明の受
信回路(PHP)で受信する無線フレ−ムフォ−マット
の例を示す。同図において、SS及びPRはプリアンブ
ルで同期用ビットを示し、それにIDを示すユニ−クワ
−ド(UW)、デ−タ、エラ−チェックワ−ド(CR
C)と続く。入力信号を正確に受信するためには、ユニ
−クワ−ド(UW)を受信するまでにRF部及びIF部
の歪みを無くする必要があり、上記IFレベル検出器1
2、RFレベル検出器14及び各フィルタ回路の遅れ時
間を含めてプリアンブルの20.8μsの時間内にアッ
テネ−タ2を適切な値に設定し終える必要がある。
As an example, an actual example in a PHP (Personal Handyphone) system will be described. FIG. 2 shows an example of a wireless frame format received by the receiving circuit (PHP) of the present invention. In the figure, SS and PR are preambles, which indicate synchronization bits, and a uni-word (UW), data, and error-check word (CR) which indicate IDs thereof.
Continue with C). In order to accurately receive the input signal, it is necessary to eliminate distortion in the RF section and the IF section by the time the uni-quad (UW) is received.
2. It is necessary to finish setting the attenuator 2 to an appropriate value within 20.8 μs of the preamble including the delay time of the RF level detector 14 and each filter circuit.

【0015】また、RFレベル検出器14はRF部での
歪みを検出するので希望波と妨害電波のレベル検出を
し、IFレベル検出器12はIF部での歪みを検出する
ので希望波のレベル検出を主に行う。RFレベル検出器
14はフィルタ回路等の遅れが殆ど無いため、入力信号
に対してリアルタイムで応答するが、IFレベル検出器
12はIFフィルタ7、IFフィルタ11等の遅れ分だ
け応答するのが遅れる。これらを考慮した自動利得制御
(AGC)のタイムチャ−トを図3〜図5に示す。
Since the RF level detector 14 detects distortion in the RF section, it detects the levels of the desired wave and the interfering radio wave, and the IF level detector 12 detects distortion in the IF section, so the level of the desired wave. Mainly detect. The RF level detector 14 responds in real time to the input signal because there is almost no delay in the filter circuit and the like, but the IF level detector 12 delays in responding by the delay of the IF filter 7, the IF filter 11, etc. . Time charts of automatic gain control (AGC) considering these are shown in FIGS.

【0016】図3は入力信号レベルがIFレベル検出器
12の動作レベル(−40dB)より0〜10dB高い
場合のRFレベル及びIFレベル検出とアッテネ−タ切
替動作例を示すタイムチャ−トである。初期状態でアッ
テネ−タ2のスイッチ2−4、スイッチ2−5はRF増
幅器1の入出力端の位置にある。入力信号は時刻t1に
RF増幅器1に入力されRFレベルa1に増幅される。
IF部ではIFフィルタ7、IFフィルタ11等で遅れ
て時刻t2にIFレベルb1となり出力される。
FIG. 3 is a time chart showing an example of RF level and IF level detection and an attenuator switching operation when the input signal level is higher than the operation level (-40 dB) of the IF level detector 12 by 0 to 10 dB. In the initial state, the switches 2-4 and 2-5 of the attenuator 2 are located at the input / output ends of the RF amplifier 1. The input signal is input to the RF amplifier 1 at time t1 and amplified to the RF level a1.
In the IF section, the signal is delayed by the IF filter 7, the IF filter 11 and the like and becomes the IF level b1 at the time t2 and is output.

【0017】この場合、RFレベル検出器14は信号レ
ベルが低いので動作せず、IFレベル検出器12はIF
レベルb1を検出し、検出器の動作時間(1.5μs)
後、時刻t3で動作しIFレベル検出器出力d1を出力
する。CPU13はアッテネ−タ2に指令を出し、アッ
テネ−タ2は動作時間4.2μs後、時刻t4で切替動
作完了し、RFレベルa1はRFレベルa2に10dB
下がる。続いてIF部ではIFフィルタ7、IFフィル
タ11等で遅れて時刻t5でIFレベルb1からIFレ
ベルb2に10dB下がる。
In this case, the RF level detector 14 does not operate because the signal level is low, and the IF level detector 12 does not operate.
Level b1 is detected, detector operating time (1.5 μs)
After that, it operates at time t3 and outputs the IF level detector output d1. The CPU 13 issues a command to the attenuator 2, and the attenuator 2 completes the switching operation at time t4 after an operating time of 4.2 μs, and the RF level a1 becomes 10 dB at the RF level a2.
Go down. Then, in the IF section, the signal level is lowered by 10 dB from the IF level b1 to the IF level b2 at time t5 after a delay due to the IF filter 7 and the IF filter 11.

【0018】図4は入力信号レベルがIFレベル検出器
12の動作レベル(−40dB)より10dB以上高く
20dB以下の範囲の場合のRFレベル及びIFレベル
検出とアッテネ−タ切替動作例を示すタイムチャ−トで
ある。初期状態でアッテネ−タ2のスイッチ2−4、ス
イッチ2−5はRF増幅器1の位置にある。入力信号は
時刻t1にRF増幅器1に入力されRFレベルa1に増
幅される。IF部ではIFフィルタ7、IFフィルタ1
1等で遅れて時刻t4にIFレベルb1となり出力され
る。
FIG. 4 is a time chart showing an example of RF level and IF level detection and an attenuator switching operation when the input signal level is in the range of 10 dB or more and 20 dB or less higher than the operation level (-40 dB) of the IF level detector 12. It is In the initial state, the switches 2-4 and 2-5 of the attenuator 2 are in the position of the RF amplifier 1. The input signal is input to the RF amplifier 1 at time t1 and amplified to the RF level a1. IF filter 7 and IF filter 1 in the IF section
After a delay of 1 or the like, the IF level b1 is output at time t4 and the signal is output.

【0019】この場合、RFレベル検出器14は回路及
び検出器の遅れ時間2.5μs後、時刻t2で出力c1
を出力し、CPU13はアッテネ−タ2に指令を出し、
アッテネ−タ2は時刻t3でスイッチ2−4、スイッチ
2−5を切替、RFレベルa1はRFレベルa2に10
dB下がる。入力レベルが下がるのでIFレベルb1も
遅れてIFレベルb2に10dB下がる。
In this case, the RF level detector 14 outputs the signal c1 at time t2 after the delay time of 2.5 μs between the circuit and the detector.
Is output, the CPU 13 issues a command to the attenuator 2,
The attenuator 2 switches the switch 2-4 and the switch 2-5 at time t3, and the RF level a1 changes to the RF level a2 by 10
dB down. Since the input level is lowered, the IF level b1 is also delayed by 10 dB to the IF level b2.

【0020】IFレベル検出器12はIFレベルb1を
検出し、検出器の動作時間(1.5μs)後、時刻t5
で動作しIFレベル検出器出力d1を出力する。CPU
13はアッテネ−タ2に指令を出し、アッテネ−タ2は
動作時間4.2μs後、時刻t6で切替動作を完了し、
RFレベルa2はRFレベルa3に10dB下がる。続
いてIF部ではIFフィルタ7、IFフィルタ11等の
遅れ時間の後、時刻t7でIFレベルb2からIFレベ
ルb3に10dB下がる。
The IF level detector 12 detects the IF level b1, and after the operating time (1.5 μs) of the detector, the time t5.
And outputs the IF level detector output d1. CPU
13 issues a command to the attenuator 2, and the attenuator 2 completes the switching operation at time t6 after an operating time of 4.2 μs,
The RF level a2 is 10 dB lower than the RF level a3. Then, in the IF section, after a delay time of the IF filter 7, the IF filter 11, etc., the level drops from the IF level b2 to the IF level b3 by 10 dB at time t7.

【0021】図5は入力信号レベルがIFレベル検出器
12の動作レベル(−40dB)より20dB以上高く
30dBより低い場合のRFレベル及びIFレベル検出
とアッテネ−タ切替動作例を示すタイムチャ−トであ
る。初期状態でアッテネ−タ2のスイッチ2−4、スイ
ッチ2−5はRF増幅器1の位置にある。入力信号は時
刻t1にRF増幅器1に入力されRFレベルa1に増幅
される。IF部ではIFフィルタ7、IFフィルタ11
等で遅れて時刻t5にIFレベルb1となり出力され
る。
FIG. 5 is a time chart showing an example of RF level and IF level detection and attenuator switching operation when the input signal level is higher than the operation level (-40 dB) of the IF level detector 12 by more than 20 dB and lower than 30 dB. is there. In the initial state, the switches 2-4 and 2-5 of the attenuator 2 are in the position of the RF amplifier 1. The input signal is input to the RF amplifier 1 at time t1 and amplified to the RF level a1. In the IF section, IF filter 7 and IF filter 11
After that, the IF level b1 is output at time t5 after a delay.

【0022】この場合、RFレベル検出器14は回路及
び検出器の遅れ時間2.5μs後、時刻t2で出力c1
を出力し、CPU13はアッテネ−タ2に指令を出し、
時刻t3でアッテネ−タ2が動作し、RFレベルa1は
RFレベルa2に10dB下がる。入力レベルが下がる
のでIFレベルb1も遅れてIFレベルb2に10dB
下がる。
In this case, the RF level detector 14 outputs the output c1 at time t2 after a delay time of 2.5 μs between the circuit and the detector.
Is output, the CPU 13 issues a command to the attenuator 2,
At time t3, the attenuator 2 operates and the RF level a1 drops by 10 dB to the RF level a2. Since the input level is lowered, the IF level b1 is delayed and the IF level b2 is increased by 10 dB.
Go down.

【0023】更に、RFレベルa2はRFレベル検出器
14で検出されるレベルであり、回路及び検出器の遅れ
時間後、RFレベル検出器14は時刻t4で出力c2を
出力し、CPU13はアッテネ−タ2に指令を出し、時
刻t6でアッテネ−タ2が動作し、RFレベルa2はR
Fレベルa3に10dB下がる。入力レベルが下がるの
でIFレベルb2も遅れてIFレベルb3に10dB下
がる。
Further, the RF level a2 is a level detected by the RF level detector 14, and after the delay time of the circuit and the detector, the RF level detector 14 outputs the output c2 at time t4, and the CPU 13 attenuates. A command is issued to the controller 2, the attenuator 2 operates at time t6, and the RF level a2 becomes R.
It drops to F level a3 by 10 dB. Since the input level is lowered, the IF level b2 is also delayed by 10 dB to the IF level b3.

【0024】IFレベル検出器12はIFレベルb1を
検出し、検出器の動作時間(1.5μs)後、時刻t7
で動作しIFレベル検出器出力d1を出力する。CPU
13はアッテネ−タ2に指令を出し、アッテネ−タ2は
動作時間4.2μs後、時刻t8で切替動作を完了し、
RFレベルa3はRFレベルa4に10dB下がる。続
いてIF部ではIFフィルタ7、IFフィルタ11等の
遅れ時間の後、時刻t9でIFレベルb3からIFレベ
ルb4に10dB下がる。上記例では何れも受信を開始
してから10.7μs以内にアッテネ−タ2が動作を完
了し、無線フレ−ムフォ−マット(図2)のプリアンブ
ルの時間内に切替が完了する。
The IF level detector 12 detects the IF level b1, and after the operating time (1.5 μs) of the detector, the time t7.
And outputs the IF level detector output d1. CPU
13 issues a command to the attenuator 2, and the attenuator 2 completes the switching operation at time t8 after an operating time of 4.2 μs,
The RF level a3 is 10 dB lower than the RF level a4. Subsequently, in the IF section, after a delay time of the IF filter 7, the IF filter 11, etc., the level drops from the IF level b3 to the IF level b4 by 10 dB at time t9. In each of the above examples, the attenuator 2 completes its operation within 10.7 μs from the start of reception, and the switching is completed within the preamble time of the wireless frame format (FIG. 2).

【0025】図3〜図5は希望波の入力レベルが大きい
場合について記載しているが、妨害電波が大きく希望波
が小さい場合(RFレベル検出器14が動作し、IFレ
ベル検出器12は動作せず)においても同様に処理す
る。これは入力信号が位相変調(π/4DQPSK)さ
れているため、歪みなどによるデ−タエラ−が発生する
のを防止するために行う。また、この場合は、妨害電波
による歪みで生じるデ−タエラ−と自動利得制御をかけ
ることによるデ−タエラ−とを比較しエラ−が少ない方
に減衰値をCPU13で選択する。
3 to 5 describe the case where the input level of the desired wave is high, the case where the interference wave is large and the desired wave is small (the RF level detector 14 operates and the IF level detector 12 operates). No)) is processed similarly. This is performed in order to prevent the occurrence of data error due to distortion or the like because the input signal is phase-modulated (π / 4DQPSK). Further, in this case, the data error caused by the distortion due to the jamming radio wave is compared with the data error caused by the automatic gain control, and the CPU 13 selects the attenuation value to the one having less error.

【0026】以上述べたように入力信号のレベルが予測
出来ないような受信機(無線受信機等)において、受信
機で信号が歪むような強い信号を受信した場合、必要な
デ−タを受信する前に受信回路が歪まずに動作するよう
高速に適切な自動利得制御をかけ、安定にデ−タを受信
することが出来る。CPU13でRFレベル検出器14
とIFレベル検出器12の出力を処理するので、両検出
器の時定数を小さくすることが可能となり高速に動作す
ることが出来る。
As described above, in a receiver (radio receiver or the like) whose input signal level cannot be predicted, when a strong signal which causes signal distortion is received by the receiver, necessary data is received. Prior to this, appropriate automatic gain control is performed at high speed so that the receiving circuit operates without distortion, and data can be stably received. RF level detector 14 with CPU 13
Since the output of the IF level detector 12 and the output of the IF level detector 12 are processed, it is possible to reduce the time constant of both detectors and operate at high speed.

【0027】[0027]

【発明の効果】以上、詳細に説明したように本発明によ
れば、下記のような優れた効果が期待される。 (1)本方式はRF部からRF部の出力信号のレベルを
検出するRFレベル検出器及び、IF部及びIF部の出
力信号レベルを検出するIFレベル検出器を設け、両検
出信号を処理し、アッテネ−タの減衰素子を適切な値に
切替るので、RF検出器で希望波と妨害電波による歪み
及びIFレベル検出器で希望波の歪みを検出して適切な
利得制御が出来る。
As described in detail above, according to the present invention, the following excellent effects are expected. (1) This system is provided with an RF level detector that detects the level of the output signal of the RF unit from the RF unit and an IF level detector that detects the output signal level of the IF unit and the IF unit, and processes both detection signals. , The attenuation element of the attenuator is switched to an appropriate value, so that the RF detector can detect the distortion caused by the desired wave and the interfering radio wave and the IF level detector can detect the distortion of the desired wave and can perform an appropriate gain control.

【0028】(2)RFレベル検出器を設け、アッテネ
−タのスイッチで切替る減衰素子の減衰値を該RFレベ
ル検出器とIFレベル検出器の動作レベル差に等しくし
たので高速に適切な利得制御ができ、自動利得制御方式
のダイナミックレンジ(自動調整幅)が広く、常に安定
した受信が可能となる。
(2) Since the RF level detector is provided and the attenuation value of the attenuation element switched by the switch of the attenuator is made equal to the operation level difference between the RF level detector and the IF level detector, an appropriate gain is obtained at high speed. Control is possible, the dynamic range (automatic adjustment range) of the automatic gain control method is wide, and stable reception is always possible.

【0029】(3)アッテネ−タはステップ状にロジッ
ク的に動作するのでノイズ等の影響による誤動作は殆ど
無くなる。
(3) Since the attenuator operates in a stepwise logic manner, malfunction due to the influence of noise or the like is almost eliminated.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の受信回路の高速自動利得制御方式の構
成例を示すブロック図である。
FIG. 1 is a block diagram showing a configuration example of a high-speed automatic gain control system of a receiving circuit of the present invention.

【図2】本発明の受信回路で受信する無線フレ−ムフォ
−マットの例を示す図である。
FIG. 2 is a diagram showing an example of a wireless frame format received by the receiving circuit of the present invention.

【図3】本方式のRFレベル及びIFレベル検出とアッ
テネ−タ切替動作例を示すタイムチャ−トである。
FIG. 3 is a time chart showing an example of RF level and IF level detection and attenuator switching operation of this system.

【図4】本方式のRFレベル及びIFレベル検出とアッ
テネ−タ切替動作例を示すタイムチャ−トである。
FIG. 4 is a time chart showing an example of RF level and IF level detection and attenuator switching operation of this system.

【図5】本方式のRFレベル及びIFレベル検出とアッ
テネ−タ切替動作例を示すタイムチャ−トである。
FIG. 5 is a time chart showing an example of RF level and IF level detection and attenuator switching operation of this system.

【図6】従来の受信回路の自動利得制御方式の構成例を
示すブロック図である。
FIG. 6 is a block diagram showing a configuration example of an automatic gain control system of a conventional receiving circuit.

【符号の説明】[Explanation of symbols]

1 RF増幅器 2 アッテネ−タ 2−4 スイッチ 2−5 スイッチ 3 RFフィルタ 4 ミキサ 5 第1局部発振器 6 IF増幅器 7 IFフィルタ 8 ミキサ 9 第2局部発振器 10 IF増幅器 11 IFフィルタ 12 IFレベル検出器 13 CPU(中央処理装置) 14 RFレベル検出器 1 RF Amplifier 2 Attenuator 2-4 Switch 2-5 Switch 3 RF Filter 4 Mixer 5 1st Local Oscillator 6 IF Amplifier 7 IF Filter 8 Mixer 9 2nd Local Oscillator 10 IF Amplifier 11 IF Filter 12 IF Level Detector 13 CPU (Central Processing Unit) 14 RF level detector

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 高周波信号を増幅するRF増幅器を有す
るRF部、該RF部の出力信号を中間周波信号に周波数
変換し増幅するIF部、該IF部の出力信号のレベルを
検出するIFレベル検出器を具備し、該IFレベル検出
器の出力により前記RF増幅器の増幅率を制御し、IF
部の出力信号が歪まないよう制御する受信回路の高速自
動利得制御方式において、 前記RF増幅器の増幅率を固定とし、該RF増幅器に並
列にアッテネ−タを設け、前記アッテネ−タは複数個の
減衰素子を制御信号で動作するスイッチで切替るように
構成し、 前記RF部からRF信号のレベルを検出するRFレベル
検出器と、該RFレベル検出器の出力信号と前記IFレ
ベル検出器の出力信号を処理し、前記RF部及びIF部
の出力信号が否まないようアッテネ−タの減衰素子を切
替ること特徴とする受信回路の高速自動利得制御方式。
1. An RF unit having an RF amplifier for amplifying a high frequency signal, an IF unit for frequency-converting and amplifying an output signal of the RF unit into an intermediate frequency signal, and an IF level detection for detecting a level of an output signal of the IF unit. And controlling the amplification factor of the RF amplifier by the output of the IF level detector,
In a high-speed automatic gain control system of a receiving circuit for controlling the output signal of the unit so as not to be distorted, the amplification factor of the RF amplifier is fixed, an attenuator is provided in parallel with the RF amplifier, and the attenuator is a plurality of An attenuator is configured to be switched by a switch that operates with a control signal, an RF level detector that detects the level of an RF signal from the RF unit, an output signal of the RF level detector, and an output of the IF level detector. A high-speed automatic gain control system for a receiving circuit, which processes a signal and switches an attenuator of an attenuator so that the output signals of the RF unit and the IF unit are not denied.
【請求項2】 前記RF増幅器の増幅率及びスイッチで
切替るアッテネ−タの減衰素子の減衰値の差は前記IF
レベル検出器とRFレベル検出器の動作レベル差に等し
く設定することを特徴とする請求項1に記載の受信回路
の高速自動利得制御方式。
2. The difference between the amplification factor of the RF amplifier and the attenuation value of the attenuation element of the attenuator switched by the switch is the IF.
2. The high-speed automatic gain control system for a receiving circuit according to claim 1, wherein the level difference is set to be equal to the operation level difference between the level detector and the RF level detector.
JP11399594A 1994-04-27 1994-04-27 High-speed automatic gain control method for receiver circuit Expired - Fee Related JP3270978B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11399594A JP3270978B2 (en) 1994-04-27 1994-04-27 High-speed automatic gain control method for receiver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11399594A JP3270978B2 (en) 1994-04-27 1994-04-27 High-speed automatic gain control method for receiver circuit

Publications (2)

Publication Number Publication Date
JPH07297784A true JPH07297784A (en) 1995-11-10
JP3270978B2 JP3270978B2 (en) 2002-04-02

Family

ID=14626427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11399594A Expired - Fee Related JP3270978B2 (en) 1994-04-27 1994-04-27 High-speed automatic gain control method for receiver circuit

Country Status (1)

Country Link
JP (1) JP3270978B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006352792A (en) * 2005-06-20 2006-12-28 Hochiki Corp Signal amplifier
JP2009177615A (en) * 2008-01-25 2009-08-06 Denso Corp Wireless receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006352792A (en) * 2005-06-20 2006-12-28 Hochiki Corp Signal amplifier
JP2009177615A (en) * 2008-01-25 2009-08-06 Denso Corp Wireless receiver

Also Published As

Publication number Publication date
JP3270978B2 (en) 2002-04-02

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