JPH0732976U - Thick film circuit board - Google Patents

Thick film circuit board

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Publication number
JPH0732976U
JPH0732976U JP6376493U JP6376493U JPH0732976U JP H0732976 U JPH0732976 U JP H0732976U JP 6376493 U JP6376493 U JP 6376493U JP 6376493 U JP6376493 U JP 6376493U JP H0732976 U JPH0732976 U JP H0732976U
Authority
JP
Japan
Prior art keywords
electronic component
circuit board
hole
electrode
thick film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6376493U
Other languages
Japanese (ja)
Inventor
宏敏 押川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP6376493U priority Critical patent/JPH0732976U/en
Publication of JPH0732976U publication Critical patent/JPH0732976U/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】 【目的】 高密度化が達成され、且つその接合信頼性が
向上する厚膜回路基板を提供する。 【構成】 絶縁基板2の両主面に配線パターン3、4を
有し、該両配線パターン3、4をランド電極5b、5c
を有する導通スルーホール5によって接続するととも
に、前記配線パターン3、4に表面実装可能な電子部品
6の端子電極6b、6cを半田接合して成る厚膜回路基
板1において、前記電子部品6の端子電極6b、6cが
導通スルーホール5のランド電極5b、5c上に載置さ
れ、半田S接合されている。
(57) [Abstract] [PROBLEMS] To provide a thick film circuit board which achieves high density and has improved bonding reliability. [Structure] Wiring patterns 3 and 4 are provided on both main surfaces of an insulating substrate 2, and both wiring patterns 3 and 4 are land electrodes 5b and 5c.
In the thick film circuit board 1 formed by soldering the terminal electrodes 6b and 6c of the electronic component 6 which can be surface-mounted to the wiring patterns 3 and 4 while being connected by the conductive through hole 5 having The electrodes 6b and 6c are placed on the land electrodes 5b and 5c of the conduction through hole 5 and solder S-bonded.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、セラミック、耐熱性ガラスエポキシ基板の両主面に配置パターンを 有する回路基板上に、表面実装可能な電子部品を配置した厚膜回路基板に関する ものである。 The present invention relates to a thick film circuit board in which surface mountable electronic components are arranged on a circuit board having arrangement patterns on both main surfaces of a ceramic and heat resistant glass epoxy board.

【0002】[0002]

【従来の技術】[Prior art]

厚膜回路基板上に電子部品を搭載する場合、電子部品は、該厚膜回路基板を貫 通するリード端子を有するリード端子型電子部品や、電子部品素体の裏面に端子 電極を有する表面実装型電子部品や、電子部品素体から延出するリード端子を厚 膜回路基板に対して平行となるように屈曲した表面実装型電子部品などが用いら れている。 When an electronic component is mounted on a thick film circuit board, the electronic component may be a lead terminal type electronic component having a lead terminal penetrating the thick film circuit board or a surface mount having a terminal electrode on the back surface of the electronic component body. Molded electronic components and surface-mounted electronic components in which lead terminals extending from the electronic component body are bent so as to be parallel to the thick film circuit board are used.

【0003】 リード端子型電子部品は、配線パターン部分に形成されたリード端子貫通孔に 、電子部品のリード端子を挿入し、貫通したリード端子の周囲に半田を供給して 半田接合を行っていた。In the lead terminal type electronic component, the lead terminal of the electronic component is inserted into the lead terminal through hole formed in the wiring pattern portion, and solder is supplied around the penetrated lead terminal to perform solder joining. .

【0004】 また、表面実装型電子部品は、厚膜回路基板の配線パターン上にクリーム半田 を塗布し、該クリーム半田上に電子部品の端子電極部分を載置して、リフロー炉 によってリフロー半田接合していた。In the surface mount type electronic component, cream solder is applied on the wiring pattern of the thick film circuit board, the terminal electrode portion of the electronic component is placed on the cream solder, and reflow solder bonding is performed by a reflow furnace. Was.

【0005】[0005]

【考案が解決しようとする課題】[Problems to be solved by the device]

近年、厚膜回路基板に形成する配線パターンの高密度化のため、両主面に配線 パターンを形成していた。 In recent years, in order to increase the density of wiring patterns formed on thick film circuit boards, wiring patterns have been formed on both main surfaces.

【0006】 また、その回路基板に搭載する電子部品は、リード型電子部品の方が、実装に 要する専有面積が少ないが、高密度化に適しているように思えるが、半田接合の 工程が煩雑になること、その裏面側がデットスペースとなることなどを考慮すれ ば、表面実装型電子部品の方が全体として、高密度化、半田接合の容易性に対応 し易いものとなる。Regarding the electronic components to be mounted on the circuit board, the lead-type electronic components have a smaller occupied area for mounting, but it seems to be suitable for high density, but the solder bonding process is complicated. In consideration of the above, and that the back surface side becomes a dead space, the surface mount type electronic component as a whole is easier to deal with higher density and easier soldering.

【0007】 しかし、従来の表面実装型電子部品は、配線パターンに表面実装型電子部品を 搭載するために電極パッドを形成する必要があり、この電極パッドが高密度化の 障害となっていた。However, in the conventional surface mount type electronic component, it is necessary to form an electrode pad in order to mount the surface mount type electronic component on the wiring pattern, and this electrode pad has been an obstacle to high density.

【0008】 本考案は、上述の問題点に鑑みて案出されたものであり、その目的は、表面実 装型電子部品の搭載部分に改良を加えて、一層の高密度化が達成され、且つその 接合信頼性が向上する厚膜回路基板を提供するものである。The present invention has been devised in view of the above problems, and an object thereof is to improve the mounting density of surface mounted electronic components to achieve higher density. Further, the present invention provides a thick film circuit board having improved bonding reliability.

【0009】[0009]

【課題を解決するための手段】[Means for Solving the Problems]

本考案は、絶縁基板の両主面に配線パターンを有し、該両配線パターンをラン ド電極を有する導通スルーホールによって接続するとともに、前記絶縁基板上に 表面実装可能な端子電極を有する電子部品を配置して成る厚膜回路基板において 、前記電子部品の端子電極が導通スルーホールのランド電極上に載置され、半田 接合されている厚膜回路基板である。 The present invention provides an electronic component having wiring patterns on both main surfaces of an insulating substrate, connecting both wiring patterns by a conductive through hole having a land electrode, and having a surface mountable terminal electrode on the insulating substrate. In the thick film circuit board, the terminal electrode of the electronic component is placed on the land electrode of the conductive through hole and solder-bonded.

【0010】[0010]

【作用】[Action]

本考案によれば、回路基板の両主面に所定配線パターンが形成されているため 、回路基板上での配線パターンの高密度化が達成される。 According to the present invention, since the predetermined wiring patterns are formed on both main surfaces of the circuit board, it is possible to achieve high density of the wiring patterns on the circuit board.

【0011】 また、その主面に搭載される電子部品が表面実装型電子部品であるため、半田 接合が、クリーム半田の塗布、電子部品の載置、リフロー処理であるため、多数 の電子部品を一括的に半田接合を行うことができる。Further, since the electronic component mounted on the main surface is a surface mount type electronic component, the solder joining is application of cream solder, placement of the electronic component, and reflow treatment, so that a large number of electronic components are required. Solder joining can be performed collectively.

【0012】 その表面実装型電子部品は、その端子電極が、両主面に形成された配線パター ンを接続するための導通スルーホールの開口周囲のランド電極に接合されている ため、表面実装型電子部品を接続するためだけの電極パッドを形成する必要がな いため、配線パターン及び電子部品の搭載に要する占有面積が実質的に減少する ので、配線パターンの一層の高密度化が容易に達成できる。Since the terminal electrodes of the surface mount type electronic component are bonded to the land electrodes around the openings of the conductive through holes for connecting the wiring patterns formed on both main surfaces, the surface mount type electronic component is Since it is not necessary to form electrode pads only for connecting electronic components, the occupied area required for mounting the wiring patterns and electronic components is substantially reduced, so that higher density wiring patterns can be easily achieved. .

【0013】 また、表面実装型電子部品の端子電極とランド電極とを接合するための半田が 、それらの界面に介在されるとともに、さらに端子電極の接合面と直交する導通 スルーホールの内壁面の導体膜との間でも半田メニスカスが形成されるため、表 面実装型電子部品とランド電極とが一層強固に半田接合されるため、接合信頼性 が向上する。Further, the solder for joining the terminal electrode and the land electrode of the surface mount type electronic component is interposed at the interface between them, and further, on the inner wall surface of the conductive through hole orthogonal to the joining surface of the terminal electrode. A solder meniscus is also formed between the conductor film and the surface mounting type electronic component and the land electrode is soldered more firmly, so that the joint reliability is improved.

【0014】[0014]

【実施例】【Example】

以下、本考案を図面に基づいて説明する。図1は、本考案に係る厚膜回路基板 の部分平面図であり、図2はその断面図である。 Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 is a partial plan view of a thick film circuit board according to the present invention, and FIG. 2 is a sectional view thereof.

【0015】 本考案の厚膜回路基板は、基板2、表面側の配線パターン3、裏面側の配線パ ターン4、導通スルーホール5から成る回路基板1と、表面実装型電子部品6と から構成されている。The thick film circuit board of the present invention comprises a circuit board 1 including a board 2, a front side wiring pattern 3, a back side wiring pattern 4 and a conductive through hole 5, and a surface mount type electronic component 6. Has been done.

【0016】 回路基板1を構成する基板2は、セラミック、耐熱性ガラスエポキシなどであ る。基板2の表面には所定パターンの配線パターン3が形成され、その裏面には 、所定パターンの配線パターン4が夫々形成されている。また、基板2には、そ の厚み方向を貫き、両配線パターン3、4を接続するための導通スルーホールと なる貫通孔が形成されている。The board 2 that constitutes the circuit board 1 is made of ceramic, heat-resistant glass epoxy, or the like. A wiring pattern 3 having a predetermined pattern is formed on the front surface of the substrate 2, and a wiring pattern 4 having a predetermined pattern is formed on the back surface thereof. Further, the substrate 2 is formed with a through hole which penetrates in the thickness direction thereof and serves as a conductive through hole for connecting the two wiring patterns 3 and 4.

【0017】 配線パターン3、4は、Ag、Cuなどを主成分とする導電性ペーストを印刷 ・焼きつけされて形成されている。The wiring patterns 3 and 4 are formed by printing and baking a conductive paste containing Ag, Cu or the like as a main component.

【0018】 導通スルーホール5は、例えば貫通孔径100〜800μmの内壁面及び両開 口周囲に導体膜5a、5b、5c(以下、内壁面の導体膜を単に導体膜5a、表 面側開口周囲の導体膜をランド電極5b、裏面側開口周囲の導体膜をランド電極 5cという。)が形成されている。The conductive through-holes 5 are, for example, conductor films 5a, 5b, and 5c on the inner wall surface having a through hole diameter of 100 to 800 μm and around both openings (hereinafter, the conductor film on the inner wall surface is simply referred to as the conductor film 5a, the front surface side periphery Is formed on the back surface side opening, and the conductor film around the opening on the back surface side is formed on the land electrode 5c.

【0019】 このような回路基板は、以下の工程により形成される。Such a circuit board is formed by the following steps.

【0020】 まず、所定位置に貫通孔を有する基板2を用意する。次に基板2の表面に、例 えばAg系導電性ペーストを用いて、スクリーン印刷によって表面側の配線パタ ーン3を印刷し、乾燥する。次に、基板2の裏面に、例えばAg系導電性ペース トを用いて、スクリーン印刷によって裏面側の配線パターン4を印刷し、乾燥す る。尚、配線パターン3、4を印刷するにあたり、貫通孔を含みランド電極5b 、5cが形成されるパターンによって形成する。これにより、表面側のランド電 極5bとなるパターンを印刷することにより、貫通孔の内壁面に導電性ペースト が伝わり貫通孔の表面側に内壁面の導体膜5aの一部(表面側の一部)が形成さ れることになり、さらに、裏面側のランド電極5cとなるパターンを印刷するこ とにより、貫通孔の内壁面に導電性ペーストが伝わり貫通孔の裏面側に内壁面の 導体膜5aの一部(裏面側の一部)が形成されることになり、この両面からの印 刷により、貫通孔の内壁面に所定厚みの導体膜5aが形成されることになる。尚 、導電性ペーストの自重により、内壁面に導体膜5aを形成するが、導電性ペー ストの粘度などが大きく関与する。粘度の高い導電性ペーストを用いる場合には 、印刷面と反対面から減圧を加えて、貫通孔から導電性ペーストを吸引しながら 印刷をおこなわても構わない。First, the substrate 2 having a through hole at a predetermined position is prepared. Next, the wiring pattern 3 on the front surface side is printed on the surface of the substrate 2 by screen printing using, for example, an Ag-based conductive paste, and dried. Next, the wiring pattern 4 on the back surface side is printed on the back surface of the substrate 2 by screen printing using, for example, an Ag-based conductive paste, and dried. Incidentally, when the wiring patterns 3 and 4 are printed, the wiring patterns 3 and 4 are formed by a pattern including the through holes to form the land electrodes 5b and 5c. As a result, by printing the pattern that becomes the land electrode 5b on the front surface side, the conductive paste is transmitted to the inner wall surface of the through hole, and a part of the conductor film 5a on the inner wall surface (on the front surface side) Part) is formed, and by printing a pattern to be the land electrode 5c on the back surface side, the conductive paste is transmitted to the inner wall surface of the through hole, and the conductive film on the inner wall surface is formed on the back surface side of the through hole. A part (a part on the back surface side) of 5a is formed, and by printing from both surfaces, a conductor film 5a having a predetermined thickness is formed on the inner wall surface of the through hole. Note that the conductive film 5a is formed on the inner wall surface by the weight of the conductive paste, but the viscosity of the conductive paste and the like play a large role. When a conductive paste having a high viscosity is used, the printing may be performed while applying a reduced pressure from the surface opposite to the printing surface and sucking the conductive paste from the through hole.

【0021】 その後、配線パターン3、4、導通スルーホール5となる導電膜5a、ランド 電極5b、5cを、例えば酸化性雰囲気(大気)中で、500〜700℃で焼き つけることにより、回路基板1が達成される。尚、上述の説明では、焼きつけ工 程を一括的におこなったが、例えば、基板2の表面側から、表面側配線パターン 3、導体膜5aの一部、表面側のランド電極5bを導電性ペーストの印刷により 形成し、乾燥した後、焼きつけを行い、さらに、基板2の裏面側から、裏面側配 線パターン4、導体膜5aの一部、裏面側のランド電極5cを導電性ペーストの 印刷により形成し、乾燥した後、焼きつけを行っても構わない。Thereafter, the wiring patterns 3 and 4, the conductive film 5a to be the conduction through hole 5, and the land electrodes 5b and 5c are baked at, for example, 500 to 700 ° C. in an oxidizing atmosphere (atmosphere) to thereby form a circuit board. 1 is achieved. Although the baking process is performed collectively in the above description, for example, from the front surface side of the substrate 2, the front surface side wiring pattern 3, a part of the conductor film 5a, and the land electrode 5b on the front surface side to the conductive paste. After printing, drying and baking are performed. Further, from the back surface side of the substrate 2, the back surface side wiring pattern 4, a part of the conductor film 5a, and the land electrode 5c on the back surface side are printed by a conductive paste. After forming and drying, baking may be performed.

【0022】 表面実装型電子部品6は、電子部品素体6aの対向する端部に端子電極6b、 6cが形成されたチップ状電子部品、例えば積層セラミックコンデンサ、チップ 抵抗素子、多連抵抗器抵抗素子、チップコイル素子、トリマー部品などや、図示 していないが、電子部品素体から延びるリード端子の先端を、表面実装可能に、 基板2の表面に対して平行に屈曲処理した電子部品、例えば表面実装型発振器、 表面実装型誘電体フィルタ、フラット型半導体部品、ハイブリッド型ICなどが 挙げられる。The surface-mounted electronic component 6 is a chip-shaped electronic component in which terminal electrodes 6b and 6c are formed at opposite ends of an electronic component element body 6a, such as a laminated ceramic capacitor, a chip resistor element, and a multiple resistor resistor. Elements, chip coil elements, trimmer parts, etc., and electronic parts whose lead terminals extending from the electronic part element body are bent so that they can be surface-mounted in parallel to the surface of the substrate 2, although not shown, for example, Surface mount type oscillators, surface mount type dielectric filters, flat type semiconductor parts, hybrid type ICs and the like can be mentioned.

【0023】 表面実装型電子部品6は、基板2の両主面に形成された配線パターン3、4の 一部に端子電極6b、6c又は屈曲処理したリード端子が、半田を介して面実装 されて、半田接合こされている。In the surface-mounted electronic component 6, the terminal electrodes 6b and 6c or the lead terminals subjected to bending treatment are surface-mounted via solder on a part of the wiring patterns 3 and 4 formed on both main surfaces of the substrate 2. It has been soldered.

【0024】 ここで、本考案の特徴的なことは、基板2に形成した配線パターン3、4のパ ターン面積を削減するために、配線パターン3、4の一部となり、電子部品6の 端子電極6b、6cなどと接続する電極パッドを極力排除したことである。Here, a characteristic of the present invention is that the wiring patterns 3 and 4 formed on the substrate 2 become part of the wiring patterns 3 and 4 in order to reduce the pattern area, and the terminals of the electronic component 6 are formed. That is, the electrode pads connected to the electrodes 6b, 6c, etc. are eliminated as much as possible.

【0025】 具体的には、電子部品6の端子電極6b、6cなどと接続する一方又は両方の 電極パッドを、ランド電極5b、5cに代用したことである。例えば、図では、 導通スルーホール5の上には、少なくとも電子部品6の端子電極6bで被われて ている。即ち、電子部品6の端子電極6bが表面側のランド電極5b上に塗布さ れたクリーム半田上に、電子部品6の端子電極6bが載置され、リフロー処理す ることにより、電子部品6の端子電極6bと表面側のランド電極5bが半田接合 されている。尚、配線パターン3及び別の導通スルーホール5の設計により、も う一方の端子電極6bについても、別の導通スルーホール5の表面側ランド電極 5bに接続させても構わない。また、基板2の裏面側の配線パターン4について も同様に電子部品6を接合しても構わない。Specifically, one or both of the electrode pads connected to the terminal electrodes 6b and 6c of the electronic component 6 are substituted for the land electrodes 5b and 5c. For example, in the figure, the conductive through hole 5 is covered with at least the terminal electrode 6b of the electronic component 6. That is, the terminal electrode 6b of the electronic component 6 is placed on the cream solder in which the terminal electrode 6b of the electronic component 6 is applied on the land electrode 5b on the front surface side, and the reflow process is performed to place the terminal electrode 6b of the electronic component 6 The terminal electrode 6b and the land electrode 5b on the front surface side are soldered to each other. Note that, depending on the design of the wiring pattern 3 and the other conductive through hole 5, the other terminal electrode 6b may be connected to the front surface side land electrode 5b of the other conductive through hole 5. Further, the electronic component 6 may be similarly bonded to the wiring pattern 4 on the back surface side of the substrate 2.

【0026】 上述の導通スルーホール5及び電子部品6との接合構造を採用することにより 、上述したように、基板2の配線パターン3、4の形成のための専有面積、電子 部品6の搭載のための専有面積が削減でき、回路基板1の回路の高密度化が達成 できる。By adopting the above-described joining structure of the conductive through hole 5 and the electronic component 6, as described above, the exclusive area for forming the wiring patterns 3 and 4 of the substrate 2 and the mounting of the electronic component 6 can be achieved. Therefore, the occupied area can be reduced, and high density of the circuit of the circuit board 1 can be achieved.

【0027】 さらに、図3に接合部分の断面図で理解できるように、表面実装型電子部品6 電気的接続及び機械的接合を行う半田Sが、表面実装型電子部品6の端子電極6 bとランド電極5bとの界面に介在するとともに、端子電極6bと直交する導体 膜5aとの間でも溶融した半田の表面張力による半田メニスカスS’が形成され るため、特に電子部品6の機械的な接合強度が大きく向上する。Further, as can be understood from the cross-sectional view of the joint portion in FIG. 3, the surface mounting type electronic component 6 solder S for electrical connection and mechanical joining is connected to the terminal electrode 6 b of the surface mounting type electronic component 6. Since the solder meniscus S ′ is formed by the surface tension of the melted solder between the terminal electrode 6b and the conductor film 5a orthogonal to the terminal electrode 6b as well as at the interface with the land electrode 5b, the mechanical joining of the electronic component 6 is particularly important. The strength is greatly improved.

【0028】 また、ランド電極5b側についても同様であり、半田リフロー処理において、 熱や半田Sによりランド電極5bが基板2から引き剥がれる力が作用しても、ラ ンド電極5bには、これと直交する導体膜5aが一体化されているので、剥離な どが発生せず、安定してランド電極5b、導体膜5aが維持されることになり、 上述の半田S、S’との作用と、ランド電極5b、導体膜5aの安定化により、 接合信頼性の高い厚膜回路基板1となる。The same is true for the land electrode 5b side, and even if a force for peeling the land electrode 5b from the substrate 2 due to heat or solder S acts in the solder reflow process, the land electrode 5b is not affected by this force. Since the conductor films 5a orthogonal to each other are integrated, peeling or the like does not occur, and the land electrode 5b and the conductor film 5a are stably maintained. By stabilizing the land electrode 5b and the conductor film 5a, the thick film circuit board 1 with high bonding reliability is obtained.

【0029】 尚、本考案者が種々条件を行った結果、ランド電極5b、5cの形状は、電子 部品6の端子電極6b、6cの形状と対応する形状とするが、貫通孔の径は、少 なくともこの形状よりも大きくならない範囲で、直径100〜800μmとする ことが望ましい。As a result of various conditions conducted by the present inventor, the land electrodes 5b and 5c have a shape corresponding to the shape of the terminal electrodes 6b and 6c of the electronic component 6, but the diameter of the through hole is It is desirable that the diameter is 100 to 800 μm within a range of at least not larger than this shape.

【0030】 直径が100μm未満では、回路基板1に対して穿孔処理することが実質的に 困難となり、また、仮に100μm未満の貫通孔が形成できても、その内壁面に 導体膜5aを形成するために導電性ペーストを印刷した場合、貫通孔の開口部分 を閉塞してしまい、途中で断線が発生し、ランド電極5b、5c間の導通が達成 されない。If the diameter is less than 100 μm, it becomes substantially difficult to perforate the circuit board 1. Even if a through hole having a diameter of less than 100 μm can be formed, the conductor film 5a is formed on the inner wall surface of the through hole. Therefore, when the conductive paste is printed, the opening portion of the through hole is closed, a disconnection occurs in the middle, and the conduction between the land electrodes 5b and 5c cannot be achieved.

【0031】 また、直径が800μmを越えると、ランド電極5bを利用して、表面実装型 電子部品6を半田接合しても、溶融した半田Sが自重で貫通孔内に入り込み、表 面実装型電子部品6を強固に、且つ安定に保持するための半田メニスカスS’が 充分に形成できず、逆に表面実装型電子部品6の半田接合信頼性が低下してしま う。Further, when the diameter exceeds 800 μm, even when the surface mount type electronic component 6 is soldered using the land electrode 5b, the melted solder S enters into the through hole by its own weight, and the surface mount type The solder meniscus S ′ for holding the electronic component 6 firmly and stably cannot be formed sufficiently, and conversely, the solder joint reliability of the surface-mounted electronic component 6 deteriorates.

【0032】 以上のように本考案によれば、構造的に回路基板1上に表面実装型電子部品6 を搭載した厚膜回路基板1の全体の回路を高密度化が達成され、さらに、電子部 品6の端子電極、例えば6bと導通スルーホール5の例えばランド電極5bと半 田接合強度が向上し、さらに、ランド電極5bや導体膜5aの剥離が発生するこ とがなく、半田接合信頼性の向上が達成できる。As described above, according to the present invention, the density of the entire circuit of the thick film circuit board 1 in which the surface mount type electronic component 6 is structurally mounted on the circuit board 1 can be increased, and The solder joint strength between the terminal electrode of the component 6, for example 6b, and the conductive through hole 5, for example, the land electrode 5b, is improved, and the land electrode 5b and the conductor film 5a are not peeled off. It is possible to improve the sex.

【0033】 尚、上述の実施例でと、基板2に単板のセラミック、ガラス−エポキシを用い たが、多層セラミック基板であっても構わない。In the above embodiment, the substrate 2 is made of single-plate ceramic or glass-epoxy, but it may be a multilayer ceramic substrate.

【0034】[0034]

【考案の効果】[Effect of device]

以上、本考案によれば、回路基板の両主面に所定配線パターンが形成されてい ること、さらに、両配線パターンを接続するための導通スルーホールの開口周囲 のランド電極に、表面実装型電子部品が接合していることから、回路基板の表面 配線パターンに、電子部品が接合される電極パッドの形成が省略できるので、厚 膜回路基板の回路全体の高密度化が達成できる。 As described above, according to the present invention, the predetermined wiring patterns are formed on both main surfaces of the circuit board, and further, the surface mounting type electronic device is mounted on the land electrode around the opening of the conductive through hole for connecting both wiring patterns. Since the components are joined together, the formation of electrode pads to which the electronic components are joined can be omitted from the surface wiring pattern of the circuit board, so that it is possible to achieve high density of the entire circuit of the thick film circuit board.

【0035】 また、表面実装型電子部品がクリーム半田の塗布、リフロー処理で接合され、 多数の電子部品を一括的に半田接合できるとともに、その半田が、表面実装型電 子部品の端子電極とランド電極との界面及び端子電極の接合面と直交する導通ス ルーホールの内壁面の導体膜との間でも接合されるためめ、接合信頼性が向上す る。Further, the surface mount type electronic parts are joined by cream solder application and reflow processing, so that a large number of electronic parts can be soldered together at the same time, and the solder is the terminal electrode and the land of the surface mount type electronic part. The bonding reliability is improved because the bonding is performed also at the interface with the electrode and the conductive film on the inner wall surface of the conductive through hole orthogonal to the bonding surface of the terminal electrode.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案に係る厚膜回路基板の部分平面図であ
る。
FIG. 1 is a partial plan view of a thick film circuit board according to the present invention.

【図2】本考案に係る厚膜回路基板の部分断面図であ
る。
FIG. 2 is a partial cross-sectional view of a thick film circuit board according to the present invention.

【図3】本考案に係る厚膜回路基板の接合部分の拡大断
面図である。
FIG. 3 is an enlarged cross-sectional view of a joint portion of the thick film circuit board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・・厚膜回路基板 2・・・・・・・基板 3・・・・・・・表面側の配線パターン 4・・・・・・・裏面側の配線パターン 5・・・・・・・導通スルーホール 5a・・・・・・内壁面の導体膜 5b・・・・・・表面側のランド電極 5c・・・・・・裏面側のランド電極 6・・・・・・・電子部品 6a・・・・・・電子部品素体 6b、6c・・・電子部品の端子電極 S・・・・・・・半田 S’・・・・・・半田のメニスカス 1 --- Thick film circuit board 2 --- Board 3 --- Front side wiring pattern 4 --- Back side wiring pattern 5 --- ... Conduction through hole 5a ... Conductor film on inner wall surface 5b ... Land electrode on front surface 5c ... Land electrode on back surface 6 ...・ ・ Electronic parts 6a ・ ・ Electronic parts body 6b, 6c ・ ・ ・ Terminal electrodes of electronic parts S ・ ・ ・ ・ Solder S '・ ・ ・ ・ ・ ・ Sensor meniscus

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 絶縁基板の両主面に配線パターンを有
し、該両配線パターンをランド電極を有する導通スルー
ホールによって接続するとともに、前記絶縁基板上に表
面実装可能な端子電極を有する電子部品を配置して成る
厚膜回路基板において、 前記電子部品の端子電極が導通スルーホールのランド電
極上に載置され、半田接合されていることを特徴とする
厚膜回路基板。
1. An electronic component having wiring patterns on both main surfaces of an insulating substrate, connecting both wiring patterns by a conductive through hole having a land electrode, and having a surface mountable terminal electrode on the insulating substrate. In the thick film circuit board, the terminal electrode of the electronic component is placed on the land electrode of the conductive through hole and solder-bonded.
JP6376493U 1993-11-29 1993-11-29 Thick film circuit board Pending JPH0732976U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6376493U JPH0732976U (en) 1993-11-29 1993-11-29 Thick film circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6376493U JPH0732976U (en) 1993-11-29 1993-11-29 Thick film circuit board

Publications (1)

Publication Number Publication Date
JPH0732976U true JPH0732976U (en) 1995-06-16

Family

ID=13238779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6376493U Pending JPH0732976U (en) 1993-11-29 1993-11-29 Thick film circuit board

Country Status (1)

Country Link
JP (1) JPH0732976U (en)

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