JPH0733017U - Temperature compensated oscillator - Google Patents

Abstract

(57) [Summary] [Object] To provide a temperature-compensated oscillator in which digital information of temperature from a temperature detection circuit is latched by one latch circuit. [Structure] Temperature detection circuit 21 and this temperature detection circuit 21
The memory circuit 29 addressed by the parallel digital signal of the temperature output from the output terminal 39, the output terminal 39 for outputting the parallel digital signal via the parallel-serial conversion circuit 25, the latch circuit 23, and the latch pulse supply circuit. 32 and the parallel digital signal is latched by the latch circuit 23.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a temperature-compensated oscillator that obtains an oscillation frequency with high accuracy even when ambient temperature changes.

[0002]

[Prior art]

 In recent years, a temperature-compensated oscillator that adjusts the change in oscillation frequency due to temperature with a digital signal has been developed as an oscillator for communication devices, and more stable oscillation characteristics and high frequency accuracy have been obtained.

The structure of this temperature-compensated oscillator and its operating principle will be described with reference to the circuit block diagram of FIG.

As shown in FIG. 2, the temperature detection circuit 51 outputs a parallel digital signal of temperature information to a parallel signal bus 55. The first latch circuit 61 latches the digital signal output to the parallel signal bus 55 to address the memory circuit 65. The memory circuit 65 outputs the stored digital data as a digital signal to the parallel signal bus 67 in response to this addressing.

The digital-analog conversion circuit 73 applies an analog DC voltage to the frequency adjustment circuit 75 based on the digital signal output from the memory circuit 65. The frequency adjustment circuit 75 adjusts the oscillation frequency of the crystal oscillation circuit 77 by the applied analog DC voltage.

The adjustment amount of the oscillation frequency of the crystal oscillation circuit 77 changes according to the analog DC voltage. This analog DC voltage changes according to the digital signal input to the digital-analog conversion circuit 73.

The digital signal is data stored in the memory circuit 65. Therefore, by storing in the memory circuit 65 data that cancels the change in the oscillation frequency of the crystal oscillation circuit 77 at that temperature, it is possible to obtain an oscillation output with high frequency accuracy over a wide temperature range.

Next, a method of writing this data in the memory circuit 65 will be described. A temperature-compensated oscillator is placed in a thermostatic chamber to maintain a constant temperature, and the digital value of the temperature output from the temperature detection circuit 51 is converted from parallel to serial while the clock is sequentially input from the clock input terminal 69. The data is read from the external terminal 71 via the circuit 57.

At this time, the digital value of the temperature output from the temperature detection circuit 51 may change during reading.

That is, even if the temperature is kept constant by the constant temperature bath, if the temperature is at the boundary of two digital values, the digital value is 1 at the maximum each time the temperature detection circuit samples the temperature information. Change.

In particular, when a carry of a digital value occurs, the read digital value is greatly deviated, and the correct value cannot be read. This phenomenon described above will be described more concretely by taking an 8-bit digital temperature value as an example. It is assumed that the digital value of the temperature held in the constant temperature bath is on the boundary between "01111111" and "10000000".

In this case, the temperature detection circuit has a high possibility of alternately outputting these two values for each sampling. When the digital value “01111111” is read to the external terminal from the lowest bit and the sampling of the temperature detection circuit occurs during the reading of the 4th bit and the digital value changes to “10000000”, the highest bit is It changes from "0" to "1" and other bits change from "1" to "0".

Therefore, the finally read value is “10000111”, which is largely deviated from the correct value.

In order to avoid such an inconvenience, during the reading period, the digital value of the temperature is latched by the second latch circuit 53 and the temperature detection circuit performs sampling on the parallel signal bus 55 when the temperature detection circuit performs sampling. Even if the output digital value changes, the digital input value to the parallel-serial conversion circuit 57 does not change.

By doing so, the digital value of the temperature can be stably read from the external terminal 71.

Next, digital data that cancels the change in the oscillation frequency of the crystal oscillation circuit 77 at that temperature is obtained.

In this way, one address data and digital data corresponding to the address are obtained. This process is performed at multiple temperatures to obtain digital data corresponding to multiple sets of addresses and their addresses. The memory circuit 65 is addressed by the address thus obtained, and the corresponding digital data is written in the memory circuit 65.

[0018]

[Problems to be solved by the device]

 However, the temperature-compensated oscillator shown in FIG. 2 requires the two latch circuits of the first latch circuit 61 and the second latch circuit 53, and has a problem that the circuit scale increases.

An object of the present invention is to provide a temperature-compensated oscillator with a simple circuit configuration by reducing the number of latch circuits.

[0020]

[Means for Solving the Problems]

 In order to achieve the above object, the temperature-compensated oscillator of the present invention includes at least a temperature detection circuit that outputs temperature information as a parallel digital signal, a memory circuit addressed by the parallel digital signal, and the parallel circuit.・ It is equipped with an output terminal that outputs a digital signal via a parallel-serial conversion circuit, and one latch circuit that latches this parallel digital signal. The latch pulse supply means to this latch circuit is The feature is that it has the function of stopping the supply.

[0021]

【Example】

 Next, a temperature-compensated oscillator according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit block diagram showing the configuration of a temperature compensation oscillator according to an embodiment of the present invention.

As shown in FIG. 1, the temperature-compensated oscillator of the present invention includes a temperature detection circuit 21, a latch circuit 23, a parallel-serial conversion circuit 25, a memory circuit 29, and a latch pulse supply circuit 32. , An output terminal 39, a digital-analog conversion circuit 41, a frequency adjustment circuit 45, and a crystal oscillation circuit 47.

The temperature detection circuit 21 may have a configuration capable of outputting temperature information as a digital signal. For example, as the temperature detection circuit 21, a thermistor is connected to a constant current source and a voltage change of the thermistor is converted by an analog-digital converter, or two oscillation counting circuits composed of ring oscillators having different temperature characteristics. For example, a device using the ratio of oscillation frequencies can be used.

The latch circuit 23 inputs a parallel digital signal, latches it by a latch pulse, and latches it until the next latch pulse, regardless of the parallel digital signal input. It is a circuit that outputs parallel digital signals.

The parallel-serial conversion circuit 25 is a circuit that converts a parallel signal into a serial signal and outputs the serial signal to the output terminal 39. It is possible to use a data type flip-flop circuit that is connected in series as many as the required number of bits.

The memory circuit 29 is a circuit for outputting digital data which is addressed by a parallel digital signal of temperature information and stored in the memory circuit.

As the memory circuit 29, a non-volatile memory, SRAM (static random access memory), ROM (read only memory) or the like can be used.

The latch pulse supply circuit 32 is a circuit composed of the pulse generation circuit 43 and the AND gate circuit 31 and acting as a latch pulse supply means.

The pulse generation circuit 43 is a circuit that receives an oscillation pulse from the crystal oscillation circuit 47 and generates a pulse with a desired pulse width and timing.

The digital-analog conversion circuit 41 is a circuit that converts a digital signal output from the memory circuit 29 into an analog DC voltage.

The frequency adjusting circuit 45 is a circuit that adjusts the oscillation frequency of the crystal oscillating circuit 47 with an analog DC voltage, and may be a variable capacitance diode or the like.

Next, the operating principle of the temperature-compensated oscillator of the present invention shown in FIG. 1 will be described.

The pulse output of the pulse generation circuit 43 and the control terminal 33 are input to the AND gate circuit 31.

When the signal level of the control terminal 33 is set to “0”, the output signal level of the AND gate circuit 31 becomes “0” regardless of the pulse output of the pulse generation circuit 43.

That is, by setting the signal level of the control terminal 33 to “0”, the supply of the latch pulse from the latch pulse supply circuit 32 to the latch circuit 23 can be stopped.

The temperature detection circuit 21 outputs the temperature information as a parallel digital signal to the latch circuit 23.

The latch circuit 23 receives the latch pulse from the latch pulse supply circuit 32 and latches the parallel digital signal. The latch circuit 23 outputs the latched parallel digital signal to the parallel signal bus 27.

Addressed by the parallel digital signal, the memory circuit 29 outputs the stored digital data to the parallel signal bus 35 as a digital signal. On the other hand, this parallel digital signal is also input to the parallel-serial conversion circuit 25, and by sequentially inputting clocks from the clock input terminal 37, this digital signal can be serially output to the output terminal 39. .

Further, the digital-analog conversion circuit 41 outputs an analog DC voltage according to the digital value of the digital signal output from the memory circuit 29 to the parallel signal bus 35.

The frequency adjustment circuit 45 adjusts the oscillation frequency of the crystal oscillation circuit 47 with an adjustment width according to the analog DC voltage output from the digital-analog conversion circuit 41.

As is clear from the above operation principle, by pre-writing the memory circuit 29 with digital data that cancels the variation of the oscillation frequency of the crystal oscillation circuit 47 at that temperature, a wide temperature range can be obtained. It is possible to obtain an oscillation output with high frequency accuracy over the range.

Next, a method of writing the above digital data in the memory circuit 29 will be described.

The temperature-compensated oscillator of the present invention is placed in a constant temperature bath and kept at a constant temperature. Then, while sequentially inputting the clock from the clock input terminal 37, the parallel digital signal output from the latch circuit 23 to the parallel signal bus 27 is output as the digital value of the temperature information via the parallel-serial conversion circuit 25. Output to the terminal 39.

During this output, by keeping the signal level of the control terminal 33 connected to one input of the AND gate circuit 31 at “0”, the pulse generation circuit 43 shifts to the latch circuit 23. Stops the supply of the latch pulse of.

By doing so, even if the digital value of the temperature information changes while the digital value of the temperature information is being read from the output terminal 39 due to the sampling of the temperature detection circuit 21, the parallel value is changed. Since the digital value input to the serial conversion circuit 25 does not change, the digital value of the temperature information can be read stably.

Next, digital data that cancels the change in the oscillation frequency of the crystal oscillation circuit 47 at that temperature is obtained.

In this way, a set of address data and digital data corresponding to the address can be obtained. This process is performed at multiple temperatures to obtain digital data corresponding to multiple sets of addresses and their addresses.

The memory circuit 29 is addressed by the address thus obtained, and the corresponding digital data is written in the memory circuit 29.

[0049]

[Effect of device]

 As described above, according to the present invention, it is possible to obtain the same effect as the conventional one with only one latch circuit without the need of the two latch circuits as in the conventional one. Therefore, it is possible to reduce the circuit scale. You can

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a temperature-compensated oscillator according to an embodiment of the present invention.

FIG. 2 is a block circuit diagram showing a conventional temperature compensation oscillator.

[Explanation of symbols]

 21 temperature detection circuit 23 latch circuit 25 parallel-serial conversion circuit 29 memory circuit 32 latch pulse supply circuit 39 output terminal

Claims (1)

[Scope of utility model registration request] 1. A temperature detection circuit for outputting temperature information as a parallel digital signal, a memory circuit addressed by the parallel digital signal, and a parallel-serial conversion circuit for outputting the parallel digital signal. Output terminal and a latch circuit for latching the parallel digital signal, and the latch pulse supply means for the latch circuit has a function of stopping the supply of the latch pulse. Oscillator.