JPH0745088A - PROM access circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To obtain a PROM access circuit that enables high-speed access and consumes less power. A read request signal from the microprocessor 1 is input to the chip select terminal CS of the PROM 3, and a PROM selection signal from the address decoder 2 is input to the output enable terminal OE of the PROM 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PROM access circuit, and more particularly to an access circuit capable of accessing a PROM at high speed.

[0002]

2. Description of the Related Art Generally, a PROM (Programmable Read Only Memory) has three types of input terminals, an address input terminal, a chip select input terminal and an output enable input terminal, and a set of data output terminals. P
In the ROM, input signals are supplied to three types of input terminals from a microprocessor such as a microprocessor (MPU, CPU) or a digital signal processor (DSP).
The data stored in the PROM is accessed after all of them are gathered and output from the data output terminal.

Conventionally, there are three methods for accessing the PROM shown in FIGS. 2 to 4 depending on how the microprocessor applies input signals to the three types of input terminals of the PROM. In FIG. 2, the PR signal created by the address signal and the strobe signal from the microprocessor 1 being input to the address decoder 2 to decode the address.
The OM selection signal is input to the chip select terminal CS of the PROM 3, and the address signal and the read request signal from the microprocessor 1 are input to the address terminal A and the output enable terminal OE of the PROM 3, respectively.

In FIG. 3, the address signal, the strobe signal, and the read request signal from the microprocessor 1 are input to the address decoder 2, and the PROM selection signal created by decoding the address is used as the chip select terminal CS of the PROM 3. The address signal is input to the output enable terminal OE and the address signal from the microprocessor 1 is input to the address terminal A of the PROM 3.

In FIG. 4, the address signal, the strobe signal, and the read request signal from the microprocessor 1 are input to the address decoder 2, and the PROM selection signal created by decoding the address is output to the output enable terminal OE of the PROM 3. , The address signal from the microprocessor 1 is input to the address terminal A of the PROM 3, the chip select terminal CS of the PROM 3 is always supplied with the selection signal from the selection circuit 4, and the signal is input to the chip select terminal CS. Chip select terminal CS
Is always active.

The chip select signal, the address signal, and the output enable signal input to the three input terminals of the PROM have their respective delay times defined.
The delay time of each signal generally has the following relationship. t _CS ≧ t _A > t _OE However, t _CS ... Chip select signal delay time t _A ... Address signal delay time t _OE ... Output enable signal delay time Further, the microprocessor 1 is as shown in the time chart of FIG. After outputting the address signal and the read request signal, a strobe signal is output when both of the signals show an accurate value, and the address decoder 2 decodes the address by the strobe signal to create a PROM selection signal and the PROM 3 Give to. Further, the PROM 3 greatly differs in power consumption depending on whether or not the chip select terminal CS is activated, and when the chip select terminal CS is activated, the power consumption increases.

[0007]

[Problems to be Solved by the Invention]
In the access method, the PROM from the address decoder 2
Since the PROM 3 is accessed only when the selection signal is input to the chip select terminal CS, the power consumption is small, while the PROM selection signal from the address decoder 2 is input to the chip selection signal terminal CS. Chip select signal with maximum delay time (CS
Since a delay time of the address decoder 2 is added to create a signal), there is a problem of slow access.

In the PROM access method of FIG. 4, the chip select terminal CS is always supplied with the selection signal from the selection circuit 4, and the chip select terminal CS is always active. Since CS is always active, there is a problem that power consumption is large.

In view of the above, it is an object of the present invention to provide a PROM access circuit which can be accessed at high speed and consumes less power.

[0010]

In order to achieve the above object, the present invention inputs a read request signal from a microprocessor to a chip select terminal of a PROM, and
PRO from the address decoder created by decoding the address with the address signal and strobe signal of the microprocessor at the output enable terminal of the ROM
The feature is that the M selection signal is inputted.

[0011]

Since the read request signal from the microprocessor is input to the chip select terminal of the PROM, the chip select terminal of the PROM is activated by the read request signal and the PROM select signal of the address decoder is input to the output enable terminal. By doing, P
The data stored in the ROM is output.

The read request signal is generally output from the microprocessor at the same time as the address signal, and is input to the chip select terminal CS of the CS signal having the maximum delay time. Therefore, the strobe signal is applied to the address decoder and the PROM selection signal is supplied. When is output, PR
Since the OM is already active, high speed access is possible. Further, the chip select terminal receives an input and becomes active only when a read request signal is output from the microprocessor, so that power consumption can be reduced.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, 1 is a microprocessor (MP
U, CPU), digital signal processor (DS
P) or other microprocessor, 2 is an address decoder,
3 is a PROM, a read request signal and an address signal from the microprocessor 1 are input to the chip select terminal CS and an address terminal A of the PROM 3, respectively, and a strobe signal and an address signal from the microprocessor 1 are input to the address decoder 2. The PROM selection signal created by the address decoder 2 decoding the address by the strobe signal is input to the output enable terminal OE of the PROM.

In the above configuration, the microprocessor 1
When there is a read request from the
3 is input to the chip select terminal CS, and the PROM 3 is placed in the active state. If both the address signals output at the same time as the read request signal are correct, the strobe signal is sent from the microprocessor 1 to the address decoder 2
Given to the PR, which decodes the address and creates it
The OM selection signal is input to the output enable terminal OE of the PROM 3, and the data already stored in the active PROM 3 is output.

[0015]

According to the present invention, since the chip select terminal of the PROM is activated by the read request signal from the microprocessor, the power consumption is little compared with the conventional access method shown in FIGS. Although it is large, the access is fast, and the access speed is a little slower than the conventional access method shown in FIG. In addition, a PROM access circuit with low power consumption can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a first conventional configuration.

FIG. 3 is a block diagram showing a second conventional configuration.

FIG. 4 is a block diagram showing a third conventional configuration.

FIG. 5 is a time chart of an access signal.

[Explanation of symbols]

 1: Microprocessor 2: Address decoder 3: PROM A ... Address input terminal CS ... Chip select input terminal OE ... Output enable input terminal

Claims (1)

[Claims] 1. A PROM chip select input terminal receives a read request signal from a microprocessor,
The PROM select signal of the address decoder created by decoding the address with the address signal and strobe signal of the microprocessor is input to the output enable input terminal of the microprocessor, and the address signal of the microprocessor is input to the address input terminal of the PROM. A PROM access circuit characterized by the above.