JPH0746111A - Semiconductor relay - Google Patents
Semiconductor relayInfo
- Publication number
- JPH0746111A JPH0746111A JP19042693A JP19042693A JPH0746111A JP H0746111 A JPH0746111 A JP H0746111A JP 19042693 A JP19042693 A JP 19042693A JP 19042693 A JP19042693 A JP 19042693A JP H0746111 A JPH0746111 A JP H0746111A
- Authority
- JP
- Japan
- Prior art keywords
- input
- emitting element
- light emitting
- current
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 8
- 239000008186 active pharmaceutical agent Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、光学分離を用いた半導
体リレーに関する。FIELD OF THE INVENTION The present invention relates to a semiconductor relay using optical isolation.
【０００２】[0002]
【従来の技術】従来、この種の半導体リレーとして、図
６に示す構成のものが存在する。このものは、入力側の
信号に応答して発光する発光素子1 と、発光素子1 から
の光を受けて光起電力を発生する光電素子2 と、光電素
子2 の光起電力により駆動され出力側を開閉制御するＭ
ＯＳＦＥＴ3 と、を備えている。2. Description of the Related Art Conventionally, as this type of semiconductor relay, there is one having a structure shown in FIG. This is a light-emitting element 1 that emits light in response to a signal on the input side, a photoelectric element 2 that receives light from the light-emitting element 1 to generate photoelectromotive force, and an output that is driven by the photoelectromotive force of the photoelectric element 2. M that controls the opening and closing of the side
And OSFET3.
【０００３】さらに詳しくは、図７に示す入力電圧Eiが
入力抵抗Riを介して発光素子1 に印加されると、図７に
示す入力電流Iiが発光素子1 に流れることによって発光
素子1 が発光し、その光を受けた光電素子2 が光起電力
を発生し、その光起電力によりゲート電圧を高められた
ＭＯＳＦＥＴ3 がＯＮ状態になり、出力負荷 R0 に出力
電源E0が供給される。このときのＭＯＳＦＥＴ3 は入力
電圧Eiが印加された時点と同時ではなく時間的に遅れて
ＯＮ状態になる。すなわち、ＭＯＳＦＥＴ3 の出力電圧
は、図７に示すように、ＯＦＦ状態ではE0であったの
が、入力電流Iiの流れ始めた時点よりも遅れて略零にな
り、この遅れ時間がいわゆる動作時間T である。そし
て、この動作時間T は、図８に示すように、入力電流Ii
が小さくなるにつれて長くなる。More specifically, when the input voltage Ei shown in FIG. 7 is applied to the light emitting element 1 through the input resistor Ri, the input current Ii shown in FIG. 7 flows to the light emitting element 1 so that the light emitting element 1 emits light. Then, the photoelectric element 2 that receives the light generates a photoelectromotive force, the MOSFET 3 whose gate voltage is increased by the photoelectromotive force is turned on, and the output power source E 0 is supplied to the output load R 0 . At this time, the MOSFET3 is turned on with a time delay, not at the time when the input voltage Ei is applied. That is, as shown in FIG. 7, the output voltage of the MOSFET3, which was E 0 in the OFF state, becomes almost zero after the time when the input current Ii starts to flow, and this delay time is the so-called operating time. T. Then, as shown in FIG. 8, the operating time T is equal to the input current Ii
Becomes smaller and becomes longer.
【０００４】[0004]
【発明が解決しようとする課題】上記した従来の半導体
リレーにあっては、動作時間T は入力電流Iiが小さくな
るにつれて長くなるから、これを所定の動作時間T0より
も短くするためには、入力電圧Eiが最小値Ei0 のときに
入力電流Iiを一定値Ii0 以上にしなければならない。In the conventional semiconductor relay described above, the operating time T becomes longer as the input current Ii becomes smaller. Therefore, in order to make this shorter than the predetermined operating time T 0 , When the input voltage Ei is the minimum value Ei 0 , the input current Ii must be set to a constant value Ii 0 or more.
【０００５】ところが、入力電圧Eiが最小値Ei0 よりも
大きく例えば２Ei0 になったとき、入力電流Iiは２Ii0
となって動作時間T はT0よりも短くなるが、入力抵抗Ri
は一定のため入力消費電力は４倍になって発熱が問題と
なる。逆に、発熱を抑えるためには、入力電圧Eiの値に
よって入力抵抗Riを可変にする必要がある。[0005] However, when the input voltage Ei becomes greater example 2Ei 0 than the minimum value Ei 0, the input current Ii is 2II 0
Therefore, the operating time T becomes shorter than T 0 , but the input resistance Ri
Is constant, the input power consumption is quadrupled and heat generation becomes a problem. On the contrary, in order to suppress heat generation, it is necessary to make the input resistance Ri variable depending on the value of the input voltage Ei.
【０００６】本発明は、上記事由に鑑みてなしたもの
で、その目的とするところは、入力電圧を大きくしても
入力消費電力を変えずに所定の動作時間を確保すること
ができる半導体リレーを提供することにある。The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor relay capable of ensuring a predetermined operation time without changing the input power consumption even if the input voltage is increased. To provide.
【０００７】[0007]
【課題を解決するための手段】上記した課題を解決する
ために、本発明の半導体リレーは、入力側の信号に応答
して発光する発光素子と、発光素子からの光を受けて光
起電力を発生する光電素子と、光電素子の光起電力によ
り駆動され出力側を開閉制御するＭＯＳＦＥＴと、を備
えてなる半導体リレーにおいて、ゲート・ソース間に抵
抗器を接続したデプレッション型ＭＯＳＦＥＴが発光素
子に直列接続されてなる構成になっている。In order to solve the above-mentioned problems, a semiconductor relay of the present invention comprises a light emitting element which emits light in response to a signal on the input side and a photovoltaic element which receives light from the light emitting element. In a semiconductor relay comprising a photoelectric element that generates a voltage and a MOSFET that is driven by the photovoltaic power of the photoelectric element to control the opening and closing of the output side, a depletion type MOSFET in which a resistor is connected between the gate and the source is used as a light emitting element. It is configured to be connected in series.
【０００８】[0008]
【作用】本発明の半導体リレーによれば、発光素子に直
列接続されたデプレッション型ＭＯＳＦＥＴは、ゲート
・ソース間に抵抗器と共にその間に存在するいわゆる奇
生容量を並列接続した状態にあるから、入力電圧の印加
と同時に入力電流はＯＮ状態にあるデプレッション型Ｍ
ＯＳＦＥＴから奇生容量への大きな充電電流として発光
素子に流れて所定の動作時間を確保するとともに、その
後に奇生容量間つまりデプレッション型ＭＯＳＦＥＴの
ゲート・ソース間電圧は接続した抵抗器で決まる所定値
まで小さくなって入力電流も前記充電電流よりも小さな
値で一定となり、しかもこの一定入力電流はデプレッシ
ョン型ＭＯＳＦＥＴの特性により、入力電圧を大きくし
ても変化しないので、入力消費電力は大きくならない。According to the semiconductor relay of the present invention, since the depletion type MOSFET connected in series to the light emitting element is in a state in which the resistor and the so-called odd capacitance existing therebetween are connected in parallel between the gate and the source, Depletion type M in which input current is in the ON state at the same time as voltage is applied
A large charging current from the OSFET to the odd capacitance flows to the light emitting element to secure a predetermined operation time, and thereafter the voltage between the odd capacitance, that is, the gate-source voltage of the depletion type MOSFET is a predetermined value determined by the connected resistor. The input current becomes constant at a value smaller than the charging current, and the constant input current does not change even if the input voltage is increased due to the characteristics of the depletion type MOSFET, so that the input power consumption does not increase.
【０００９】[0009]
【実施例】本発明の一実施例を図１乃至図５に基づいて
以下に説明する。なお、従来例と実質的に機能が同一の
部材には同一の符号を付す。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIGS. The members having substantially the same functions as those of the conventional example are designated by the same reference numerals.
【００１０】その回路構成は、図１に示すように、入力
端T1,T2 間には、発光素子1 と入力抵抗Riとの直列回路
に、さらにゲートG ・ソースS に抵抗器R1を接続したデ
プレッション型ＭＯＳＦＥＴ4 が直列接続されている。
このゲートG ・ソースS 間には、破線で示すように、Ｍ
ＯＳＦＥＴ4 に存在するいわゆる奇生容量C が実質的に
並列接続された状態にある。また出力端T3,T4 間には、
発光素子1 からの光を受けて光起電力を発生する光電素
子2 と、光電素子2 の光起電力により駆動され出力側を
開閉制御するＭＯＳＦＥＴ3 と、が接続されている。As shown in FIG. 1, the circuit configuration is such that a series circuit of the light emitting element 1 and the input resistance Ri is provided between the input terminals T 1 and T 2 , and a resistor R 1 is connected to the gate G and the source S. The depletion type MOSFET 4 connected to is connected in series.
Between the gate G and the source S, as shown by the broken line, M
The so-called odd capacitance C existing in the OSFET4 is substantially connected in parallel. Moreover, between the output terminals T 3 and T 4 ,
A photoelectric element 2 that generates a photoelectromotive force by receiving light from the light emitting element 1 and a MOSFET 3 that is driven by the photoelectromotive force of the photoelectric element 2 and that controls the opening and closing of the output side are connected.
【００１１】上記した入力端T1,T2 間の回路構成の具体
的な構造は、図１に二点鎖線で示すように、ＭＯＳＦＥ
Ｔ4 と入力抵抗Riと抵抗器R1とからなるＩＣ5 及び発光
素子1 を、図２に示すように、入力端T1,T2 の各端子先
端部に電気的に固定し、その間を金線6 で接続したもの
となっている。The concrete structure of the circuit configuration between the input terminals T 1 and T 2 described above is, as shown by the chain double-dashed line in FIG.
The IC5 and the light emitting element 1 made of T4 and an input resistor Ri resistor R 1 Tokyo, as shown in FIG. 2, electrically secured to the terminals tip of the input end T 1, T 2, gold wires therebetween It is connected with 6.
【００１２】ところで、デプレッション型ＭＯＳＦＥＴ
4 は、ドレイン・ソース間電圧ＶDSに対するドレイン電
流ＩD の特性が図４に示すようになっており、ゲート・
ソース間電圧ＶGS=0から−ＶGS1 及び−ＶGS2 と減少す
るにつれてＩD は小さくなり、しきい値電圧−ＶGS3 に
なるとＩD は流れなくなる。ここで、ＶGS= −ＶGS2の
ときのＩD をI2として、ゲート・ソース間の抵抗器R1を
I2・R1= −ＶGS2 となるよう選定してあり、このときＶ
DSを大きくしてもＩD = I2であって一定の値となる。Depletion type MOSFET
4 shows the characteristics of the drain current I D with respect to the drain-source voltage V DS as shown in FIG.
I D becomes smaller as the source-to-source voltage V GS = 0 decreases to −V GS1 and −V GS2 , and I D stops flowing at the threshold voltage −V GS3 . Here, when V GS = −V GS2 , I D is I 2 , and the resistor R 1 between the gate and the source is
It is selected so that I 2 · R 1 = −V GS2 . At this time, V
Even if DS is increased, I D = I 2 , which is a constant value.
【００１３】次に動作を説明する。図３に示すように、
入力電圧Eiが入力端T1,T2 間に印加されると、デプレッ
ション型ＭＯＳＦＥＴ4 は常閉つまりＯＮ状態にあるか
ら、入力電流IiはドレインD ・ソースS 間を通ってゲー
トG ・ソースS 間に接続されている奇生容量C への大き
な充電電流としてI1が流れる。その後、奇生容量C 間つ
まりＭＯＳＦＥＴ4 のゲート・ソース間電圧ＶGSは接続
した抵抗器R1で決まる所定値つまり−ＶGS2 まで小さく
なって安定することによって、入力電流Iiも上記したよ
うにI2（ドレイン電流でもある）で安定して定常電流と
なる。ここで、入力電圧Eiを大きくしてＶDSを大きくし
た場合、印加と同時に流れる入力電流I1は大きくなる
が、その後の定常電流I2は、図３に示すように一定とな
り、入力抵抗Riにおける入力消費電力は大きくならな
い。Next, the operation will be described. As shown in FIG.
When the input voltage Ei is applied between the input terminals T 1 and T 2 , the depletion type MOSFET 4 is normally closed, that is, in the ON state, so that the input current Ii passes between the drain D and the source S and between the gate G and the source S. I 1 flows as a large charging current to the odd capacitance C connected to. After that, the voltage V GS between the odd capacitance C, that is, the gate-source voltage V GS of the MOSFET 4 decreases to a predetermined value determined by the connected resistor R 1 , that is, -V GS2, and stabilizes, so that the input current Ii also changes to I I as described above. At 2 (which is also the drain current), the steady current is stable. Here, when the input voltage Ei is increased and V DS is increased, the input current I 1 flowing at the same time as the application is increased, but the steady-state current I 2 thereafter becomes constant as shown in FIG. 3, and the input resistance Ri is increased. Input power consumption at does not increase.
【００１４】このようにして、図３に示す入力電流が発
光素子1 に流れると、発光素子1 が発光し、その光を受
けた光電素子2 が光起電力を発生し、その光起電力によ
りゲート電圧を高められたＭＯＳＦＥＴ3 が駆動されて
ＯＮ状態になって、出力負荷R0 に出力電源E0が供給さ
れる。上記した定常電流I2は光電素子2 でＭＯＳＦＥＴ
3 を駆動できる最小の電流値にしておけばよい。このと
きのＭＯＳＦＥＴ3 は入力電圧Eiが印加された時点と同
時ではなく時間的に遅れてＯＮ状態になる。すなわち、
ＭＯＳＦＥＴ3 の出力電圧は、図３に示すように、ＯＦ
Ｆ状態ではE0であって、入力電流Iiの流れ始めた時点よ
りも遅れて略零になり、この遅れ時間がいわゆる動作時
間T である。そして、この動作時間T は、従来例でも述
べたように、入力電流Iiが小さくなるにつれて長くなる
から、これを所定の動作時間T0よりも短くするために
は、入力電圧Eiが最小値のときに入力電流Iiを一定値以
上にしなければならないが、本実施例では入力電圧Eiの
印加と同時に流れる入力電流I1は大きいので、定常電流
I2とは無関係に所定の動作時間T0よりも短くするのは容
易である。In this way, when the input current shown in FIG. 3 flows through the light emitting element 1, the light emitting element 1 emits light, and the photoelectric element 2 receiving the light generates a photoelectromotive force. The MOSFET 3 whose gate voltage has been increased is driven to be turned on, and the output power E 0 is supplied to the output load R 0 . The above-mentioned steady-state current I 2 is generated by the photoelectric element 2 in the MOSFET.
3 should be set to the minimum current value that can be driven. At this time, the MOSFET3 is turned on with a time delay, not at the time when the input voltage Ei is applied. That is,
As shown in FIG. 3, the output voltage of the MOSFET3 is OF
In the F state, it is E 0 , and becomes substantially zero after the time when the input current Ii starts flowing, and this delay time is the so-called operating time T 2. As described in the conventional example, the operating time T becomes longer as the input current Ii becomes smaller.Therefore, in order to make it shorter than the predetermined operating time T 0 , the input voltage Ei becomes the minimum value. At this time, the input current Ii has to be a certain value or more, but in the present embodiment, the input current I 1 that flows at the same time as the application of the input voltage Ei is large, so the steady current
It is easy to make it shorter than the predetermined operation time T 0 regardless of I 2 .
【００１５】なお、本実施例では、ＭＯＳＦＥＴ3 は、
駆動されてＯＮ状態になる、いわゆるエンハンスメント
型のものを用いているが、駆動されてＯＦＦ状態にな
る、いわゆるデプレッション型のものを用いても、勿論
よい。In this embodiment, the MOSFET 3 is
Although a so-called enhancement type that is driven to an ON state is used, a so-called depletion type that is driven to an OFF state may of course be used.
【００１６】[0016]
【発明の効果】本発明の半導体リレーは、発光素子に直
列接続されたデプレッション型ＭＯＳＦＥＴは、ゲート
・ソース間に抵抗器と共にその間に存在するいわゆる奇
生容量を並列接続した状態にあるから、入力電圧の印加
と同時に入力電流はＯＮ状態にあるデプレッション型Ｍ
ＯＳＦＥＴから奇生容量への大きな充電電流として発光
素子に流れて所定の動作時間を確保するとともに、その
後に奇生容量間つまりデプレッション型ＭＯＳＦＥＴの
ゲート・ソース間電圧は接続した抵抗器で決まる所定値
まで小さくなって入力電流も前記充電電流よりも小さな
値で一定となり、しかもこの一定入力電流はデプレッシ
ョン型ＭＯＳＦＥＴの特性により、入力電圧を大きくし
ても変化しないので、入力消費電力は大きくならない。In the semiconductor relay of the present invention, since the depletion type MOSFET connected in series to the light emitting element is in a state in which a resistor and a so-called odd capacitance existing between the gate and source are connected in parallel, Depletion type M in which input current is in the ON state at the same time as voltage is applied
A large charging current from the OSFET to the odd capacitance flows to the light emitting element to secure a predetermined operation time, and thereafter the voltage between the odd capacitance, that is, the gate-source voltage of the depletion type MOSFET is a predetermined value determined by the connected resistor. The input current becomes constant at a value smaller than the charging current, and the constant input current does not change even if the input voltage is increased due to the characteristics of the depletion type MOSFET, so that the input power consumption does not increase.
【図１】本発明の一実施例を示す回路構成図である。FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.
【図２】同上の入力端間の回路構成の具体的な構造を示
す図である。FIG. 2 is a diagram showing a specific structure of a circuit configuration between the input terminals of the above.
【図３】同上の各特性のタイムチャートを示す図であ
る。FIG. 3 is a diagram showing a time chart of each characteristic of the above.
【図４】同上のデプレッション型ＭＯＳＦＥＴのドレイ
ン・ソース間電圧に対するドレイン電流の特性図であ
る。FIG. 4 is a characteristic diagram of drain current with respect to a drain-source voltage of the above depletion-type MOSFET.
【図５】同上の入力電圧に対する入力電流の特性図であ
る。FIG. 5 is a characteristic diagram of the input current with respect to the input voltage of the above.
【図６】従来例を示す回路構成図である。FIG. 6 is a circuit configuration diagram showing a conventional example.
【図７】同上の各特性のタイムチャートを示す図であ
る。FIG. 7 is a diagram showing a time chart of each characteristic of the above.
【図８】同上の入力電流に対する動作時間の特性図であ
る。FIG. 8 is a characteristic diagram of the operating time with respect to the input current of the above.
1 発光素子 2 光電素子 3 ＭＯＳＦＥＴ 4 デプレッション型ＭＯＳＦＥＴ R1 抵抗器1 Light emitting element 2 Photoelectric element 3 MOSFET 4 Depletion type MOSFET R 1 Resistor
Claims (1)
子と、発光素子からの光を受けて光起電力を発生する光
電素子と、光電素子の光起電力により駆動され出力側を
開閉制御するＭＯＳＦＥＴと、を備えてなる半導体リレ
ーにおいて、 ゲート・ソース間に抵抗器を接続したデプレッション型
ＭＯＳＦＥＴが発光素子に直列接続されてなることを特
徴とする半導体リレー。1. A light emitting element that emits light in response to a signal on the input side, a photoelectric element that generates light by receiving light from the light emitting element, and an output side that is driven by the photovoltaic power of the photoelectric element to open and close the output side. A semiconductor relay comprising a controlling MOSFET and a depletion type MOSFET having a resistor connected between a gate and a source, which is connected in series to a light emitting element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19042693A JPH0746111A (en) | 1993-07-30 | 1993-07-30 | Semiconductor relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19042693A JPH0746111A (en) | 1993-07-30 | 1993-07-30 | Semiconductor relay |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0746111A true JPH0746111A (en) | 1995-02-14 |
Family
ID=16257936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19042693A Withdrawn JPH0746111A (en) | 1993-07-30 | 1993-07-30 | Semiconductor relay |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0746111A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102010030656A1 (en) * | 2010-06-29 | 2011-12-29 | Siemens Aktiengesellschaft | Circuit arrangement for a digital input |
-
1993
- 1993-07-30 JP JP19042693A patent/JPH0746111A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102010030656A1 (en) * | 2010-06-29 | 2011-12-29 | Siemens Aktiengesellschaft | Circuit arrangement for a digital input |
| WO2012000708A1 (en) | 2010-06-29 | 2012-01-05 | Siemens Aktiengesellschaft | Circuit arrangement for a digital input |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20001003 |