JPH0761126B2 - Sync signal separation circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a sync signal separation circuit for separating a sync signal from a composite video signal.

[Conventional technology]

Generally, when two video signals are mixed and combined, it is necessary to synchronize the two video signals with each other. In this way, the sync signal is separated from the video signal and the phase comparison is performed to determine whether the phases match, but the video signal supplied to the sync signal separation unit is used to speed up the determination of the phase comparison. The DC clamp must have a fast response speed. In particular, when a video signal having a different APL (Average picture level) is switched, misclamping occurs for several H, and the sync signal cannot be separated.

FIG. 4 shows a conventional device of this type. In the figure, 1 is a video signal input terminal to which a video signal which is not DC-clamped as shown in FIG. 5 (a) is supplied, and a capacitor C ₁ , resistors R ₁ , R ₂ , a diode 2, The video signal is DC-clamped by the peak clamp circuit composed of the constant voltage source 6 and has a waveform shown in FIG. 5 (b). Reference numeral 4 is a differential amplifier for comparing the potentials by the DC clamped video signal and the potential determined by the variable resistor VR ₁ to separate the synchronizing signal. Reference numeral 5 is an output terminal for outputting the synchronizing signal separated from the video signal by the differential amplifier 4, and produces the output shown in FIG. 5 (c).

Next, the operation will be described. To input terminal 1 Fig. 5 (a)
In the state where the video signal shown in FIG. 2 is supplied, the peak potential of the video signal at the time of the T ₁ portion is almost equal to the potential obtained by adding the forward potential of the diode 2 to the electromotive voltage of the constant voltage source 6 (hereinafter, the clamp potential). Called). Next, the T of the low APL signal
_{When the} signal is switched from the _1st part to the T ₂ part having a high APL, the input terminal 3 of the differential amplifier 4 temporarily becomes a potential higher than the clamp potential, and a forward potential is applied to the diode 2, so that diode 2 2 has low impedance. Resistor R ₂ is shows the impedance of the diode 2 at that time, the resistance R ₂ is R ₂ «R ₁ to R _1, the charging voltage at this time is rapidly discharged by the resistor R _2, the video signal The peak potential gradually becomes the clamp potential.

Next, when the T ₂ part of the high APL signal is switched to the T ₃ part of the low APL, the input terminal 3 of the differential amplifier 4 temporarily becomes a potential lower than the clamp potential, and the diode 2 has a reverse potential. Is added, the diode 2 becomes high impedance. This low potential is charged in the capacitor C ₁ via the resistor R ₁ connected to the power supply V _CC, and the peak potential of the video signal gradually becomes the clamp potential, but since R ₁ >> R ₂ , the above T ₁ It takes longer for the peak potential of the video signal to become equal to the clamp potential when switching from T ₂ to T ₃ than when switching from T ₂ to T ₂ .

Therefore, when the synchronizing signal is separated by the differential amplifier 4, there is a drawback that the period for getting out of the influence becomes long.

Also, if the resistance R ₁ is reduced, the clamping speed will increase,
It is well known that the impedance of the resistor R ₁ with respect to the capacitor C ₁ becomes low, the video signal sags, and the performance of the sync signal separation deteriorates.

When the DC clamped video signal described above is applied to the differential amplifier 4 and the potential determined by the variable resistor VR ₁ is compared with the voltage to separate and extract the synchronizing signal, the result is as shown in FIG.
A part where the sync signal cannot be separated and extracted occurs at the place where the video signals of different APLs are switched. At times, the phenomenon appears significantly when the T ₂ part of the high APL signal is switched to the T ₃ part of the low APL signal.

[Problems to be Solved by the Invention]

Since the conventional sync signal separation circuit is configured as described above, there is a problem that the sync signal cannot be accurately extracted from the video signal whose APL changes.

The present invention has been made to solve the above problems, and an object thereof is to obtain a sync signal separation circuit which can accurately separate sync signals even when APL fluctuates and is stable against noise. And

[Means for Solving the Problems]

A sync signal separation circuit according to the present invention is an amplifier circuit for amplifying a sync signal in a composite video signal to a required level or more, and a sync signal tip portion or a pedestal portion in an output signal of the amplifier circuit is fixed to a constant DC potential. A clamp circuit having a time constant shorter than that of one horizontal synchronizing signal, a clip circuit that clips a video signal at a potential on the video signal side that is a constant potential from the clamp potential of the clamp circuit, and an output signal of the clip circuit. Means for removing the high-frequency component and the low-frequency component from the clip circuit and outputting a signal containing positive and negative polarity pulses corresponding to the rising and falling edges of the synchronizing signal included in the output signal of the clip circuit, and the filter means. A slice circuit for removing a signal having a small signal amplitude among the output signals of the means, and an output signal of the slice circuit as a trigger pulse, It is obtained an interval corresponding to the polarity and the negative polarity pulse as and a bistable multivibrator circuit for generating a synchronizing signal having a pulse width.

[Action]

The sync signal separation circuit according to the present invention extracts the edge portion of the sync signal by the filter and regenerates the sync signal by the pulse corresponding to this edge portion.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 7 is an input terminal of the same composite video signal as 1 shown in FIG. 4, 8 is an amplifier, 9 is a clamp circuit, 10 is a clip circuit, 11 is a high-pass filter (hereinafter HPF), 12
Is a low pass filter (LPF), 13 is a slice circuit, 1
Reference numeral 4 is a waveform shaping circuit, 15 is a bistable multi-vibrator circuit (hereinafter referred to as BMV), and 16 is a sync signal separation output terminal.

FIG. 2 is a diagram showing the waveform of each part from A to G in FIG.

When a composite video signal (same as a in FIG. 5) such as A in FIG. 2 is input to the composite video signal input terminal 7 in FIG. 1,
The amplifier 8 amplifies the synchronizing signal portion to a level higher than the required level, and inputs it to the clamp circuit 9 at the next stage (FIG. 2A). The clamp circuit 9 is, for example, a circuit as shown in FIG. 4, but the clamp time constant composed of C ₁ and R ₁ is such that it can follow the APL fluctuation for each horizontal period (hereinafter referred to as 1H). I have chosen to be short. Therefore, the video signal that has passed through the clamp circuit is sag (low-frequency distortion) as shown in FIG. 2B. However, since the time constant is small, the synchronous tip is clamped without causing an extreme DC fluctuation due to APL fluctuation as in the conventional example (FIG. 5b).

Next, with respect to a signal having a sag as shown in FIG. 2B, the clipping circuit 10 (the differential amplifier 4 in FIG. 4 is set so that the clipping level is smaller than the sync signal level. It can be configured with) and removes unnecessary video signals. This output signal waveform is shown in FIG. 2C, and an enlarged view of the horizontal synchronizing signal portion thereof is shown in c '. When this c or c'signal is input to the HPF 11, the low frequency component is removed, and the high frequency component of the residual video signal and the edge portion of the sync signal,
Then, the noise component is output (FIG. 2D). Fig. 2D
In the pulse width of the pulse corresponding to the rising edge (α) and the falling edge (β) of the sync signal, the clip circuit 10 keeps the video signal smaller than the sync signal amplitude.・ It is larger than the noise component.
When this D signal passes through the LPF 12, the noise component distributed in the higher frequency range is attenuated and a signal waveform like E is obtained.
If the slice level of the slice circuit 13 is set to E, only the pulses corresponding to the rising and falling portions of the sync signal are output (F). This slice circuit has, for example, a hysteresis (dead zone) characteristic as shown in FIG. 3 (a), and specifically, it can be constituted by an anti-parallel circuit of diodes as shown in FIG. 3 (b).

Next, the signal F is input to the waveform shaping circuit 14. The waveform shaping circuit 14 is composed of a Schmitt circuit (not shown) that shapes the input signal into a rectangular wave and an absolute value circuit (not shown) that makes the positive and negative signals have the same polarity. G
It becomes a rectangular wave pulse corresponding to the edge portion of the synchronizing signal.

The pulse shown in G drives the bistable multivibrator 15 (flip-flop circuit) to generate a pulse as shown in FIG. 16 at the G pulse interval (corresponding to the width of the synchronizing signal). This becomes the sync signal separated from the input signal 7.

Although the HPF and the LPF are separated in the above embodiment, they may be replaced by a bandpass filter.

Although the slice level is applied to the video signal portion in the above-mentioned embodiment, the slice level may be increased to the extent that the sync signal is deleted when the amount of sag is small.

〔The invention's effect〕

As described above, according to the sync signal separation circuit of the present invention, an amplifier circuit that amplifies the sync signal in the composite video signal to a required level or more, and a sync signal tip portion or a pedestal portion in the output signal of the amplifier circuit. A clamp circuit having a time constant shorter than that of one horizontal synchronizing signal, which fixes the signal to a constant DC potential, and a clip circuit that clips the video signal at a potential on the video signal side that is a constant potential lower than the clamp potential of the clamp circuit, A high frequency component and a low frequency component in the output signal of the clip circuit are removed to output a signal including positive and negative polarity pulses corresponding to the rising and falling edges of the synchronization signal included in the output signal of the clip circuit. Filter means, a slice circuit for removing a signal having a small signal amplitude from the output signal of the filter means, and a slice signal for outputting the output signal of the slice circuit. Since it is provided with a bistable multivibrator circuit that generates a synchronization signal having a pulse width that is an interval corresponding to the positive polarity pulse and the negative polarity pulse, a video signal with APL fluctuation or noise is input. Even if this is done, there is an effect that a highly accurate and stable synchronization signal separation circuit can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of a sync signal separation circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram in each part of FIG. 1, and FIG. 3 is a diagram showing a slice circuit in an embodiment of the present invention. FIG. 4 is a diagram showing an example of a conventional sync signal separation circuit,
FIG. 5 is an operation waveform diagram of the circuit shown in FIG. 9 is a clamp circuit, 10 is a clipping circuit, 11 is a high pass filter, 12 is a low pass filter, 13 is a slice circuit, 15
Is a bistable multivibrator circuit. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. An amplifier circuit for amplifying a sync signal in a composite video signal to a required level or more, and one horizontal sync for fixing a sync signal tip portion or a pedestal portion in an output signal of the amplifier circuit to a constant DC potential. A clamp circuit having a time constant shorter than that of the signal, a clip circuit that clips the video signal at a potential on the video signal side that is a constant potential than the clamp potential of the clamp circuit, and a high-frequency component in the output signal of the clip circuit, and Filter means for removing a low-frequency component and outputting a signal including positive and negative polarity pulses corresponding to rising and falling of a synchronizing signal included in the output signal of the clip circuit, and an output signal of the filter means. A slice circuit that removes a signal with a small signal amplitude, and a signal that is output from the slice circuit as a trigger pulse. Synchronizing signal separating circuit, characterized in that it comprises a bistable multivibrator circuit for generating a synchronizing signal for the interval corresponding to the pulse and pulse width.