JPH0765729A - Plasma display panel and manufacture thereof - Google Patents
Plasma display panel and manufacture thereofInfo
- Publication number
- JPH0765729A JPH0765729A JP20912393A JP20912393A JPH0765729A JP H0765729 A JPH0765729 A JP H0765729A JP 20912393 A JP20912393 A JP 20912393A JP 20912393 A JP20912393 A JP 20912393A JP H0765729 A JPH0765729 A JP H0765729A
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- glass
- layer
- dielectric layer
- display
- electrodes
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Abstract
(57)【要約】
【目的】AC型PDP及びその製造方法に関し、耐圧の
低下を招く誘電体層中の気泡の発生を抑え、信頼性を高
めることを目的とする。
【構成】表示電極X,Yの放電部分が非脱泡性の低融点
ガラスからなる誘電体層17で被覆され、表示電極X,
Yの内の封止領域ESの外側の部分については化学エッ
チングの可能な低融点ガラス層50で被覆することによ
って製造される。
(57) [Summary] [Object] With respect to an AC PDP and its manufacturing method, it is an object to suppress the generation of bubbles in a dielectric layer which causes a decrease in breakdown voltage, and to improve reliability. A discharge portion of the display electrodes X and Y is covered with a dielectric layer 17 made of non-foaming low melting point glass,
The portion of Y outside the sealing region ES is manufactured by coating with a low melting point glass layer 50 capable of chemical etching.
Description
【0001】[0001]
【産業上の利用分野】本発明は、AC型のプラズマディ
スプレイパネル(PDP)及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AC type plasma display panel (PDP) and its manufacturing method.
【0002】PDPは、表示輝度の上で有利な自己発光
型の表示デバイスであり、画面の大型化及び高速表示が
可能であることから、CRTに代わる表示デバイスとし
て注目されている。[0002] PDPs are self-luminous display devices that are advantageous in terms of display brightness, and because they are capable of large screens and high-speed display, they have attracted attention as display devices that replace CRTs.
【0003】[0003]
【従来の技術】ここでは、本発明の実施例を示す図1及
び図2を参照して従来のPDPの構成について説明す
る。2. Description of the Related Art Here, the configuration of a conventional PDP will be described with reference to FIGS. 1 and 2 showing an embodiment of the present invention.
【0004】PDPは、表示面H側のガラス基板11と
背面側のガラス基板21とを対向配置し、これら一対の
ガラス基板11,21の対向領域の周縁部を封止するこ
とによって、内部に70〜150μm程度の間隙からな
る放電空間30を形成した表示デバイスである。In the PDP, the glass substrate 11 on the display surface H side and the glass substrate 21 on the back side are arranged so as to face each other, and the peripheral portions of the facing regions of the pair of glass substrates 11 and 21 are sealed, whereby the inside of the PDP is internally sealed. The display device has a discharge space 30 formed of a gap of about 70 to 150 μm.
【0005】マトリクス表示方式のPDPでは、多数の
電極が格子状に配列され、各電極の交差部に画定される
単位発光領域を選択的に発光させることによって、任意
の図形や文字の表示が行われる。表示面Hの内で単位発
光領域の画定される領域が表示領域EHとなる。In the matrix display type PDP, a large number of electrodes are arranged in a grid pattern, and a unit light emitting region defined at the intersection of each electrode is selectively made to emit light, thereby displaying arbitrary figures and characters. Be seen. A region within the display surface H where the unit light emitting region is defined becomes a display region EH.
【0006】各ガラス基板11,21に設けられた電極
X,Y,A(図2ではガラス基板21上の電極Aが示さ
れている)は、放電空間30からガラス基板11,21
の端部まで導出され、図示しないフレキシブルプリント
配線板などによって外部の駆動回路と接続される。駆動
回路との電気的な接続を容易とするため、各ガラス基板
11,21は、それぞれの両端縁が他方のガラス基板の
端縁より外側に張り出すように、大きさ及び対向配置の
位置が選定されている。The electrodes X, Y and A provided on the glass substrates 11 and 21 (the electrode A on the glass substrate 21 is shown in FIG. 2) are connected to the glass substrates 11 and 21 from the discharge space 30.
Is led out to the end portion thereof and connected to an external drive circuit by a flexible printed wiring board (not shown) or the like. In order to facilitate the electrical connection with the drive circuit, the glass substrates 11 and 21 are so arranged that the size and the position of the facing arrangement are such that both end edges of each of the glass substrates 11 and 21 extend beyond the end edges of the other glass substrate. It has been selected.
【0007】さて、主放電セルを画定する一対の電極
X,Yに対して交互に所定の電圧を印加するAC型のP
DPにおいては、図1に示されるように、電極X,Yが
低融点ガラスからなる誘電体層17によって被覆され
る。Now, an AC type P that alternately applies a predetermined voltage to a pair of electrodes X and Y that define a main discharge cell.
In the DP, as shown in FIG. 1, the electrodes X and Y are covered with a dielectric layer 17 made of low melting point glass.
【0008】壁電荷によって放電を維持するAC駆動の
上では、電極X,Yの放電部分、すなわち表示領域EH
に対応した部分のみに誘電体層17を設ければよい。し
かし、実際には、PDPの製造に際して電極形成後に行
われる種々の熱処理での電極X,Yの酸化を防止するた
め、誘電体層17の焼成以前の段階から封止ガラス31
による封止を終える段階まで、電極X,Yの露出を避け
る必要がある。In AC driving in which discharge is maintained by wall charges, the discharge portions of the electrodes X and Y, that is, the display area EH.
The dielectric layer 17 may be provided only on the portion corresponding to. However, in actuality, in order to prevent the electrodes X and Y from being oxidized by various heat treatments performed after the electrodes are formed in manufacturing the PDP, the sealing glass 31 is formed from the stage before the firing of the dielectric layer 17.
It is necessary to avoid exposing the electrodes X and Y until the stage of completing the sealing by.
【0009】そこで、従来では、ガラス基板11側の製
造に際して、電極X,Yを設けたガラス基板11のほぼ
全面に低融点ガラスを塗布して焼成することにより、基
板端部まで導出された電極X,Yの全体を覆うように誘
電体層17が設けられ、封止後に電極X,Yの端部(外
部接続部)を露出させるために誘電体層17の一部を取
り除くエッチング処理が行われていた。すなわち、製造
途中においては、単一の低融点ガラス層(誘電体層1
7)によって外部接続部を含めて電極X,Yの全体が保
護されていた。そして、その誘電体層17の材料として
は、脱泡タイプであり且つエッチングの容易な組成の低
融点ガラスペーストが用いられていた。Therefore, conventionally, in manufacturing the glass substrate 11, the low-melting-point glass is applied to almost the entire surface of the glass substrate 11 on which the electrodes X and Y are provided, and the glass substrate 11 is baked. The dielectric layer 17 is provided so as to cover the entire X and Y, and an etching process is performed to remove a part of the dielectric layer 17 to expose the ends (external connection parts) of the electrodes X and Y after sealing. It was being appreciated. That is, a single low melting point glass layer (dielectric layer 1
By 7), the entire electrodes X and Y including the external connection portion were protected. As the material of the dielectric layer 17, a low-melting-point glass paste of a defoaming type and having a composition easy to etch was used.
【0010】[0010]
【発明が解決しようとする課題】脱泡タイプの低融点ガ
ラスペーストは、焼成中の層内で発生するガスを外部へ
放出させることのできる高温(軟化点より十分に高い温
度)での焼成に適したペーストであり、これによれば、
軟化点付近の温度で焼成する非脱泡タイプに比べて透明
性に優れた誘電体層17を得ることができる。The defoaming type low melting point glass paste is suitable for firing at a high temperature (a temperature sufficiently higher than the softening point) at which the gas generated in the layer being fired can be released to the outside. A good paste, according to which
It is possible to obtain the dielectric layer 17 having excellent transparency as compared with the non-defoaming type that is fired at a temperature near the softening point.
【0011】しかし、脱泡タイプのペーストを用いた場
合には、焼成時に金属からなる電極X,Yの表面にガス
が付着し、誘電体層内の電極X,Yの上部に比較的に大
きな気泡が生じ易いという問題があった。However, when the defoaming type paste is used, the gas adheres to the surfaces of the electrodes X and Y made of metal at the time of firing, and is relatively large above the electrodes X and Y in the dielectric layer. There is a problem that bubbles are easily generated.
【0012】このような気泡が生じると、特に面放電型
PDPにおいて、面放電を担う電極X,Yと、単位発光
領域の選択発光のためのアドレス電極Aとの間で、耐圧
が低下することから不要の放電が生じ、表示が乱れたり
アドレス電極Aや駆動回路が破損するおそれがある。When such bubbles are generated, the breakdown voltage is lowered particularly between the electrodes X and Y which are responsible for surface discharge and the address electrode A for selective light emission of the unit light emitting region in the surface discharge PDP. Unnecessary discharge may occur, which may disturb display and damage the address electrode A and the drive circuit.
【0013】本発明は、上述の問題に鑑み、耐圧の低下
を招く誘電体層中の気泡の発生を抑え、信頼性を高める
ことを目的としている。In view of the above problems, it is an object of the present invention to suppress the generation of bubbles in the dielectric layer, which causes a decrease in breakdown voltage, and improve reliability.
【0014】[0014]
【課題を解決するための手段】請求項1の発明に係るP
DPは、上述の課題を解決するため、図1に示すよう
に、表示電極X,Yの放電部分が誘電体層17で被覆さ
れたAC型のプラズマディスプレイパネル1であって、
前記誘電体層17が非脱泡性の低融点ガラスからなる。[Means for Solving the Problems] P according to the invention of claim 1
In order to solve the above problems, the DP is an AC type plasma display panel 1 in which the discharge portions of the display electrodes X and Y are covered with a dielectric layer 17, as shown in FIG.
The dielectric layer 17 is made of non-defoaming low melting point glass.
【0015】請求項2の発明に係る方法は、基板11上
に前記表示電極X,Yを形成する工程と、前記基板11
の電極形成面の内、表示領域EHを含み且つ封止領域E
Sの外側を除く部分に、非脱泡性の低融点ガラスからな
る前記誘電体層17を設け、他の部分に化学エッチング
の可能な低融点ガラス層50を設け、前記誘電体層17
及び前記低融点ガラス層50によって前記表示電極X,
Yの全体を被覆する工程と、前記基板11と別の基板2
1とを対向配置し、これら基板11,21の周囲を封止
ガラス31によって封止する工程と、前記低融点ガラス
層50における前記封止ガラス31の外側の部分を化学
エッチングによって除去し、前記表示電極X,Yの端部
を露出させる工程と、を含むプラズマディスプレイパネ
ルの製造方法である。According to a second aspect of the present invention, there is provided a method of forming the display electrodes X and Y on the substrate 11, and the substrate 11
Of the electrode formation surface of the display area EH and the sealing area E
The dielectric layer 17 made of non-defoaming low-melting glass is provided on a portion other than the outside of S, and the low-melting glass layer 50 capable of chemical etching is provided on the other portion.
And the low melting glass layer 50 allows the display electrodes X,
The step of covering the entire Y and the substrate 2 different from the substrate 11.
1 and 2 are opposed to each other and the periphery of these substrates 11 and 21 is sealed with a sealing glass 31, and a portion of the low melting point glass layer 50 outside the sealing glass 31 is removed by chemical etching. And a step of exposing the end portions of the display electrodes X and Y.
【0016】請求項3の発明に係る方法は、前記誘電体
層17及び前記低融点ガラス層50を、これら2つの層
の内の軟化点の低い層が軟化点の高い層に対して上側に
なるように部分的に重ねて設けるものである。In the method according to the third aspect of the present invention, the dielectric layer 17 and the low melting point glass layer 50 are arranged such that a layer having a lower softening point of these two layers is located above a layer having a higher softening point. It is provided so as to partially overlap.
【0017】[0017]
【作用】非脱泡性の低融点ガラスは、その焼成温度が軟
化点の近辺であって、焼成時に発生するガスが膨張する
以前の十分に小さな気泡状態である段階で焼成が完了す
る。このため、表示電極X,Yの放電部分を覆う誘電体
層17はほぼ均質となり、大きな気泡を有した不均一な
膜質である場合に比べて高い耐圧が得られる。The non-defoaming low-melting-point glass is completely fired at a stage where the firing temperature is near the softening point and the gas generated during firing is in a sufficiently small bubble state before the gas is expanded. Therefore, the dielectric layer 17 covering the discharge portions of the display electrodes X and Y is substantially homogeneous, and a higher breakdown voltage can be obtained as compared with the case where the film quality is nonuniform with large bubbles.
【0018】PDP1の製造に際して、表示電極X,Y
は、その形成後から封止の終了段階までの段階におい
て、放電部分については誘電体層17で被覆され、端部
については化学エッチングの可能な低融点ガラス層50
で被覆されて保護される。When manufacturing the PDP 1, display electrodes X and Y are used.
The low melting point glass layer 50, which is covered with the dielectric layer 17 at the discharge portion and chemically etchable at the end portion, is formed after the formation thereof and before the sealing is completed.
It is covered with and protected.
【0019】[0019]
【実施例】図1は本発明に係るPDP1の要部の構成を
示す断面図、図2はPDP1の外観形状を示す斜視図、
図3はPDP1の1画素EGに対応する部分の基本的な
構造を示す分解斜視図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view showing the structure of the main part of a PDP 1 according to the present invention, and FIG. 2 is a perspective view showing the external shape of the PDP 1.
FIG. 3 is an exploded perspective view showing a basic structure of a portion of the PDP 1 corresponding to one pixel EG.
【0020】これらの図において、PDP1は、マトリ
クス表示の単位発光領域EUに一対の表示電極X,Yと
アドレス電極Aとが対応する3電極構造を有し、蛍光体
の配置形態による分類の上で反射型と呼称される面放電
型PDPである。In these figures, the PDP 1 has a three-electrode structure in which a pair of display electrodes X and Y and an address electrode A correspond to a unit light emitting region EU of matrix display, and is classified according to the arrangement form of the phosphors. It is a surface discharge type PDP called as a reflection type.
【0021】面放電のための表示電極X,Yは、表示面
H側のガラス基板11上に設けられ、表示領域EHに対
応した放電部分を含めて封止領域ESの内側の部分がA
C駆動用の誘電体層17によって放電空間30に対して
被覆されている。誘電体層17の厚さは数十μm程度で
ある。誘電体層17の表面には、その保護膜として数千
Å程度の厚さのMgO膜18が設けられている。The display electrodes X and Y for surface discharge are provided on the glass substrate 11 on the display surface H side, and the inner portion of the sealing area ES including the discharge portion corresponding to the display area EH is A.
The discharge space 30 is covered with a C drive dielectric layer 17. The thickness of the dielectric layer 17 is about several tens of μm. On the surface of the dielectric layer 17, a MgO film 18 having a thickness of about several thousand Å is provided as a protective film.
【0022】なお、表示電極X,Yは、放電空間30に
対して表示面H側に配置されることから、面放電を広範
囲とするための幅の広い帯状の透明導電膜41と、その
導電性を補うために外端側に重ねられた幅の狭いバス金
属膜42とから構成されている。透明導電膜41は数千
Å〜1μm程度の厚さのネサ膜(酸化錫膜)などからな
り、バス金属膜42は例えばクロム−銅−クロムの3層
構造の薄膜からなる。Since the display electrodes X and Y are arranged on the display surface H side with respect to the discharge space 30, a wide band-shaped transparent conductive film 41 for widening the surface discharge and its conductivity. The bus metal film 42 having a narrow width is stacked on the outer end side in order to supplement the property. The transparent conductive film 41 is composed of a Nesa film (tin oxide film) having a thickness of several thousand Å to 1 μm, and the bus metal film 42 is composed of, for example, a thin film having a three-layer structure of chromium-copper-chrome.
【0023】一方、単位発光領域EUを選択的に発光さ
せるためのアドレス電極Aは、背面側のガラス基板21
上に、例えば200μm程度のピッチで表示電極X,Y
と直交するように配列されている。なお、アドレス電極
Aは導電性ペーストを焼成した厚膜電極であり、露出状
態であっても種々の熱処理による変質はほとんど起こら
ない。On the other hand, the address electrode A for selectively emitting light in the unit light emitting region EU is provided with the glass substrate 21 on the back side.
The display electrodes X and Y are arranged on the display electrode at a pitch of, for example, about 200 μm
It is arranged so that it is orthogonal to. The address electrode A is a thick film electrode obtained by firing a conductive paste, and even if it is exposed, it is hardly altered by various heat treatments.
【0024】各アドレス電極Aの間には、放電空間30
の間隙寸法を規定する50μm程度の幅を有したストラ
イプ状の隔壁29が設けられ、これによって放電空間3
0はライン方向(表示電極X,Yの延長方向)に単位発
光領域EU毎に区画されている。また、ガラス基板21
には、アドレス電極Aの上面及び隔壁29の側面を含め
て背面側の内面を被覆するように、R(赤),G
(緑),B(青)の3原色の蛍光体28が設けられてい
る。図3におけるアルファベットR,G,Bは各蛍光体
28の発光色を示している。蛍光体28は、面放電時に
放電空間30内の放電ガスが放つ紫外線によって励起さ
れて発光する。A discharge space 30 is provided between each address electrode A.
Striped barrier ribs 29 having a width of about 50 μm that define the gap size of the discharge space 3 are provided.
0 is divided for each unit light emitting area EU in the line direction (extension direction of the display electrodes X and Y). In addition, the glass substrate 21
Covers the upper surface of the address electrode A and the inner surface of the rear surface including the side surface of the partition 29 so that R (red), G
Phosphors 28 of three primary colors of (green) and B (blue) are provided. The alphabets R, G, and B in FIG. 3 indicate the emission colors of the phosphors 28. The phosphor 28 is excited by the ultraviolet rays emitted by the discharge gas in the discharge space 30 during surface discharge to emit light.
【0025】表示画面を構成する各画素(ドット)EG
には、ライン方向に並ぶ同一面積の3つの単位発光領域
EUが対応づけられている。各単位発光領域EUにおい
て、表示電極X,Yによって面放電セル(表示のための
主放電セル)が画定され、表示電極Yとアドレス電極A
とによって表示又は非表示を選択するためのアドレス放
電セルが画定される。これにより、アドレス電極Aの延
長方向に連続する蛍光体28の内、各単位発光領域EU
に対応した部分を選択的に発光させることができ、R,
G,Bの組み合わせによるフルカラー表示が可能であ
る。Each pixel (dot) EG constituting the display screen
Are associated with three unit light emitting regions EU having the same area and arranged in the line direction. In each unit light emitting region EU, a surface discharge cell (main discharge cell for display) is defined by the display electrodes X and Y, and the display electrode Y and the address electrode A are defined.
And define address discharge cells for selecting display or non-display. As a result, among the phosphors 28 that are continuous in the extension direction of the address electrode A, each unit light emitting area EU
The portion corresponding to can be selectively made to emit light, and R,
Full-color display is possible by combining G and B.
【0026】さて、PDP1において、誘電体層17
は、PbOを主成分とし、SiO2 、Al2 O3 、及び
B2 O3 などからなる非脱泡性の低融点ガラスからな
る。非脱泡性の低融点ガラスでは、その焼成温度が軟化
点(500〜600℃程度)の近辺に設定され、焼成時
に発生するガスが膨張する以前の十分に小さな気泡状態
である段階で焼成が完了する。このため、誘電体層17
は大きな気泡のない均質な層となっており、表示電極
X,Yとアドレス電極Aとの間において、所定の耐圧が
確保されている。Now, in the PDP 1, the dielectric layer 17
Is a non-defoaming low-melting-point glass containing PbO as a main component and SiO 2 , Al 2 O 3 , B 2 O 3 and the like. In the case of non-defoaming low-melting-point glass, the firing temperature is set near the softening point (about 500 to 600 ° C.), and firing is performed at a stage where the gas generated during firing is in a sufficiently small bubble state before expansion. Complete. Therefore, the dielectric layer 17
Is a uniform layer without large bubbles, and a predetermined breakdown voltage is secured between the display electrodes X and Y and the address electrode A.
【0027】ただし、SiO2 を含む低融点ガラスは耐
薬品性に優れ、エッチングが困難である。そこで、PD
P1では、封止が完了する以前の段階では、図1に一点
鎖線で示すように、表示電極X,Yの外部接続部がエッ
チングの容易な低融点ガラス層50で被覆され、この低
融点ガラス層50と誘電体層17とによって表示電極
X,Yの酸化が防止される。However, the low melting point glass containing SiO 2 has excellent chemical resistance and is difficult to etch. So PD
In P1, before the completion of sealing, as shown by the dashed line in FIG. 1, the external connection parts of the display electrodes X and Y are covered with a low-melting-point glass layer 50 which can be easily etched. The layer 50 and the dielectric layer 17 prevent the display electrodes X and Y from being oxidized.
【0028】次に、以上の構成のPDP1の製造方法に
ついて図1を参照して説明する。PDP1は、各ガラス
基板11,21について別個に所定の構成要素を設け、
その後にガラス基板11,21を重ね合わせて封止を行
い、内部の排気及び放電ガスの充填を行う一連の工程に
よって製造される。Next, a method of manufacturing the PDP 1 having the above structure will be described with reference to FIG. The PDP 1 is provided with predetermined constituent elements separately for each glass substrate 11 and 21,
After that, the glass substrates 11 and 21 are overlapped and sealed, and a series of steps of exhausting the inside and filling the discharge gas is manufactured.
【0029】ガラス基板11側の製造に際しては、ま
ず、蒸着やスパッタなどによる成膜、及びフォトリソグ
ラフィ法によるパターニングによって、ガラス基板11
上に透明導電膜41とバス金属膜42とを順に形成して
表示電極X,Yを設ける。In manufacturing the glass substrate 11 side, first, the glass substrate 11 is formed by film formation by vapor deposition or sputtering, and patterning by photolithography.
A transparent conductive film 41 and a bus metal film 42 are sequentially formed on the display electrodes X and Y.
【0030】次に、ガラス基板11の電極形成面の内、
表示領域EHの全域を含み且つ封止領域ESの外側を除
く部分に、非脱泡性の第1の低融点ガラスペーストを塗
布し、他の部分に化学エッチングの可能な組成の第2の
低融点ガラスペーストを塗布し、これら第1及び第2の
低融点ガラスペーストによって表示電極X,Yの全体を
被覆する。このとき、被覆を完全なものにするために、
2つのペースト層が例えば1mm程度の幅で重なるよう
に塗布する。そして、その重なり部分(オーバラップ部
分)において、2つのペースト層の内の軟化点の低い層
が軟化点の高い層に対して上側になるように、軟化点の
高い低融点ガラスペーストを先に塗布する。図1の例で
は、誘電体層17に対応した第1の低融点ガラスペース
トが先に塗布され、低融点ガラス層50に対応した第2
の低融点ガラスペーストが後に塗布されている。Next, among the electrode forming surfaces of the glass substrate 11,
The non-defoaming first low-melting-point glass paste is applied to a portion including the entire display area EH and excluding the outside of the sealing area ES, and a second low-melting composition having a composition capable of chemical etching is applied to other portions. A melting point glass paste is applied, and the display electrodes X and Y are entirely covered with the first and second low melting point glass pastes. At this time, in order to complete the coating,
The two paste layers are applied so as to overlap each other with a width of, for example, about 1 mm. Then, in the overlapping portion (overlap portion), the low-melting-point glass paste having a high softening point is placed first so that the layer having a lower softening point of the two paste layers is located above the layer having a higher softening point. Apply. In the example of FIG. 1, the first low melting point glass paste corresponding to the dielectric layer 17 is first applied and the second low melting point glass layer 50 corresponding to the second low melting point glass layer 50 is applied.
The low melting point glass paste of is applied later.
【0031】続いて、第1及び第2の低融点ガラスペー
ストを、第1の低融点ガラスペーストの軟化点付近の温
度で焼成し、誘電体層17と電極端部を保護する低融点
ガラス層50とを形成する。焼成後の降温段階において
は、2つの層のオーバラップ部分の積層順序が上述のよ
うに軟化点の高低に応じて決められているので、必ず下
側の層が先に硬化する。これにより、焼成時に下側の層
で発生したガスが上側の層を通って外部へ発散し、上側
の層によるガスの封じ込めが起こらない。なお、積層順
序が逆であって下側の層内にガスが封じ込められた場合
には、ガス自体による酸化、又はガスの気泡が炸裂して
生じるピンホールを介した外気よる酸化が起こり、表示
電極X,Yの断線が生じるおそれがある。Subsequently, the first and second low melting glass pastes are fired at a temperature near the softening point of the first low melting glass paste to protect the dielectric layer 17 and the electrode end portions. And 50. In the temperature decreasing step after firing, since the stacking order of the overlapping portions of the two layers is determined according to the height of the softening point as described above, the lower layer is always cured first. As a result, the gas generated in the lower layer during firing diffuses to the outside through the upper layer, and the upper layer does not confine the gas. When the stacking order is reversed and the gas is confined in the lower layer, the gas itself oxidizes or the gas bubbles explode and oxidizes by the outside air through the pinholes. The electrodes X and Y may be broken.
【0032】このようにして誘電体層17及び低融点ガ
ラス層50を設け、表示電極X,Yを保護した状態で、
電子ビーム蒸着などによってMgO膜18を設ける。そ
して、一方のガラス基板上に封止用のガラスペーストを
5mm程度の幅の環状に塗布し、ガラス基板11,21
を対向配置して熱処理を行う。この熱処理によりガラス
ペーストが焼成されて封止ガラス31となり、放電空間
30が密閉される。In this way, the dielectric layer 17 and the low melting point glass layer 50 are provided, and the display electrodes X and Y are protected,
The MgO film 18 is provided by electron beam evaporation or the like. Then, one glass substrate is coated with a glass paste for sealing in a ring shape having a width of about 5 mm, and the glass substrates 11 and 21 are formed.
Are opposed to each other and heat treatment is performed. By this heat treatment, the glass paste is fired to become the sealing glass 31, and the discharge space 30 is sealed.
【0033】封止を終えると、外部との電気的な接続を
可能とするために、表示電極X,Yの端部を覆う低融点
ガラス層50、すなわち低融点ガラス層50の内の封止
ガラス31より外側の部分を除去する。低融点ガラス層
50の除去は、一体化されたガラス基板11,21を硝
酸溶液に浸すウェットエッチング(化学エッチング)に
より行う。After the sealing, the low melting point glass layer 50 covering the end portions of the display electrodes X and Y, that is, the sealing inside the low melting point glass layer 50 in order to enable electrical connection to the outside. The portion outside the glass 31 is removed. The low melting point glass layer 50 is removed by wet etching (chemical etching) in which the integrated glass substrates 11 and 21 are immersed in a nitric acid solution.
【0034】上述の実施例によれば、表示電極X,Yを
2種の低融点ガラスによって保護するようにしたので、
エッチングの可否を考慮することなく誘電体層17の材
質を最適化することができる。According to the above-mentioned embodiment, since the display electrodes X and Y are protected by the two kinds of low melting glass,
The material of the dielectric layer 17 can be optimized without considering the possibility of etching.
【0035】上述の実施例によれば、誘電体層17と低
融点ガラス層50とをオーバラップするように設けたの
で、2層の境目での表示電極X,Yの露出を避けること
ができる。また、2層の積層順序を軟化点によって特定
したので、下側の層におけるガスの封じ込めに起因する
表示電極X,Yの断線を防止することができる。According to the above-described embodiment, since the dielectric layer 17 and the low melting point glass layer 50 are provided so as to overlap each other, it is possible to avoid the exposure of the display electrodes X and Y at the boundary between the two layers. . Further, since the stacking order of the two layers is specified by the softening point, it is possible to prevent disconnection of the display electrodes X and Y due to gas entrapment in the lower layer.
【0036】上述の実施例においては、誘電体層17と
低融点ガラス50との境界位置を封止ガラス31を設け
る封止領域ES内とした例を挙げたが、境界位置は表示
領域EHの外側であればよい。In the above-described embodiment, the example in which the boundary position between the dielectric layer 17 and the low melting point glass 50 is set within the sealing area ES where the sealing glass 31 is provided is described, but the boundary position is in the display area EH. It should be outside.
【0037】[0037]
【発明の効果】本発明によれば、耐圧の低下を招く誘電
体層中の気泡の発生を抑えることができ、不要の放電に
よる電極の損傷を防止して信頼性を高めることができ
る。According to the present invention, it is possible to suppress the generation of bubbles in the dielectric layer, which causes a decrease in breakdown voltage, prevent damage to the electrode due to unnecessary discharge, and improve reliability.
【0038】請求項2の発明によれば、エッチングの可
否を考慮することなく誘電体層の材質を最適化すること
ができる。請求項3の発明によれば、表示電極をより確
実に保護することができる。According to the second aspect of the present invention, the material of the dielectric layer can be optimized without considering the possibility of etching. According to the invention of claim 3, the display electrode can be protected more reliably.
【図1】本発明に係るPDPの要部の構成を示す断面図
である。FIG. 1 is a sectional view showing a configuration of a main part of a PDP according to the present invention.
【図2】PDPの外観形状を示す斜視図である。FIG. 2 is a perspective view showing an external shape of a PDP.
【図3】PDPの1画素に対応する部分の基本的な構造
を示す分解斜視図である。FIG. 3 is an exploded perspective view showing a basic structure of a portion corresponding to one pixel of a PDP.
【符号の説明】 1 PDP(プラズマディスプレイパネル) 11,21 ガラス基板(基板) 17 誘電体層 31 封止ガラス 50 低融点ガラス層 EH 表示領域 ES 封止領域 X,Y 表示電極[Explanation of Codes] 1 PDP (Plasma Display Panel) 11, 21 Glass Substrate (Substrate) 17 Dielectric Layer 31 Sealing Glass 50 Low Melting Glass Layer EH Display Area ES Sealing Area X, Y Display Electrodes
Claims (3)
層(17)で被覆されたAC型のプラズマディスプレイ
パネル(1)であって、 前記誘電体層(17)が、非脱泡性の低融点ガラスから
なることを特徴とするプラズマディスプレイパネル。1. An AC type plasma display panel (1) in which a discharge part of a display electrode (X) (Y) is covered with a dielectric layer (17), wherein the dielectric layer (17) is non-conductive. A plasma display panel comprising a low-melting glass having a defoaming property.
ル(1)の製造方法であって、 基板(11)上に前記表示電極(X)(Y)を形成する
工程と、 前記基板(11)の電極形成面の内、表示領域(EH)
を含み且つ封止領域(ES)の外側を除く部分に、非脱
泡性の低融点ガラスからなる前記誘電体層(17)を設
け、他の部分に化学エッチングの可能な低融点ガラス層
(50)を設け、前記誘電体層(17)及び前記低融点
ガラス層(50)によって前記表示電極(X)(Y)の
全体を被覆する工程と、 前記基板(11)と別の基板(21)とを対向配置し、
これら基板(11)(21)の周囲を封止ガラス(3
1)によって封止する工程と、 前記低融点ガラス層(50)における前記封止ガラス
(31)の外側の部分を化学エッチングによって除去
し、前記表示電極(X)(Y)の端部を露出させる工程
と、 を含むことを特徴とするプラズマディスプレイパネルの
製造方法。2. A method of manufacturing a plasma display panel (1) according to claim 1, comprising the steps of forming the display electrodes (X) (Y) on a substrate (11); Display area (EH) of the electrode formation surface
The dielectric layer (17) made of non-defoaming low-melting glass is provided in a portion including the outside of the sealing region (ES), and the low-melting glass layer capable of chemical etching is provided in other portions ( 50) and covering the whole of the display electrodes (X) (Y) with the dielectric layer (17) and the low melting point glass layer (50); and a substrate (21) different from the substrate (11). ) And face each other,
Around the periphery of these substrates (11) and (21) is sealed glass (3
1) The step of encapsulating, and the portion of the low melting point glass layer (50) outside the encapsulating glass (31) is removed by chemical etching to expose the end portions of the display electrodes (X) (Y). A method of manufacturing a plasma display panel, comprising:
ルの製造方法であって、 前記誘電体層(17)及び前記低融点ガラス層(50)
を、これら2つの層の内の軟化点の低い層が軟化点の高
い層に対して上側になるように部分的に重ねて設けるこ
とを特徴とするプラズマディスプレイパネルの製造方
法。3. The method of manufacturing a plasma display panel according to claim 2, wherein the dielectric layer (17) and the low melting point glass layer (50).
Is partially overlapped so that the layer having a lower softening point of these two layers is on the upper side of the layer having a higher softening point, and the method is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20912393A JP3547461B2 (en) | 1993-08-24 | 1993-08-24 | Plasma display panel and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20912393A JP3547461B2 (en) | 1993-08-24 | 1993-08-24 | Plasma display panel and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0765729A true JPH0765729A (en) | 1995-03-10 |
| JP3547461B2 JP3547461B2 (en) | 2004-07-28 |
Family
ID=16567671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20912393A Expired - Fee Related JP3547461B2 (en) | 1993-08-24 | 1993-08-24 | Plasma display panel and method of manufacturing the same |
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| Country | Link |
|---|---|
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996037904A1 (en) * | 1995-05-26 | 1996-11-28 | Fujitsu Limited | Plasma display panel and its manufacture |
| WO1998039789A1 (en) * | 1997-03-07 | 1998-09-11 | Hitachi, Ltd. | Plasma display panel and process for producing the same |
| US7133005B2 (en) | 2000-07-05 | 2006-11-07 | Lg Electronics Inc. | Plasma display panel and method and apparatus for driving the same |
| US7230381B2 (en) * | 2002-08-30 | 2007-06-12 | Fujitsu Hitachi Plasma Display Limited | Method of manufacturing a plasma display panel |
| JPWO2007099902A1 (en) * | 2006-02-28 | 2009-07-16 | パナソニック株式会社 | Flat panel display |
-
1993
- 1993-08-24 JP JP20912393A patent/JP3547461B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996037904A1 (en) * | 1995-05-26 | 1996-11-28 | Fujitsu Limited | Plasma display panel and its manufacture |
| US5977708A (en) * | 1995-05-26 | 1999-11-02 | Fujitsu Limited | Glass material used in, and fabrication method of, a plasma display panel |
| WO1998039789A1 (en) * | 1997-03-07 | 1998-09-11 | Hitachi, Ltd. | Plasma display panel and process for producing the same |
| US7133005B2 (en) | 2000-07-05 | 2006-11-07 | Lg Electronics Inc. | Plasma display panel and method and apparatus for driving the same |
| US7514870B2 (en) | 2000-07-05 | 2009-04-07 | Lg Electronics Inc. | Plasma display panel having first and second electrode groups |
| US7230381B2 (en) * | 2002-08-30 | 2007-06-12 | Fujitsu Hitachi Plasma Display Limited | Method of manufacturing a plasma display panel |
| JPWO2007099902A1 (en) * | 2006-02-28 | 2009-07-16 | パナソニック株式会社 | Flat panel display |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3547461B2 (en) | 2004-07-28 |
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