JPH0767281B2 - Control device for PWM converter - Google Patents
Control device for PWM converterInfo
- Publication number
- JPH0767281B2 JPH0767281B2 JP61215233A JP21523386A JPH0767281B2 JP H0767281 B2 JPH0767281 B2 JP H0767281B2 JP 61215233 A JP61215233 A JP 61215233A JP 21523386 A JP21523386 A JP 21523386A JP H0767281 B2 JPH0767281 B2 JP H0767281B2
- Authority
- JP
- Japan
- Prior art keywords
- pwm
- current
- output
- converter
- pwm converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Inverter Devices (AREA)
Description
【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、モータ可変速等のPWM変換装置の制御装置に
関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a control device for a PWM conversion device such as a motor variable speed.
(従来の技術) PWM変換装置の制御方法として従来、搬送波によるリプ
ル電流を減少するために第2図に示すように直流電源16
をそれぞれ入力とし且つ、第1のPWM変換器1Aに接続さ
れた第1の変圧器4Aと第2のPWM変換器1Bに接続された
第2の変圧器4Bの1次巻線を直列接続した構成とし、第
1のPWM変換器1Aと第2のPWM変換器1BをPWM制御するた
めの搬送波CAR1とCAR2の位相を90°ずらしている。第1
のPWM変換器1Aと第2のPWM変換器1Bの出力電流i1,i2
を各々電流検出器5A,5Bにて検出し、その平均値 をフィードバック量として電流基準i*とつき合わせ
る。その差分を電流制御回路8に入力して増幅後、外乱
と加えられ、その和である電圧基準e*と搬送波CAR1とが
コンパレータ9Aによって比較され、その出力が第1のPW
M変換器1Aのトランジスタ2をON,OFF制御する。ここで
の外乱とは、PWM変換器の使用目的によって異なってく
るが、変圧器4A,4Bの1次側が系統につながれる時に
は、その電圧に相当する制御量である。第2のPWM変換
器1Bについても同様に搬送波CAR2と電圧基準e*がコンパ
レータ9Bによって比較されその出力が第2のPWM変換器1
Bのトランジスタ2を制御する。変圧器4Aと4Bの1次側
が直列に接続されているため、変圧器4Aと4B、第1,第2
のPWM変換器1Aと1Bの回路定数が全て等しければ、第1,
第2のPWM変換器1Aと1Bの出力電流i1とi2は、全く
同じであり、電流はバランスする。ところが、実際に
は、変圧器4Aと4Bのもれインピーダンスや励磁インピー
ダンス、変圧比、鉄心の飽和特性、さらには、トランジ
スタ2やダイオード3のON電圧等は全く等しいとは言え
ず、必ず出力電流i1とi2は差異を生じる。電流制御
は、電流i1とi2の平均値 が基準値i*と等しくなるように制御されるため、回路
定数差異や外乱要素により第3図のように電流i1とi
2が変化しても、それぞれの電流を基準値i*にしよう
という制御が働かず、電流不平衡が生じる。(Prior Art) Conventionally, as a control method of a PWM converter, in order to reduce a ripple current due to a carrier wave, a DC power supply 16 is provided as shown in FIG.
, And the primary windings of the first transformer 4A connected to the first PWM converter 1A and the second winding of the second transformer 4B connected to the second PWM converter 1B are connected in series. With the configuration, the phases of the carrier waves CAR1 and CAR2 for PWM controlling the first PWM converter 1A and the second PWM converter 1B are shifted by 90 °. First
Output currents i 1 , i 2 of the PWM converter 1A and the second PWM converter 1B
Is detected by current detectors 5A and 5B respectively, and the average value Is compared with the current reference i * as a feedback amount. The difference is input to the current control circuit 8 and amplified, then added as a disturbance, and the voltage reference e * which is the sum thereof and the carrier wave CAR1 are compared by the comparator 9A, and the output thereof is the first PW.
ON / OFF control the transistor 2 of the M converter 1A. The disturbance here depends on the purpose of use of the PWM converter, but when the primary side of the transformers 4A and 4B is connected to the system, it is a control amount corresponding to the voltage. Similarly for the second PWM converter 1B, the carrier wave CAR2 and the voltage reference e * are compared by the comparator 9B, and the output is the second PWM converter 1B.
Control the B transistor 2. Since the primary side of transformers 4A and 4B are connected in series, transformers 4A and 4B, first and second
If the circuit constants of PWM converters 1A and 1B are equal,
The output currents i 1 and i 2 of the second PWM converters 1A and 1B are exactly the same, and the currents are balanced. However, in reality, the leakage impedance, the excitation impedance, the transformation ratio, the saturation characteristics of the iron core, the ON voltage of the transistor 2 and the diode 3 of the transformers 4A and 4B cannot be said to be completely equal, and the output current must be i 1 and i 2 make a difference. Current control is the average value of the currents i 1 and i 2 . Is controlled so as to be equal to the reference value i * , the currents i 1 and i as shown in FIG.
Even if 2 changes, the control for setting the respective currents to the reference value i * does not work, and current imbalance occurs.
(発明が解決しようとする問題点) 以上のように従来技術では、回路定数の差異によって、
電流不平衡が生じ、トランジスタの容量を大きくしなけ
ればならず、さらに冷却にも影響を及ぼす。(Problems to be Solved by the Invention) As described above, in the conventional technology, due to the difference in the circuit constant,
Current imbalance occurs, the capacitance of the transistor must be increased, and it also affects cooling.
従って、本発明の目的は上記従来技術の問題点を解消
し、電流バランスをとるためのPWM変換装置の制御装置
を提供することにある。Therefore, an object of the present invention is to solve the above-mentioned problems of the prior art and to provide a control device of a PWM conversion device for balancing current.
[発明の構成] (問題点を解決するための手段) 上記目的を達成するために、本発明は、第1図に示すよ
うに2つのPWM変換器のうち一方のPWM変換器1Aの電流制
御に、従来の平均値の電流制御回路8と並列に、個別の
電流i1を電流基準i*とつきあわせて制御する制御回
路8Bを設け、その出力と従来の電圧基準e*との和をPWM
変換器1Aを制御する電圧基準e*としてトランジスタ2を
ON,OFF制御するものである。[Structure of the Invention] (Means for Solving Problems) In order to achieve the above object, the present invention, as shown in FIG. 1, controls the current of one PWM converter 1A of two PWM converters. In parallel with the conventional average value current control circuit 8, a control circuit 8B for controlling the individual current i 1 with the current reference i * is provided, and the sum of the output and the conventional voltage reference e * is added. PWM
Transistor 2 is used as the voltage reference e * to control converter 1A.
ON / OFF control is performed.
(作用) 個別の電流制御回路8Bを追加したことにより、回路定数
の違いによってPWM変換器1Aと1Bの出力電流i1,i2に
不平衡が生じたとしても、電流i1は基準電流i*にな
るように制御される。一方PWM変換器1Bの出力電流i2
は、 になるように制御されるが、i1が基準i*になるよう
に制御されるため、等価的にi2も基準i*になるよう
に制御される。よって、i1とi2は共に基準i*に等
しくなるように制御される。(Operation) By adding the individual current control circuit 8B, even if the output currents i 1 and i 2 of the PWM converters 1A and 1B are unbalanced due to the difference in the circuit constants, the current i 1 remains the reference current i. Controlled to become * . On the other hand, the output current i 2 of the PWM converter 1B
Is Is controlled so as to, to be controlled so that i 1 becomes the reference i *, equivalently i 2 is also controlled to the reference i *. Therefore, both i 1 and i 2 are controlled to be equal to the reference i * .
(実施例) 第1図に本発明の構成図を示す。1〜9は第2図と全く
同じである。電流制御回路8Bには、第1のPWM変換器1A
の出力電流i1を個別に電流基準値i*とつき合わせて
その差分が入力され、増幅された出力が従来方式の電圧
基準e*に加えられる。その和の電圧基準e1 *で第1のPWM
変換器1Aを制御するため、回路定数が異なったり、外乱
要素が加わっても電流i1は、基準値i*になるように
制御される。(Embodiment) FIG. 1 shows a block diagram of the present invention. 1 to 9 are exactly the same as in FIG. The current control circuit 8B includes the first PWM converter 1A
Output current i 1 is individually matched with the current reference value i *, and the difference is input, and the amplified output is added to the voltage reference e * of the conventional method. The first PWM with the sum voltage reference e 1 *
Since the converter 1A is controlled, the current i 1 is controlled so as to have the reference value i * even if the circuit constant is different or a disturbance element is added.
一方、第2のPWM変換器1Bは、 が基準電流i*になるように制御されるが、前述のよう
に、i1がi*になるように制御されるため、i2もi
*になるように制御される。On the other hand, the second PWM converter 1B is Is controlled so that it becomes the reference current i * , but since i 1 is controlled so that it becomes i * as described above, i 2 also becomes i 2.
Controlled to become * .
[発明の効果] 以上のことから並列回路間の回路定数の差異や外乱の影
響があってもi1とi2の電流を平衡させることがで
き、トランジスタの容量を下げることができる。また装
置の冷却も平均化することができる。[Advantages of the Invention] From the above, the currents i 1 and i 2 can be balanced and the capacitance of the transistor can be reduced even if there is a difference in circuit constant between parallel circuits or the influence of disturbance. The cooling of the device can also be averaged.
第1図は本発明の一実施例を示す制御ブロック図、第2
図は従来例を示す制御ブロック図、第3図は従来例の動
作を説明するための電流波形図である。 1A,1B……PWM変換器、2……トランジスタ、3……ダイ
オード、4A,4B……変圧器、5A,5B……電流検出器、6…
…直流電源、7……除算回路、8A,8B……電流制御回
路、9A,9B……コンパレータ。FIG. 1 is a control block diagram showing an embodiment of the present invention, and FIG.
FIG. 3 is a control block diagram showing a conventional example, and FIG. 3 is a current waveform diagram for explaining the operation of the conventional example. 1A, 1B ... PWM converter, 2 ... Transistor, 3 ... Diode, 4A, 4B ... Transformer, 5A, 5B ... Current detector, 6 ...
... DC power supply, 7 ... Division circuit, 8A, 8B ... Current control circuit, 9A, 9B ... Comparator.
Claims (1)
器の交流出力側に接続され、1次巻線が交流系統に直列
接続される第1、第2の変圧器を備えたPWM変換装置に
おいて、 前記第1、第2のPWM変換器の交流出力電流を検出する
第1、第2の電流検出器と、 該第1、第2の電流検出器の出力が印加されその平均値
を算出する手段と、 該平均値と前記第1、第2のPWM変換器の交流出力電流
の基準値が印加される第1の電流制御回路と、 前記第1、第2のPWM変換器の交流出力電流の基準値と
前記第1の電流検出器の出力が印加される第2の電流制
御回路と、 前記第1、第2の電流制御回路の出力及び前記交流系統
の電圧に応じた信号の加算値を前記第1のPWM変換器の
出力電圧の基準値として前記第1のPWM変換器をPWM制御
する手段と、 前記第1の電流制御回路の出力及び前記交流系統の電圧
に応じた信号の加算値を前記第2のPWM変換器の出力電
圧の基準値として前記第2のPWM変換器をPWM制御する手
段とを具備したPWM変換装置の制御装置。1. A first and second transformer in which secondary windings are respectively connected to the AC output sides of first and second PWM converters, and the primary windings are connected in series to an AC system. In the PWM converter, the first and second current detectors for detecting the AC output currents of the first and second PWM converters, and the outputs of the first and second current detectors are applied. Means for calculating an average value, a first current control circuit to which the average value and the reference value of the AC output current of the first and second PWM converters are applied, and the first and second PWM conversions A second current control circuit to which the reference value of the AC output current of the power supply and the output of the first current detector are applied, and the outputs of the first and second current control circuits and the voltage of the AC system. Means for controlling the PWM of the first PWM converter by using the added value of the signals as a reference value of the output voltage of the first PWM converter, And a means for PWM-controlling the second PWM converter with the added value of the signal corresponding to the output of the flow control circuit and the voltage of the AC system as the reference value of the output voltage of the second PWM converter. Converter control device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61215233A JPH0767281B2 (en) | 1986-09-12 | 1986-09-12 | Control device for PWM converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61215233A JPH0767281B2 (en) | 1986-09-12 | 1986-09-12 | Control device for PWM converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6373883A JPS6373883A (en) | 1988-04-04 |
| JPH0767281B2 true JPH0767281B2 (en) | 1995-07-19 |
Family
ID=16668916
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61215233A Expired - Lifetime JPH0767281B2 (en) | 1986-09-12 | 1986-09-12 | Control device for PWM converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0767281B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008011665A (en) * | 2006-06-30 | 2008-01-17 | Mitsubishi Heavy Ind Ltd | Power converter |
-
1986
- 1986-09-12 JP JP61215233A patent/JPH0767281B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6373883A (en) | 1988-04-04 |
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