JPH0767321A - Control method for reactive-power compensating apparatus - Google Patents

Abstract

PURPOSE:To remove the phase delay of the frequency component lower than the commercial frequency caused by the load change in an arc furnace because the phase delay is the cause of miscontrol in the detection of fluctuation amount DELTAQ of reactive power when the steep, random fluctuation of the reactive power as in the arc furnace or the like is detected and the control is performed with an SVC. CONSTITUTION:The fluctuation of reactive power is detected with DELTAQ detector 3. At the same time, the frequency component lower than the commercial frequency is detected with a frequency detector 42. In response to the detected frequency, the cut-off frequency of a high-pass filter 41, through which the detected signal DELTAQ passes, is switched in conformity with the low frequency. A control signal DELTAQ' is obtained at the output side of the high-pass filter 41.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention detects voltage flicker due to reactive power fluctuations in an arc furnace load and detects ΔQ of the load to detect SV.
The present invention relates to an improvement of a method of controlling by C (static var compensator).

[0002]

2. Description of the Related Art In order to suppress voltage flicker due to fluctuations in reactive power of an arc furnace load, SVCs are arranged in parallel on a bus line, and instantaneous reactive power fluctuations (ΔQ) are detected. Then, the power fluctuation is compensated by the SVC. A conventional control method using such a reactive power compensator is shown in FIG. In FIG. 8, the bus bar 12 is assumed to be connected to the power supply 10. Note that 11 indicates the reactance on the power supply side. It is assumed that the arc furnace 9 is loaded on the bus bar 12 via the transformer Tr. To compensate for this reactive load power, a TCR circuit consisting of a thyristor connected in antiparallel with the reactor X _TCR in series on the bus in parallel with the load, and a filter F.
The SVC consisting of C is connected. The control circuit of the SVC mentioned above outputs a bus voltage signal from PT for extracting the bus voltage and a current signal from CT for extracting the current of the load 9 to the Q detector 1
When the voltage signal is phase-shifted by 90 ° and multiplied by the multiplier, the reactive power calculation result is as shown in the following formula 1.

[0003]

[Equation 1]

As described above, the load Q _L is first detected, and the low-pass filter (LPF) 5 detects the DC control signal (Q
_DC ) and the ΔQ detector 3 uses ΔQ in TCR.
_It is converted into a ΔQ control signal for the _TCR capacity and input to the function circuit 6, and converted into a voltage signal of the size of the control phase angle. With this control signal and the power supply synchronization signal from the PLL 10,
A phase control pulse is issued from the phase control pulse circuit 7 to suppress voltage fluctuation (ΔV) at the flicker level generated in the system.

[0005]

By the way, the above-mentioned LPF
The transmission number (Gs) and the phase delay (φω) of are expressed as follows. G (s) = 1 / (1 + ST) = 1 / (1 + CR) (1.1) φω = −tan ⁻¹ ω. ST = ω. CR (1.2) However, ω = 2πΔf ₁ , Δf ₁ : low-frequency vibration component due to load fluctuation of the arc furnace, which is smaller than 50 to 60 Hz. The low-frequency vibration due to the load fluctuation of the arc furnace is delayed as shown in the above equation (1.2), and this becomes a ΔQ control error, and as the low-frequency vibration component that changes depending on the operation pattern of the arc furnace becomes larger, The flicker improvement effect deteriorates, and the effect cannot be expected.

[0006]

SUMMARY OF THE INVENTION The present invention is directed to reactive power fluctuations (Δ
Q) is detected and feed. When the reactive power is controlled by forward, ΔQ is converted from an AC signal to a DC signal at high speed, but in order to correct the control error due to the phase delay of the ΔQ control signal due to the LPF at this time, the low fluctuation that changes due to the load fluctuation of the arc furnace The frequency component (Δf ₁ ) of the frequency vibration is detected,
This is a control method in which a phase correction circuit is provided in the subsequent stage, and the cutoff frequency (f _H ) in this phase correction circuit is automatically adjusted according to the fluctuation of Δf ₁ .

[0007]

FIG. 1 is a block diagram showing a circuit embodying the present invention.
The same reference numerals as those in FIG. 8 indicate the same parts. 1 is different from the circuit configuration in FIG. 8 in that a band reject filter (BRF) 2 is connected to the output side of the Q detector 1 and the output side of this BRF 2 is connected to the ΔQ detector 3 while B
The output side of RF2 is provided with a phase detector 4 and a high-pass filter (HPF) 41, which is a phase correction circuit 4 (indicated by a dotted bracket), and the output signal from the ΔQ detector 3 is output from the HPF 4 which performs phase correction. As a result, it is corrected to ΔQ ′ and input to the function circuit 7. Here, the calculation in the Q detector 1 is no different from that performed in the Q detector of FIG. Here, first, B
The characteristic of RF2 is shown by the following equation 2, and the characteristic of HPF41 is shown by the following equation 3.

[0008]

[Equation 2]

[0009]

[Equation 3]

The first term on the right side of the equation (1) shown in equation 1 is DC, and the second term is the second harmonic of the power source frequency.

DC conversion of Q _L is performed by BRF2, and Q _L
From the above, it is achieved by removing the 2ωt component of the equation (1), and Q _DC = Vlil · sin θ (DC component), and the delay phase angle φ (ω) is expressed by the equation (3) of equation 2.

The circuit of the ΔQ detector 3 is shown in FIG. Pass Q _DC through a circuit of G (s) = 1 / (1 + ST)
K. by _DC . Find Q _DC .

The frequency detection circuit 42 of FIG. 1 detects a low frequency vibration component caused by load fluctuations of the arc furnace, that is, a low frequency Δf ₁ below the commercial frequency. Figure 6 shows Q _DC
A more detailed Δf ₁ detection is shown in FIG.
Q _DC is input to BPF43. (The dominant of Δf ₁ is the cutoff frequency.) The output signal of _{BPF 43} is B _Uf
It is input to 44, converted into a rectangular waveform, and input to the PLL circuit 45. In the PLL circuit, the Δf ₁ frequency is detected by the internal synchronous VCO. This Δf ₁ is converted into a frequency-to-voltage signal by the F / V converter 46. This signal is input to the constant switching circuit 47. In the constant switching circuit 47, for example, 7 Hz,
F corresponding to 14Hz, 21Hz, 28Hz, 35Hz, 42Hz, 49Hz
A threshold value is set for the voltage signal from / V, for example, the constant f of the HPF 41 described later between 21 to 28 Hz
Convert to _H (cutoff frequency of Δf).

FIG. 5 shows the HPF 41. FIG. 3 is an explanatory diagram of HPF constant switching. A unit circuit in which a resistor and a capacitor are connected in parallel via a switch 48 on the resistor side is connected in series and a feedforward amplifier 49 is connected at the final stage.
In the HPF to which the switch 48 is connected, the switch 48 is turned on by the detection signal of Δf ₁ . The off control is performed, the constant is changed, and the number of transmissions of the ΔQ control system is optimally adjusted. HP here
The constant change detection time ts of F is set to 1 second or more.

The characteristics of the HPF41 are (4), (5),
This is as shown in the equation (6). Here, as shown in the equation (6), the cutoff frequency f _H = 1 / 2πCR
If is constant, f _H goes down as C increases. For example, in the case of this example, with respect to C = 0.022, f _H is 32 Hz, to C = 0.047, f _H is 15 Hz, to C = 0.1, f _H is set to 7 Hz.

[0016]

[Operation and Effect] FIG. 6 shows an example of TCR control by ΔQ detection of phase delay due to arc furnace load fluctuation frequency, and an example of TCR control by ΔQ ′ detection with phase correction according to the present invention. According to the present invention, the fluctuation frequency Δf ₁ (φ _L = −
45 °), and this frequency cuts the HPF circuit.
When the ΔQ signal is phase-corrected to ΔQ ′ so that the off frequency f _H (φ _H ≈45 °), the control error can be almost eliminated.

[Brief description of drawings]

FIG. 1 shows a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram showing a low-frequency detection circuit due to load fluctuation of the arc furnace.

FIG. 3 shows a high pass filter circuit used in the present invention.

FIG. 4 shows a ΔQ detector.

FIG. 5 shows a high pass filter in a block diagram.

FIG. 6 is an explanatory diagram of low frequency (Δf ₁ ) detection due to load fluctuation of the arc furnace.

FIG. 7 shows a conventional ΔQ control signal (B) and ΔQ ′ according to the present invention.
The comparison waveform figure of the TCR control system by a control signal is shown.

FIG. 8 shows an explanatory diagram of a conventional control method.

[Explanation of symbols]

0 PLL circuit 1 Q detector 2 Band-reject filter circuit 3 ΔQ detector 4 Phase correction circuit 5 Low pass filter 6 Function circuit 7 Phase control pulse circuit 9 Load 41 High pass filter 42 Δf ₁ Frequency detection circuit

Claims (1)

[Claims] 1. In a reactive power fluctuation detection control reactive power compensator installed for the purpose of compensating for voltage flicker of an arc furnace, a band reject filter is used when converting an AC signal of reactive power into a DC control signal (Q _DC ). A phase compensation circuit (such as a high-pass filter circuit) is provided after the signal that has passed through the band reject filter, and the fluctuation frequency (Δf) of the arc furnace load current is detected, and the phase delay of the control signal caused by this Δf is detected. A control system for a reactive power compensator characterized by automatically compensating for errors by varying the cutoff frequency of the high-pass filter circuit.