JPH0773155B2 - Method of manufacturing circuit parts - Google Patents
Method of manufacturing circuit partsInfo
- Publication number
- JPH0773155B2 JPH0773155B2 JP4126757A JP12675792A JPH0773155B2 JP H0773155 B2 JPH0773155 B2 JP H0773155B2 JP 4126757 A JP4126757 A JP 4126757A JP 12675792 A JP12675792 A JP 12675792A JP H0773155 B2 JPH0773155 B2 JP H0773155B2
- Authority
- JP
- Japan
- Prior art keywords
- injection
- hole
- molded
- view
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、射出成形部材に回路パ
ターンを形成した回路部品の製造方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit component in which a circuit pattern is formed on an injection molded member.
【0002】[0002]
【従来の技術】従来、高性能エンジニアリングプラスチ
ック等により形成した射出成形回路部品において、その
代表的な回路パターンの形成方法には、主に次の2つの
方法がある。その一つは、ワンショットモールド法で、
図11に示すように、先ず、図(イ)の工程において、
半田付けの高温に耐えられるような高耐熱性の樹脂を原
料として、射出成形により略平板状の基盤30を成形
し、次に、同図(ロ)の工程において、該基盤30の表
面に前処理としてエッチング処理や触媒処理等を施した
後、無電解銅メッキ31を全面に施す。2. Description of the Related Art Conventionally, there are mainly the following two methods for forming a typical circuit pattern of an injection molded circuit component formed of high performance engineering plastic or the like. One is the one-shot mold method,
As shown in FIG. 11, first, in the step of FIG.
Using a highly heat-resistant resin that can withstand the high temperature of soldering as a raw material, a substantially flat plate-shaped substrate 30 is formed by injection molding. Next, in the step of FIG. As a treatment, an etching treatment, a catalyst treatment or the like is performed, and then an electroless copper plating 31 is applied to the entire surface.
【0003】そして、更に同図(ハ)の工程において、
マスキングレジストやエッチングレジスト等でマスキン
グ32し、次に同図(ニ)の工程において、全体に電気
メッキをする。その後、不要な部分のレジスト剥離及び
銅エッチング等を施して、基盤30の表面に所定の回路
パターン33を形成する方法である。Further, in the process shown in FIG.
Masking 32 is performed with a masking resist, an etching resist, or the like, and then the whole is electroplated in the step of FIG. After that, the resist is stripped off unnecessary portions and copper etching is performed to form a predetermined circuit pattern 33 on the surface of the substrate 30.
【0004】もう一つの回路形成方法は、図12に示す
2ショットモールド法で、先ず同図(イ)の工程で所望
形状の一次側成形部品34を成形し、その後同図(ロ)
の工程において、前処理としてエッチング処理,触媒処
理など35を施す。次に、同図(ハ)の工程において、
この一次側成形部品34を型枠に入れ、この上に二次側
材料を注入し、この二次側材料36で一次側成形部品3
4の所定部分34aのみを露出せしめて被覆した二重構
造に成形した後、同図(ニ)の工程において、メッキ処
理を施し、前記一次側成形部品34の露出した前記所定
部分34aにのみ金属皮膜37を形成する方法である。Another circuit forming method is the two-shot molding method shown in FIG. 12, in which the primary-side molded part 34 having a desired shape is first formed in the step shown in FIG.
In this step, as a pretreatment, an etching treatment, a catalyst treatment, etc. 35 is performed. Next, in the step of FIG.
The primary-side molded part 34 is put in a mold, and the secondary-side material is injected onto the mold, and the secondary-side material 36 is used to form the primary-side molded part 3
After forming a double structure in which only the predetermined portion 34a of No. 4 is exposed and covered, a plating process is performed in the step of FIG. 4D so that only the exposed predetermined portion 34a of the primary-side molded part 34 is made of metal. This is a method of forming the film 37.
【0005】[0005]
【発明が解決しようとする問題点】然し乍ら、前記ワン
ショットモールド法によるものは、生産工程が多く、ま
た銅エッチングが必要であるため高価なものとなるこ
と、マスキング工程を含むため、コーナー部のアール取
りが必要で作業性が悪いこと、更にまた成形部品表面の
立上り角度が約60度以内で、且つ段差が約8mm以下で
あること等の諸制約があるために、立体化が困難である
といった問題点がある。However, the one-shot molding method involves many production steps and is expensive because copper etching is required, and a masking step is included. It is difficult to make a solid because there are various restrictions such as rounding is required, workability is poor, and the rising angle of the surface of the molded part is within about 60 degrees and the step is about 8 mm or less. There is a problem such as.
【0006】これに対し、上記2ショットモールド法
は、立体回路の形成には適するが、二重成形法であるた
め、一次側成形部品25の型枠内における位置合せが難
しく作業能率が悪いこと、又無電解メッキが基本となる
ためコスト高となるといった諸問題点がある。On the other hand, the above-mentioned two-shot molding method is suitable for forming a three-dimensional circuit, but since it is a double molding method, it is difficult to align the primary-side molded part 25 within the frame and the work efficiency is poor. Also, there are various problems that the cost is high because electroless plating is the basis.
【0007】[0007]
【問題点を解決するための手段】本発明は、上記のよう
な従来の問題点を解決するためになされたもので、比較
的に単純な回路を形成する部品に対して、低コストで簡
易に回路パターンを形成できるものを提供することを目
的としたものであり、その要旨は、表面に導電パターン
用の凸部を有しその一部に貫通孔を穿設したメッキ可能
な第1射出成形部材の上面に、凸の部分を切除した前記
第1射出成形部材と断面ほゞ同一形状のメッキ不可能な
第2射出成形部材を嵌合するとゝもに、この嵌合体全体
に無電解メッキ処理を施した後、電気メッキ処理を施し
て前記第1射出成形部材の露出面に導電パターンを形成
するとゝもに、該第1射出成形部材の裏面における前記
貫通孔の周縁部を切除して絶縁部を形成することを特徴
とする回路部品の製造方法にある。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and is low cost and simple for a component forming a relatively simple circuit. It is an object of the present invention to provide a device capable of forming a circuit pattern on a substrate, and the gist thereof is a first plateable injection in which a convex portion for a conductive pattern is formed on the surface and a through hole is formed in a part thereof. When a non-platable second injection-molded member having the same cross-section as the first injection-molded member with the convex portion cut off is fitted on the upper surface of the molded member, electroless plating is applied to the entire fitting body. After the treatment, an electroplating treatment is performed to form a conductive pattern on the exposed surface of the first injection-molded member, and the peripheral portion of the through hole on the back surface of the first injection-molded member is cut off. Of the circuit component characterized by forming the insulating portion In the production method.
【0008】[0008]
【実施例】以下、本発明を図1乃至図9に示す実施例に
基き詳細に説明する。なお、図1は本発明に係る回路部
品の構成部材の分解斜視図、図2は本発明方法によって
形成した回路部品の全体斜視図、図3は同回路部品の部
分拡大斜視図、図4は図3部分の説明図で、(イ)は加
工前の図3におけるIII − III線断面説明図、同図
(ロ)は加工後の同説明図、(ハ)は(ロ)の下面図、
図5は他実施例の図4相当断面説明図で、(イ)は加工
前の平面図、(ロ)は同断面図、(ハ)は加工後の平面
図、(ニ)は同断面図、図6は従来の多極コネクタの斜
視図、図7乃至図9は図6に示す多極コネクタを本発明
方法により形成する説明図、図10は本発明方法の他の
実施例を示す部分斜視図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail based on the embodiments shown in FIGS. 1 is an exploded perspective view of constituent members of the circuit component according to the present invention, FIG. 2 is an overall perspective view of the circuit component formed by the method of the present invention, FIG. 3 is a partially enlarged perspective view of the circuit component, and FIG. 3 is an explanatory view of a portion of FIG. 3, (a) is a sectional view taken along line III-III in FIG. 3 before processing, (b) is the same explanatory drawing after processing, (c) is a bottom view of (b),
FIG. 5 is a cross-sectional view corresponding to FIG. 4 of another embodiment, in which (a) is a plan view before processing, (b) is the same cross-sectional view, (c) is a plan view after processing, and (d) is the same cross-sectional view. FIG. 6 is a perspective view of a conventional multipolar connector, FIGS. 7 to 9 are explanatory views of forming the multipolar connector shown in FIG. 6 by the method of the present invention, and FIG. 10 is a portion showing another embodiment of the method of the present invention. It is a perspective view.
【0009】図において、1はメッキ可能な第1射出成
形部品で、例えばポリエーテルイミド(PEI)等の半
田付けの高温に耐えられるような高耐熱性の樹脂で形成
されており、その基盤2の上面2aには形成する回路パ
ターンと同一形状の凸条3が複数個形成されている。4
は前記凸条3の両端部に穿設した貫通孔で、該貫通孔4
は基盤2の上面2aから裏面2bに貫通している。そし
て、この第1射出成形部品1は、メッキ触媒入り樹脂に
より成形した場合には射出成形したそのまゝの成形部品
を使用し、一般の高耐熱性の樹脂で形成した場合には、
その全面にエッチング処理や触媒処理などのメッキ前処
理が施こされている。In the figure, reference numeral 1 is a platable first injection-molded component, which is made of a highly heat-resistant resin, such as polyetherimide (PEI), which can withstand the high temperatures of soldering. A plurality of protrusions 3 having the same shape as the circuit pattern to be formed are formed on the upper surface 2a. Four
Is a through hole formed at both ends of the ridge 3, and the through hole 4
Penetrates from the upper surface 2a of the base 2 to the back surface 2b. When the first injection-molded component 1 is molded with a resin containing a plating catalyst, the molded component as it is is used, and when it is molded with a general high heat-resistant resin,
Pre-plating treatment such as etching treatment and catalyst treatment is applied to the entire surface.
【0010】5は高耐熱性の樹脂、例えばポリフェニレ
ンサルファイド(PPS)等で形成したメッキ不可能な
第2射出成形部品で、その基盤6はメッキ可能な前記第
1射出成形部品1と同一の大きさに形成されているとゝ
もに、図1に示すように、第1射出成形部品1の上面2
aに嵌め合せができるよう断面同一形状に形成されてい
る。そして、この基盤6には、メッキ可能な第1射出成
形部品1に嵌め合わせた時に、第1射出成形部品1の前
記凸条3の表面3aが露出するよう、上下に貫通した貫
通溝7が形成されている。Reference numeral 5 denotes a non-platable second injection-molded part made of a high heat-resistant resin such as polyphenylene sulfide (PPS), and its base 6 has the same size as the plateable first injection-molded part 1. As shown in FIG. 1, the upper surface 2 of the first injection molded part 1 is
It is formed in the same shape in cross section so that it can be fitted to a. Then, a through groove 7 that penetrates vertically is formed on the base 6 so that the surface 3a of the ridge 3 of the first injection-molded component 1 is exposed when fitted to the plateable first injection-molded component 1. Has been formed.
【0011】而して、図1に示すように、前記構成から
なるメッキ可能な第1射出成形部品1とメッキ不可能な
第2射出成形部品5とを嵌め合わせ、両射出成形部品
1,5を固定して一つの嵌合体Aを形成する。この固定
は、嵌め合せ時の圧入のみでも可能であるが、形状によ
っては部分的に接着剤により接着固定しても良い。Then, as shown in FIG. 1, the injection-moldable first injection-molded part 1 and the non-platable second injection-molded part 5 having the above-described constructions are fitted to each other to form both injection-molded parts 1 and 5. Are fixed to form one fitting body A. This fixing can be performed only by press fitting at the time of fitting, but depending on the shape, it may be partially fixed by adhesion with an adhesive.
【0012】そして、この嵌合体Aに無電解メッキ処理
を施して薄いメッキ層を形成したのち、電気メッキ処理
を施こすと、第2射出成形部品5の前記貫通溝7から露
出した第1射出成形部品1の前記凸条3の表面3a、前
記貫通孔4の内周面及び裏面2bにメッキ層8a,8
b,8cが夫々形成され、前記凸条3の表面3aに形成
されたメッキ層8aが回路パターンとなる。この場合、
凸条3の表面3aと裏面2bとは貫通孔4により連通し
ているので、前記各部分の電気メッキ処理が可能とな
る。Then, the fitting body A is subjected to electroless plating to form a thin plating layer, and then electroplating is applied, whereby the first injection exposed from the through groove 7 of the second injection molded part 5. The plating layers 8a, 8 are formed on the front surface 3a of the ridge 3 of the molded part 1, the inner peripheral surface of the through hole 4, and the rear surface 2b.
b and 8c are respectively formed, and the plating layer 8a formed on the surface 3a of the ridge 3 becomes a circuit pattern. in this case,
Since the front surface 3a and the back surface 2b of the ridge 3 are communicated with each other through the through hole 4, it is possible to perform the electroplating process on each of the above portions.
【0013】次に、図4(イ)に示すように、第1射出
成形部品1の前記凸条3の表面3aに形成されたメッキ
層8aと、裏面2bに形成されたメッキ層8cとは貫通
孔4の内周面に形成されたメッキ層8bにより連続して
いるので、図4(ロ)に示すように、第1射出成形部品
1の基盤2の裏面2b側において貫通孔4周囲の面取り
加工等を行い、同図(ハ)に示すように、絶縁部9aを
形成して回路パターン8aと基板2の裏面2bのメッキ
層8cとを分離し、この基板2の裏面2bのメッキ層8
cをアース部とする。Next, as shown in FIG. 4A, the plating layer 8a formed on the front surface 3a of the ridge 3 of the first injection molded part 1 and the plating layer 8c formed on the back surface 2b are Since it is continued by the plating layer 8b formed on the inner peripheral surface of the through hole 4, as shown in FIG. 4B, the periphery of the through hole 4 on the back surface 2b side of the base 2 of the first injection molded component 1 is formed. As shown in FIG. 3C, a chamfering process is performed to form an insulating portion 9a to separate the circuit pattern 8a from the plating layer 8c on the back surface 2b of the substrate 2, and the plating layer on the back surface 2b of the substrate 2. 8
Let c be the earth part.
【0014】図5(イ)(ロ)に示すものは、貫通孔4
が大径孔4aと小径孔4bとの組合せから形成された段
付孔の例であり、この場合には、図5(ハ)(ニ)に示
すように、金型や治工具等により小径孔4b部を打ち抜
き、絶縁部9bを形成して回路パターン8aと基板2の
裏面2bのアース部8cとを分離する。The through holes 4 are shown in FIGS.
Is an example of a stepped hole formed by a combination of a large diameter hole 4a and a small diameter hole 4b. In this case, as shown in FIG. The hole 4b is punched out and an insulating portion 9b is formed to separate the circuit pattern 8a from the ground portion 8c on the back surface 2b of the substrate 2.
【0015】図6に示すものは、ノイズ除去フィルター
を設けた従来の多極コネクタ10に本発明を適用した場
合の実施例で、チップコンデンサー11を装着したフィ
ルター付きコネクタにおいて、そのコネクターピン12
とチップコンデンサー11とを接続する導電パターンを
形成するに当たり、本発明を適用することにより簡単に
パターン部を形成することができる。FIG. 6 shows an embodiment in which the present invention is applied to a conventional multipolar connector 10 provided with a noise removing filter. In a connector with a filter equipped with a chip capacitor 11, its connector pin 12 is shown.
In forming a conductive pattern for connecting the chip capacitor 11 and the chip capacitor 11, the pattern portion can be easily formed by applying the present invention.
【0016】すなわち、図7において、13は樹脂性の
シールドケースで、その前面13aには導電パターン部
となる凸部14を形成し、該凸部14の中心部にコネク
タピン12を挿入する貫通孔15を形成するとゝもに、
このシールドケース13の表面にエッチング処理や触媒
処理などのメッキ前処理を施こす。そして、前記凸部1
4と嵌合する貫通孔16aを形成した前記第2射出成形
部品に相当する絶縁枠部材16を嵌め合せる。この際、
絶縁枠部材16の合せ面16bに接着材等を塗布し接着
固定してもよい。That is, in FIG. 7, reference numeral 13 denotes a resin shield case, a front surface 13a of which is formed with a convex portion 14 serving as a conductive pattern portion, and a through hole for inserting the connector pin 12 into the central portion of the convex portion 14. When the hole 15 is formed,
The surface of the shield case 13 is subjected to pre-plating treatment such as etching treatment or catalyst treatment. And the convex portion 1
4 and the insulating frame member 16 corresponding to the second injection-molded component having the through hole 16a fitted therein is fitted. On this occasion,
An adhesive or the like may be applied to the mating surface 16b of the insulating frame member 16 and fixed by adhesion.
【0017】次に、図8に示すように、絶縁枠部材16
をシールドケース13に一体に固定したのちに、この状
態で全体に無電解メッキ処理を施して薄いメッキ層を形
成する。そして更に、電気メッキ処理をすることによ
り、図9に示すように、絶縁枠部材16で被覆された面
を除くシールドケース13の全面にメッキ層17が形成
される。なお本実施例の場合、コネクタピン12挿入用
の貫通孔15を通して、導電パターン部17aとシール
ド部17cとは貫通孔13のメッキ層17bを介して一
体となるので、メッキ処理後、絶縁枠部材16との嵌合
側とは反対側(シールドケース13の後面13b側)に
おいて、貫通孔15周辺を前記実施例と同様に面取り加
工することにより絶縁部(図示しない)を形成し、導電
パターン部17aとシールド部17c側とを分離する。Next, as shown in FIG. 8, the insulating frame member 16
Is integrally fixed to the shield case 13, and then electroless plating is applied to the whole in this state to form a thin plating layer. Further, as shown in FIG. 9, the plating layer 17 is formed on the entire surface of the shield case 13 except the surface covered with the insulating frame member 16 by performing the electroplating process. In the case of the present embodiment, since the conductive pattern portion 17a and the shield portion 17c are integrated through the plated layer 17b of the through hole 13 through the through hole 15 for inserting the connector pin 12, the insulating frame member after the plating process is performed. On the side opposite to the mating side with 16 (on the rear surface 13b side of the shield case 13), an insulating portion (not shown) is formed by chamfering the periphery of the through hole 15 in the same manner as in the above embodiment, and the conductive pattern portion is formed. 17a and the shield part 17c side are separated.
【0018】図10に示すものは、前記絶縁部の形成方
法の他の実施例で、絶縁枠部材16の嵌合側とは反対側
において、貫通孔15の周部に環状凸部18を形成し、
該環状凸部18の外側に、これと嵌合する穴19を形成
した絶縁部材20を嵌合により固定した後メッキ処理す
れば、環状凸部18の外周には絶縁部が形成されるので
面取り加工を省略することができる。しかしこの場合、
メッキ処理はすべて無電解メッキ処理となるため、コス
トは増加する。FIG. 10 shows another embodiment of the method for forming the insulating portion, in which an annular convex portion 18 is formed around the through hole 15 on the side opposite to the fitting side of the insulating frame member 16. Then
If an insulating member 20 having a hole 19 to be fitted therein is fixed to the outside of the annular convex portion 18 by fitting and then plated, an insulating portion is formed on the outer periphery of the annular convex portion 18, so that chamfering is performed. Processing can be omitted. But in this case
Since the plating process is all electroless plating, the cost increases.
【0019】[0019]
【発明の効果】本発明に係る回路部品の製造方法は、上
記の如く、表面に導電パターン用の凸部を有しその一部
に貫通孔を穿設したメッキ可能な第1射出成形部材の上
面に、凸の部分を切除した前記第1射出成形部材と断面
ほゞ同一形状のメッキ不可能な第2射出成形部材を嵌合
するとゝもに、この嵌合体全体に無電解メッキ処理を施
した後、電気メッキ処理を施して前記第1射出成形部材
の露出面に導電パターンを形成するとゝもに、該第1射
出成形部材の裏面における前記貫通孔の周縁部を切除し
て絶縁部を形成することを特徴とするものであるから、
生産工程が少なくてすみ、且つ電気メッキ処理が可能で
あるため廉価に生産することが出来るとゝもに、立体回
路パターンでも自在に形成できるといった諸効果があ
る。As described above, the method of manufacturing a circuit component according to the present invention provides a plateable first injection molding member having a projection for a conductive pattern on the surface and a through hole formed in a part thereof. When the non-platable second injection-molded member having the same cross section as the first injection-molded member with the convex portion cut off is fitted on the upper surface, the entire fitting body is subjected to electroless plating. Then, an electroplating process is performed to form a conductive pattern on the exposed surface of the first injection-molded member, and at the same time, the peripheral portion of the through-hole on the back surface of the first injection-molded member is cut off to form an insulating portion. Because it is characterized by forming
Since the number of production steps is small and the electroplating process is possible, it is possible to produce at low cost, and there are various effects such that a three-dimensional circuit pattern can be freely formed.
【図1】本発明に係る回路部品の構成部材の分解斜視図
である。FIG. 1 is an exploded perspective view of constituent members of a circuit component according to the present invention.
【図2】本発明方法によって形成した回路部品の全体斜
視図である。FIG. 2 is an overall perspective view of a circuit component formed by the method of the present invention.
【図3】同回路部品の部分拡大斜視図である。FIG. 3 is a partially enlarged perspective view of the same circuit component.
【図4】図3のIII − III線断面説明図である。4 is a cross-sectional view taken along the line III-III of FIG.
【図5】他実施例の図4相当断面説明図である。FIG. 5 is a cross-sectional explanatory view corresponding to FIG. 4 of another embodiment.
【図6】従来の多極コネクタの斜視図である。FIG. 6 is a perspective view of a conventional multipolar connector.
【図7】図6に示す多極コネクタを本発明方法により形
成する第1説明図である。FIG. 7 is a first explanatory view of forming the multipolar connector shown in FIG. 6 by the method of the present invention.
【図8】図6に示す多極コネクタを本発明方法により形
成する第2説明図である。FIG. 8 is a second explanatory view of forming the multipolar connector shown in FIG. 6 by the method of the present invention.
【図9】本発明方法により形成した図6に示す多極コネ
クタの斜視図である9 is a perspective view of the multipolar connector shown in FIG. 6 formed by the method of the present invention.
【図10】他実施例の部分斜視図である。FIG. 10 is a partial perspective view of another embodiment.
【図11】従来のワンショットモールド法の説明図であ
る。FIG. 11 is an explanatory diagram of a conventional one-shot molding method.
【図12】従来の2ショットモールド法の説明図であ
る。FIG. 12 is an explanatory diagram of a conventional two-shot molding method.
1 第1射出成形部品 2 基板 2a 上面 2b 裏面 3 凸条 3a 同表面 4 貫通孔 5 第2射出成形部品 6 基盤 7 貫通溝 8 メッキ層 9a 絶縁部 9b 絶縁部 10 多極コネクタ 11 チップコンデンサー 12 コネクターピン 13 シールドケース 14 凸部 15 貫通孔 16 絶縁枠部材 17 メッキ層 18 環状凸部 19 嵌合穴 20 絶縁部材 1 First Injection Molded Component 2 Substrate 2a Upper Surface 2b Back Side 3 Convex Strip 3a Same Surface 4 Through Hole 5 Second Injection Molded Component 6 Base 7 Through Groove 8 Plating Layer 9a Insulating Section 9b Insulating Section 10 Multipolar Connector 11 Chip Capacitor 12 Connector Pin 13 Shield case 14 Convex portion 15 Through hole 16 Insulating frame member 17 Plating layer 18 Annular convex portion 19 Fitting hole 20 Insulating member
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 1/02 N 3/42 B 7511−4E // B29L 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H05K 1/02 N 3/42 B 7511-4E // B29L 31:34
Claims (1)
一部に貫通孔を穿設したメッキ可能な第1射出成形部材
の上面に、凸の部分を切除した前記第1射出成形部材と
断面ほゞ同一形状のメッキ不可能な第2射出成形部材を
嵌合するとゝもに、この嵌合体全体に無電解メッキ処理
を施した後、電気メッキ処理を施して前記第1射出成形
部材の露出面に導電パターンを形成するとゝもに、該第
1射出成形部材の裏面における前記貫通孔の周縁部を切
除して絶縁部を形成することを特徴とする回路部品の製
造方法。 1. A projection having a conductive pattern on the surface thereof
Plateable first injection molding member having a through hole partially formed
The first injection-molded member with the convex portion cut off on the upper surface of the
A non-plating second injection molding member with the same cross section
When mated, the entire mating body is electroless plated
And then electroplating the first injection molding
When a conductive pattern is formed on the exposed surface of a member,
1 Cut the peripheral edge of the through hole on the back surface of the injection molded member.
Manufacturing circuit parts characterized by removing the insulation part
Build method.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4126757A JPH0773155B2 (en) | 1992-04-20 | 1992-04-20 | Method of manufacturing circuit parts |
| GB9305477A GB2266410B (en) | 1992-04-20 | 1993-03-17 | Circuit part and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4126757A JPH0773155B2 (en) | 1992-04-20 | 1992-04-20 | Method of manufacturing circuit parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05299815A JPH05299815A (en) | 1993-11-12 |
| JPH0773155B2 true JPH0773155B2 (en) | 1995-08-02 |
Family
ID=14943171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4126757A Expired - Fee Related JPH0773155B2 (en) | 1992-04-20 | 1992-04-20 | Method of manufacturing circuit parts |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH0773155B2 (en) |
| GB (1) | GB2266410B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0992987A (en) * | 1995-09-22 | 1997-04-04 | Yazaki Corp | Electric junction box manufacturing method |
| DE10023736A1 (en) * | 2000-05-15 | 2001-11-22 | Harting Elektrooptische Bauteile Gmbh & Co Kg | Printed circuit board and method for producing a printed circuit board |
| TW526689B (en) * | 2000-06-12 | 2003-04-01 | Bourns Inc | Molded electronic assembly |
| EP1383360B1 (en) * | 2002-07-18 | 2007-01-03 | FESTO AG & Co | Injection moulded lead carrier and method of producing the same |
| JP4915220B2 (en) * | 2006-11-24 | 2012-04-11 | 富士通株式会社 | Mobile terminal device |
| JP4974376B2 (en) * | 2007-12-26 | 2012-07-11 | 株式会社ミツバ | Film-forming molded body and manufacturing apparatus thereof |
| JP6757666B2 (en) * | 2013-10-11 | 2020-09-23 | マグナ インターナショナル インコーポレイテッド | Selective chrome plating method |
| EP3197248B1 (en) | 2014-08-05 | 2020-07-15 | Koto Engraving Co. Ltd. | Mold for manufacturing a wiring circuit component |
| JP6771837B2 (en) * | 2016-07-07 | 2020-10-21 | モレックス エルエルシー | Molded interconnect device and its manufacturing method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2171355B (en) * | 1985-02-22 | 1989-11-22 | Kollmorgen Tech Corp | Molded articles suitable for adherent metallization, molded metallized articles and processes for making the same |
| IN167760B (en) * | 1986-08-15 | 1990-12-15 | Kollmorgen Tech Corp |
-
1992
- 1992-04-20 JP JP4126757A patent/JPH0773155B2/en not_active Expired - Fee Related
-
1993
- 1993-03-17 GB GB9305477A patent/GB2266410B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| GB9305477D0 (en) | 1993-05-05 |
| GB2266410A (en) | 1993-10-27 |
| JPH05299815A (en) | 1993-11-12 |
| GB2266410B (en) | 1995-07-05 |
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