JPH0773344B2 - Solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and in particular, as a plurality of arranged transistors, a control electrode region made of a semiconductor of a first conductivity type and the first conductivity type are provided. Has a first and second main electrode regions made of semiconductors of different second conductivity types, and includes a transistor capable of storing carriers generated by receiving light energy in the control electrode region, a storage operation, The present invention relates to a solid-state imaging device that performs a read operation and a refresh operation.

[Prior art]

FIG. 3 (A) is a sectional view of the optical sensor cell, and FIG. 3 (B).
Is an equivalent circuit diagram of the optical sensor cell.

In FIG. 3 (A), photosensor cells are formed and arranged on the n ⁺ silicon substrate 1, and each photosensor cell is made of Si.
It is electrically insulated from an adjacent photosensor cell by an element isolation region 2 made of O ₂ , Si ₃ N ₄ or polysilicon.

Each photosensor cell has the following configuration.

N ⁻ with low impurity concentration formed by epitaxial technology
A p region 4 is formed on the region 3 by doping a p-type impurity, and an n ⁺ region 5 is formed in the p region 4 by an impurity diffusion technique or an ion implantation technique.
P region 4 and n ⁺ region 5 are the base and emitter of the bipolar transistor, respectively.

An oxide film 6 is formed on the n ⁻ region 3 in which each region is formed in this way.
And a capacitor electrode 7 having a predetermined area is formed on the oxide film 6. The capacitor electrode 7 faces the p region 4 across the oxide film 6 and controls the potential of the p region 4 in a floating state by applying a pulse voltage to the capacitor electrode 7.

In addition, the emitter electrode 8 connected to the n ⁺ region 5, the wiring 9 for reading a signal from the emitter electrode 8 to the outside, the wiring 10 connected to the capacitor electrode 7, the n ⁺ region having a high impurity concentration on the back surface of the substrate 1. 11 and an electrode 12 for applying a potential to the collector of the bipolar transistor are formed.

Next, the basic operation will be described. The light 13 is incident on the p region 4 which is the base of the bipolar transistor, and charges (here, holes) corresponding to the amount of light are accumulated in the p region 4 (accumulation operation).

The base potential changes in the positive direction due to the accumulated holes. Here, a positive voltage V _r for reading is applied to the capacitor electrode 7 to bias the p region 4 in the positive direction. Thus, p region 4 holes are accumulated is forward biased with respect to n ⁺ regions 5, n ⁺ from the region 5 n ^- region 3 electron current flow due to, n ⁺ region is in a floating state 5 And the potential of the emitter electrode 8 rises. By reading the potential change from the emitter electrode 8, an electric signal corresponding to the amount of incident light can be obtained (reading operation).

To remove the charges accumulated in the p region 4, the emitter electrode 8 is grounded and the pulse of the positive voltage V _f is applied to the capacitor electrode 7. By applying this positive voltage, p region 4
Is biased in the forward direction with respect to the n ⁺ region 5, and the accumulated charge is removed (refresh operation). Thereafter, the above-mentioned operations of accumulation, reading and refresh are repeated.

In short, the photosensor cell accumulates the electric charge generated by the incident light in the p region 4 which is the base, and controls the current flowing from the emitter electrode 8 to the collector electrode 12 by the amount of the accumulated electric charge. Therefore, the accumulated charges are read after being amplified by the amplification function of each cell. This system has high output, high sensitivity, and low noise, and is advantageous for future high resolution.

FIG. 4 is a circuit diagram of a conventional solid-state imaging device in which the photosensor cells are two-dimensionally arranged.

In the same figure, each chapacifier electrode 7 of the two-dimensionally arrayed photosensor cells 30 is commonly connected to a horizontal line 31, and each horizontal line 31 is connected to an output terminal of a vertical scanning unit 32. Further, the emitter electrodes 8 of the respective photosensor cells 30 are commonly connected to the vertical lines 33 for each column,
33 is commonly connected to the read line 34 via a MOS transistor. The gate electrode of each MOS transistor is connected to each output terminal of the horizontal shift register 36, and the MOS transistors are sequentially turned on at the timing when the output from each output terminal shifts. By this horizontal scanning, the optical information accumulated in the optical sensor cell 30 of a certain line is serially read to the reading line 34, amplified by the amplifier 37, and output to the outside.

In such a conventional image pickup device, the number of pixels in the horizontal direction (the number of photosensor cells 30) is usually 200 to 500 pixels. Therefore, considering the one scanning period 63.5Myu _sec in the television, the operating frequency of the horizontal shift register 36 becomes 3～8MHz. These pixel numbers and frequencies can be adequately accommodated technically by conventional devices.

[Problems to be solved by the invention]

However, it is certain that the image pickup apparatus will move toward higher resolution in the future, and in that case, the number of horizontal pixels is considered to be 1024 or more. In this case, considering the same TV rate as above, the operating frequency of the horizontal shift register 36 is about 16 MHz or higher.

For this reason, in the conventional circuit configuration, particularly the operation of the horizontal shift register has a very high frequency, and the design constraint becomes severe. In addition, the circuit configuration becomes complicated and the yield is reduced.

[Outline of Invention]

The solid-state imaging device according to the first invention of the present application includes, as at least a plurality of transistors arranged in a line, a control electrode region made of a semiconductor of a first conductivity type and a semiconductor of a second conductivity type different from the first conductivity type. Solid-state imaging having a first and a second main electrode region and a transistor capable of storing carriers generated by receiving light energy in the control electrode region, and performing a storage operation, a read operation, and a refresh operation. In the device, the junction between the first main electrode region in a floating state connected to the first main electrode region and the control electrode region is forward biased to accumulate in the control electrode region. An output circuit for reading an output signal based on the carriers to the first main electrode region side in the floating state, wherein a predetermined number of transistors among the plurality of transistors are provided. And a first selecting unit connected to a first group of transistors arranged between the first group and sequentially selecting and outputting output signals of the transistors of the first group, and the first selecting unit. A second transistor, which operates independently and is different from the first group.
An output circuit that is connected to the group of No. 2 and includes a second selection unit that sequentially selects and outputs the output signals of the transistors of the second group, and removes carriers accumulated in the control electrode region. As a refreshing means, a first switch array for holding the first main electrode area of the transistors of the first group at a reference potential, and a first main electrode area of the transistors of the second group as a reference. A second switch array for holding the potential and a common reference electrode source for all control electrode regions of the plurality of transistors arranged in a line are independent of the first and second main electrode regions. And a switch for applying a refresh voltage, and performs the refresh operation by forwardly biasing the junction between the first main electrode region and the control electrode region held at the reference potential. Means and are provided.

In the solid-state imaging device of the second invention of the present application, a plurality of transistors arranged in a matrix of a plurality of rows and a plurality of columns are provided as a control electrode region made of a semiconductor of a first conductivity type and the first conductivity type. A first and a second main electrode region made of a semiconductor of a second conductivity type different from that of the control type, and a transistor capable of storing carriers generated by receiving light energy in the control electrode region. In a solid-state imaging device that performs an operation, a read operation, and a refresh operation, a junction between the first main electrode region in a floating state connected to the first main electrode region and the control electrode region is forward biased. This is an output circuit for reading an output signal based on the carriers accumulated in the control electrode region to the first main electrode region side in the floating state, and sequentially selects one line from the plurality of lines. Connected to a first group of transistors arranged between a row selecting means and a predetermined number of transistors of the plurality of transistors in the selected row, and sequentially selecting output signals of the transistors of the first group. And a first column selecting circuit for outputting the second column, which operates independently of the first column selecting circuit, is connected to a second group of transistors different from the first group, and is connected to the second group. An output circuit including second column selecting means for sequentially selecting and outputting the output signals of the transistors of the group, and a refresh means for removing carriers accumulated in the control electrode region, A first switch array for holding the first main electrode region of the transistors of the group at a reference potential, and a second switch array for holding the first main electrode region of the transistors of the second group at the reference potential. A switch array and a plurality of A switch for applying a refresh voltage independently from the reference voltage source to the first and second main electrode regions common to all the control electrode regions of the transistors, and in a state of being held at the reference potential. Means for performing the refresh operation by biasing the junction between the first main electrode area and the control electrode area in the forward direction, and the first non-selection period by the row selection means within the read operation period. And means for operating the first and second switch arrays so as to hold the column line connected to the main electrode region of the above at the reference potential.

[Action]

According to the first and second aspects of the present application, signal reading is performed by biasing the junction between the first main electrode region and the control electrode region in a floating state in the forward direction, and the control electrode region is read from the reference voltage source by the reference voltage source. A voltage for refreshing is independently applied to the first and second main electrode regions, and the junction between the first main electrode region and the control electrode region held at the reference potential is forward biased. With this configuration, the solid-state image pickup device is non-destructive, capable of high-output and high-sensitivity readout, and has low fixed pattern noise and low noise. And second selection means (or first and second column selection means, for example, a horizontal shift register) are provided, and the first and second selection means are operated independently to provide transistors of the first group and the second group. Select the output signal from It is to be read, it is possible to reduce the driving frequency of the selection means 1 per even when performing high frequency operation, in which a solid state imaging device capable of increasing the degree of freedom in pattern design of the circuit design and semiconductor devices. In the second invention of the present application, the column line connected to the first main electrode region is held at the reference potential during the non-selection period by the row selection means (for example, the vertical shift register) within the read operation period. By resetting the column line and the first main electrode area, the entire screen is collectively reset.

〔Example〕

 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of a solid-state image pickup device according to the present invention. However, in this embodiment, n × n photosensor cells are arranged, and n is an even number.

As shown in the figure, the optical sensor cell 30 includes a transistor having a control electrode region (base), a first main electrode region (emitter), and a second main electrode region (collector). The capacitor electrode 7 of the photosensor cell 30 is commonly connected to the horizontal lines HL _{1 to} HL _n for each line, and each horizontal line is connected via switching transistors (hereinafter simply referred to as transistors) Tr _{1 to} Tr _n . A read voltage V _r is applied. In addition, each horizontal line has a transistor Tf ₁
The refresh voltage V _f is applied via ~ Tf _n .

Each gate electrode of the transistor Tr ₁ to Tr _n is connected to terminals L ₁ ~L _n of the vertical shift register 101, a vertical scanning is performed. Further, a refresh pulse φf for determining the timing of performing the refresh operation is applied to each gate electrode of the transistors Tf _{1 to} Tf _n .

The emitter electrodes 8 of the photosensor cells 30 are commonly connected to the vertical lines VR _{1 to} VR _n for each column. In the present embodiment, odd-numbered vertical lines _{VR 1, VR 3, ... VR} n-1 transistors Ta ₁ to Ta _m (provided that n = 2m.) Is connected to the read line 102 via, It is grounded via a transistor Tca ₁ ~Tca _m. Even-numbered vertical lines VR ₂ , V
R _4, ... VR _n is connected to a readout line 102 through the transistor Tb ₁ ~Tb _m, it is grounded via the transistor Tcb ₁ ~Tcb _m.

Each gate electrode of the transistor Ta ₁ to Ta _m is respectively connected to the terminal Ra ₁ to Ra _m of the horizontal shift register A, transistor
Tb ₁ ~Tb _m are respectively connected to terminals Rb ₁ ~Rb _m of the horizontal shift register B. Further, the gate electrode of the transistor Tca ₁ ~Tca _m are connected to a common pulse φca is applied. The clock φcb is similarly applied to the gate electrodes of the transistors Tcb _{1 to} Tcb _m . Here, the pulses φca and φcb are the same.

The read line 102 is connected to the input terminal of the output amplifier 103, is grounded via the transistor 104, and the pulse φc is applied to the gate electrode of the transistor 104.

The collector electrodes 12 of all the photosensor cells 30 are commonly connected, and the collector voltage V _c is applied at appropriate times.

In the solid-state imaging device described above, the junction between the emitter (base area (control electrode area)) in the floating state, which is connected to the emitter (first main electrode area), is forward biased to the base. The output circuit for reading the output signal based on the accumulated carriers to the emitter side in the floating state is transistors Tr1 to Trn and horizontal lines HL1 to H.
Ln, vertical lines VR1 to VRn, transistors Ta1 to Tam, transistors Tb1 to Tbm, read line 102, transistor 1
04, output amplifier 103. The first selecting means (first column selecting means) is a horizontal shift register A, and the second selecting means (second column selecting means) is a horizontal shift register B.
Is. The first switch array is transistors Tca1 to Tc
am, the second switch array is transistors Tcb1 to Tcbm. The switches for applying the refresh voltage to the control electrode regions of all the transistors are the transistors Tf1 to Tfn. The row selection means is the vertical shift register 101.

Next, the operation of the horizontal shift registers A and B will be briefly described with reference to the timing chart shown in FIG.

In this embodiment, since two horizontal shift registers are provided to perform horizontal scanning, the drive timings of the horizontal shift registers A and B have a half-cycle phase difference. The horizontal shift register A, clock phi _1a, phi _2a and the start pulse PSa is input, the terminal Ra ₁ to Ra _m in synchronism with the clock phi _1a
The high level is sequentially output from. The horizontal shift register B also has clocks φ _1b and φ _2b and a start pulse PS.
b is input, and high levels are sequentially output from the terminals Rb ₁ to Rb _m in synchronization with the clock φ _1b . However, the clock φ _1b is delayed in half-cycle phase from the clock φ _1a , and the clock φ _1b
It has the same phase as _2a . Therefore, from the terminals of the horizontal shift registers A and B, Ra ₁ , Rb ₁ , Ra ₂ , Rb ₂ , ...
High level is output alternately.

Next, the specific operation of this embodiment having such a configuration and basic operation will be described with reference to the timing waveform chart shown in FIG.

Further, in the refresh period, the collector electrode 12 of the photosensor cell 30 is set to the ground potential, also pulse φca and φcb transistor Tca ₁ in the high level ~Tca _m, Tc
The emitter electrode 8 is grounded by turning on b _{1 to} Tcb _m . In this state, the pulse φf turns on the transistors Tf ₁ to Tf _n.
Then, the refresh voltage V _f becomes horizontal line HL ₁
~ HL _n applied. As a result, the voltage V _f is applied to the capacitor electrodes 7 of all the photosensor cells 30, and the refresh operation is started. Then, the voltage V _f is returned to the ground potential, the pulse φf becomes low level, and the refresh operation is completed.

Next, in the accumulation period, the voltage V _c is applied to the collector electrode 12, and the emitter electrodes 8 are supplied with the pulses φca and φcb.
Is continuously grounded due to its high level. In this state, light enters and the base region 4 of each optical sensor cell 30
Holes corresponding to the amount of incident light are accumulated in each.

Then, in the read period, the pulse φca and φcb becomes a low level, the transistors _{Ta 1 ~Ta m, Tb 1 ~Tb} m is OF
It becomes F state. In addition, the read voltage V _r changes according to the driving timing of the vertical shift register 101 to the horizontal lines HL _{1 to} HL.
applied sequentially to _n .

First, when a high level is output from the terminal L ₁ of the vertical shift register 101, the transistor Tr ₁ is turned on and the voltage V _r is applied to the horizontal line HL ₁ . Therefore, the first
The photosensor cells 30 in the line are in a read state. Meanwhile, the high level is sequentially and alternately output from the respective terminals of the horizontal shift registers A and B. Now, assuming that a high level is output from the terminal Ra ₁ of the horizontal shift register A, the transistor Ta ₁ is turned on, and the signal of the photosensor cell 30 in the first row and first column is read out to the read line 102,
It is amplified by the output amplifier 103. Immediately thereafter, the transistor 104 is turned on by the pulse φc, and the read line 1
02 is grounded, and carriers accumulated in the wiring capacitance of the read line 102 are removed. Subsequently, a high level is output from the terminal Rb ₁ of the horizontal shift register B. As a result, the transistor Tb ₁ is turned on, the signal of the photosensor cell 30 in the first row and second column is read out to the read line 102 through the vertical line VR ₂ and the transistor Tb ₁ , and the output amplifier
Amplified at 103. Immediately after that, the read line is refreshed similarly by the pulse φc.

In this way, the high level is alternately output from the respective terminals of the horizontal shift registers A and B, and scanning is performed, so that the first
It is possible to serially output the optical information accumulated in all the optical sensor cells 30 of the line. At this time, the scanning frequency of the photosensor cell 30 is twice the driving frequency of each horizontal shift register A and B.

After scanning the first line, the vertical line VR
_The pulses φca and φcb are set to the high level in order to remove the accumulated carriers of _{1 to} VR _n .

The operation of the first line is performed by the vertical shift register 10
The second line, the third line, ... Are also performed according to the driving timing of 1, and the optical information of all the optical sensor cells 30 is serially output from the output amplifier 103. Hereinafter, the same operation is repeated.

In the present embodiment, the horizontal shift register is divided into two, but the present invention is not limited to this, and even if the horizontal shift register is divided into a plurality of parts, the circuit can be easily configured from the present embodiment.

Further, when the horizontal shift register is divided into two as in this embodiment, the horizontal shift registers A and B are replaced by the photosensor cells.
They may be placed on both sides of the 30 array, or collectively on one side. When the read lines 102 are combined on one side, the wiring length of the read line 102 can be shortened, so that the wiring capacitance can be reduced and the output voltage can be increased.

〔The invention's effect〕

As described above in detail, the solid-state imaging device according to the present invention can be a non-destructive, high-output, high-sensitivity read-out, and a low-noise solid-state imaging device with less fixed pattern noise and the like. Even when performing high frequency operation, it is possible to reduce the driving frequency of each selection unit (column selection unit), and it is possible to increase the degree of freedom in circuit design and semiconductor element pattern design.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of a solid-state image pickup device according to the present invention, FIG. 2 (A) is an operation timing chart of horizontal shift registers A and B in this embodiment, and FIG. FIG. 3A is a timing waveform diagram showing the operation of the embodiment, FIG. 3A is a sectional view of the optical sensor cell, and FIG.
Is an equivalent circuit diagram of the photosensor cell, and FIG. 4 is a circuit diagram of a conventional solid-state imaging device in which photosensor cells are two-dimensionally arranged. 7 ... Capacitor electrode, 8 ... Emitter electrode, A, B ...
Horizontal shift register, 101 ... Vertical shift register, HL ₁
~ HL _n …… Horizontal line, VR ₁ ~ VR _n …… Vertical line.

Front page continued (72) Inventor Masaharu Ozaki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Shigetoshi Sugawa 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Masato Shinohara 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) Reference JP-A-59-158681 (JP, A) JP-A-59-153381 (JP, A) ) JP-A-51-71614 (JP, A)

Claims (2)

[Claims] 1. As a plurality of transistors arranged at least in a line, a control electrode region made of a semiconductor of a first conductivity type and a first and a second semiconductor made of a semiconductor of a second conductivity type different from the first conductivity type. A solid-state imaging device that has a main electrode region and is capable of storing carriers generated by receiving light energy in the control electrode region, and that performs a storage operation, a read operation, and a refresh operation. Output signal based on carriers accumulated in the control electrode region by forward biasing the junction between the first main electrode region in a floating state and the control electrode region, which is connected to the main electrode region of Is an output circuit for reading out to the first main electrode region side in the floating state, wherein a predetermined number of transistors among the plurality of transistors are arranged in between. Connected to the first group of transistors, the first selecting means for sequentially selecting and outputting the output signals of the transistors of the first group, and the first selecting means operate independently. , A second transistor different from the first group
An output circuit that is connected to the group of No. 2 and includes a second selection unit that sequentially selects and outputs the output signals of the transistors of the second group, and removes carriers accumulated in the control electrode region. As a refreshing means, a first switch array for holding the first main electrode area of the transistors of the first group at a reference potential, and a first main electrode area of the transistors of the second group as a reference. A second switch array for holding the potential and a common reference electrode source for all control electrode regions of the plurality of transistors arranged in a line are independent of the first and second main electrode regions. And a switch for applying a refresh voltage, and performs the refresh operation by forwardly biasing the junction between the first main electrode region and the control electrode region held at the reference potential. A solid-state imaging device comprising: 2. A control electrode region made of a semiconductor of a first conductivity type and a second conductivity type different from the first conductivity type, as a plurality of transistors arranged in a matrix having a plurality of rows and a plurality of columns. A first and a second main electrode region made of a semiconductor, and a carrier capable of accumulating carriers generated by receiving light energy in the control electrode region for accumulating, reading and refreshing operations. In the solid-state imaging device, the control electrode region is connected to the first main electrode region and biases a junction between the first main electrode region in a floating state and the control electrode region in the forward direction. An output circuit for reading an output signal based on the carriers accumulated in the first main electrode region side in the floating state, and a row selection unit that sequentially selects one row from the plurality of rows, A first group for connecting a predetermined number of transistors among a plurality of transistors in a row to a first group of transistors arranged in between and for sequentially selecting and outputting output signals of the transistors of the first group. The column selecting means and the first column selecting means operate independently of each other, are connected to a second group of transistors different from the first group, and sequentially output signals of the transistors of the second group. An output circuit including a second column selecting unit for selecting and outputting, and a first main transistor of the first group of transistors as a refreshing unit for removing carriers accumulated in the control electrode region. A first switch array for holding the electrode region at the reference potential, a second switch array for holding the first main electrode region of the second group of transistors at the reference potential, and the plurality of transistors All control electrodes A switch for applying a refresh voltage independently from the reference voltage source to the first and second main electrode regions in common to the region, and the first main electrode held at the reference potential. Means for performing the refresh operation by biasing the junction between the region and the control electrode area in the forward direction, and a means for performing the refresh operation on the first main electrode area during a non-selection period by the row selection means within the read operation period. A solid-state imaging device comprising: means for operating the first and second switch arrays so as to hold the connected column line at the reference potential.