JPH0777543A - Measuring device for effective values - Google Patents

Abstract

(57) [Summary] [Purpose] To make it easy to set various trigger conditions and to perform trigger comparison for each cycle. A trigger condition is set in advance in a DSP 16 as an arithmetic unit, a sampling clock having a frequency N times that of the DSP 16 is generated in synchronization with an input waveform by a PLL circuit 14, to sample waveform data, and A / D conversion is performed. After that, the DSP 16 calculates an effective value from the data for one cycle, the DSP 16 compares the effective value with the trigger condition, and this is performed for each cycle of the input signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a measuring device for measuring an average value or an effective value of a current or a voltage, or each parameter of electric power, and more specifically, for measuring an effective value having a trigger generating function. It relates to the device.

[0002]

2. Description of the Related Art FIG. 5 shows a conventional example of an effective value measuring device which is adapted to load waveform data into a memory when an input level exceeds a predetermined threshold value.

According to this, the input signal to be measured is converted to an appropriate level by the range amplifier 1 and then input to the RMS amplifier 2. The effective value obtained by the effective value amplifier 2 is sent to the A / D conversion circuit 3 and the comparator 4.

A predetermined threshold value is preset in the comparator 4, and the effective value is compared with the threshold value. For example, when the condition of effective value> threshold is satisfied, the comparator 4 causes the CPU (central processing unit) to operate. ) 5, the CPU 5 writes the effective value data thereafter to the storage memory 6.

According to this conventional example, the circuit configuration is relatively simple, and since the effective value amplifier 2 is an analog circuit, it is not necessary to actually calculate the effective value, and only the necessary data is collected. can do.

[0006]

However, on the other hand, since the effective value amplifier has a slow response speed, it cannot follow the rapid fluctuation of the effective value level. Further, when the number of trigger conditions is increased, the same number of comparators is required accordingly.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and is characterized in that it has a waveform shaping circuit for shaping an input signal to be measured into a rectangular wave.
The N is synchronized with the rectangular wave output from the waveform shaping circuit.
A PLL circuit for generating a sampling clock having a double frequency, an A / D conversion circuit for sampling the input signal under measurement based on the sampling clock and converting it into digital waveform data, and one cycle of the input signal under measurement. The DSP includes a DSP for performing a predetermined calculation on the waveform data therein and a memory for storing the calculated value. A predetermined trigger condition can be arbitrarily set in the DSP, and the calculated value processed by the DSP is If the above trigger conditions are met,
This is because the writing of the calculated value to the memory is controlled.

[0008]

Operation: First, the DSP (Digital Signal)
A predetermined trigger condition is set in (Processor). The DSP calculates the effective value of one cycle of the input signal and compares it with the trigger condition during the next one cycle, and when the effective value satisfies the trigger condition, writes the effective value after that to the memory.

[0009]

1 is a block diagram of a measuring apparatus according to an embodiment of the present invention. According to this, the measuring apparatus includes a range amplifier 11 for converting an input signal into an appropriate level, and a waveform shaping circuit 12 for shaping an input waveform such as a voltage input via the range amplifier 11 into a rectangular wave.
And a sample hold circuit 13 for sampling data of the same input waveform.

The waveform shaping circuit 12 is composed of, for example, a zero-cross comparator. The input waveform shaped into a rectangular wave here has a PLL (Phase-Locked Loo) at the next stage.
p) Input to the circuit 14.

The PLL circuit 14 receives the same input waveform, generates a sampling clock of N times frequency synchronized with the same, and supplies the same sampling clock to the sample hold circuit 13. In this embodiment, the sampling clock frequency is 512 times the input waveform.

Therefore, the input waveform is sampled by the sample-hold circuit 13 at 512 points of data from one cycle, and the data is converted into digital waveform data by the A / D conversion circuit 15 at the next stage.
It is supplied to a DSP (digital signal processing means) 16.

The DSP 16 receives the waveform data, calculates the sum of products for each data, and then obtains the effective value.
In this case, a predetermined trigger condition can be set in the DSP 16 from an operation unit (not shown) via, for example, a CPU (central processing unit) 18, and the DSP 16 obtains an effective value and then compares it with the trigger condition. When the trigger is ON, the effective value is stored in the storage memory 17.

Referring to the flowchart of FIG. 2, the waveform diagram of FIG. 3 and the trigger condition explanatory diagram of FIG. 4, the case where the input waveform is a voltage will be described. In this embodiment, 512 pieces of data are sampled from one cycle. Because D
The SP16 performs the following arithmetic processing every time each data vn is sampled.

V1 = v1 ² V2 = v2 ² + V1 V3 = v3 ² + V2: V512 = v512 ² + V511 In this case, the DSP 16 obtains time data of one cycle of the input waveform from the waveform shaping circuit 12, and this one cycle is When finished, the same multiply-add operation is performed for the next cycle,
The effective value is calculated from the sum of products obtained in the previous cycle within the margin time of the calculation process. That is, the effective value is obtained by the calculation of (V512 / 512) ^1/2 . Then, the DSP 16 compares the effective value with the trigger condition, and if the condition is satisfied, the effective value is fetched into the storage memory. FIG. 4 shows an example of the trigger condition. FIG. 4A shows a level trigger, and FIG. 4B shows a window trigger in which an upper limit level and a lower limit level are set. Then, a trigger is applied (trigger ON) when the level line is exceeded. Further, FIG. 6C shows a fluctuation range trigger, which compares the actual effect value with the previous effective value of the previous cycle and triggers when the fluctuation range is larger (or smaller) than the set value. To be

Even when the input waveform is a current, the sum of products is calculated for each sampling of each waveform data in the same manner as described above, the effective value is calculated and the trigger condition is compared in the next cycle, The result is preferably displayed on a display or the like.

When the active power is to be obtained, another input channel of the range amplifier 11, the sample hold circuit 13 and the A / D conversion circuit 15 is prepared, and one cycle of each input waveform of voltage and current is Each voltage data vn and current data in for each sampling of the data
The sum of products of is calculated. That is, W1 = v1 × i1 W2 = v2 × i2 + W1 W3 = v3 × i3 + W2: W512 = v512 × i512 + W511 The sum of products is calculated, and within the next cycle, the effective power is obtained by W512 / 512 and a predetermined power is calculated. A comparison with the trigger condition is made. In the above embodiment, the DSP
Although the 16 operations are rms calculations, the present invention is not limited to rms calculations.

[0018]

As described above, according to the present invention, the arithmetic processing is performed by the DSP, so that the frequency of the input signal is less restricted. Further, since the trigger condition can be set in the DSP itself, various triggers can be set without increasing the number of hardware components. Furthermore, since the trigger determination is performed for each cycle, the input waveform can be continuously observed in real time and without leakage of one waveform.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an apparatus for measuring an effective value and the like according to the present invention.

FIG. 2 is a flowchart for explaining the operation of the embodiment.

FIG. 3 is a waveform chart for explaining the operation of the embodiment.

FIG. 4 is a schematic diagram showing types of triggers.

FIG. 5 is a block diagram showing a conventional example.

[Explanation of symbols]

 11 range amplifier 12 waveform shaping circuit 13 sampling and holding circuit 14 PLL circuit 15 A / D conversion circuit 16 DSP 17 storage memory 18 CPU

Front Page Continuation (72) Inventor Kunkyu Kubota 81 Sakurazamachi, Koizumi, Ueda, Nagano Prefecture Hioki Electric Co., Ltd.

Claims (1)

[Claims] 1. A waveform shaping circuit for shaping an input signal to be measured into a rectangular wave, and a PLL circuit for synchronizing with a rectangular wave output from the waveform shaping circuit and generating a sampling clock having a frequency N times that of the rectangular wave. An A / D conversion circuit for sampling the input signal under measurement based on the sampling clock and converting it into digital waveform data; and a DSP for performing a predetermined calculation on the waveform data within one cycle of the input signal under measurement, A memory for storing the calculated value is provided, and a predetermined trigger condition can be arbitrarily set in the DSP.
A measuring device for an effective value or the like, characterized in that, when the calculated value processed by the DSP satisfies the trigger condition, the writing of the calculated value to the memory is controlled.