JPH0778997A - Method for manufacturing display element substrate - Google Patents

Abstract

PURPOSE:To reduce fabrication cost by depositing a cap film for blocking diffusion of hydrogen on a interlayer film, thermally decomposing the moisture captured by the interlayer film to generate hydrogen, and then introducing the hydrogen to a polycrystalline semiconductor thin film. CONSTITUTION:A gate oxide 3 is deposited on the surface of a polycrystalline semiconductor thin film 2 formed on a glass substrate 1 and a gate electrode G is disposed thereon to obtain a TFT 4. A dielectric and hygroscopic interlayer film 5 is then deposited and etched to make a contact hole opening to a source region S. Subsequently, a cap film 6 for blocking diffusion of hydrogen is deposited on the interlayer film 5. Moisture captured by the interlayer film 5 is thermally decomposed to generate hydrogen which is then introduced to the polycrystalline semiconductor film 2. The cap film 3 is then patterned into a wiring electrode for the source region S and an interlayer film 7 is deposited. Subsequently, the interlayer films 5, 7 are etched to make a contact hole to the drain region D and then a pixel electrode 8 is formed on the interlayer film 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display element substrate in which a thin film transistor having a polycrystalline semiconductor thin film as an element region, a pixel electrode driven by the thin film transistor, and a wiring electrode of the thin film transistor are integrally formed. Manufacturing method. More specifically, the present invention relates to a technique for hydrogenating a polycrystalline semiconductor thin film.

[0002]

2. Description of the Related Art A conventional hydrotreating method will be briefly described with reference to FIG. As shown in the figure, a polycrystalline silicon thin film 102 is patterned in a predetermined shape on the surface of the insulating substrate 101 to form an element region. The polycrystalline silicon thin film 102 has a source region S in which impurities are diffused at a high concentration.
And a drain region D are formed, and a channel region Ch is provided between them. A gate electrode G is formed above the channel region Ch via a gate oxide film 103 and a gate nitride film 104, and a thin film transistor (TF
T). This TFT is covered with a first interlayer insulating film 105. The wiring electrode 106 is electrically connected to the source region S through the first contact hole provided in the first interlayer insulating film 105. First interlayer insulating film 1
A second interlayer insulating film 107 is further formed on 05. A pixel electrode 108 made of a transparent conductive film such as ITO is formed on the second interlayer insulating film 107 by patterning, and is electrically connected to the drain region D of the TFT through the second contact hole. P-SiN is formed on the surface of the second interlayer insulating film 107 as an overpassivation film.
The film 109 is patterned. P-SiN film 109
Has a relatively porous structure and contains a considerable amount of hydrogen atoms and is a hydrogen supply source. After forming the TFT, a P-SiN film 109 is formed and annealed, whereby hydrogen atoms diffuse and pass through the second interlayer insulating film 107, the first interlayer insulating film 105, the gate oxide film 103, etc. It can be introduced into the silicon thin film 102. Since hydrogen atoms introduced by the hydrogenation process diffuse into the crystal grain boundaries of the polycrystalline silicon thin film 102 and bond with dangling bonds, the trap density becomes small and the barrier potential becomes low.
Therefore, the carrier mobility in the polycrystalline silicon TFT is increased and the on-current can be increased. Moreover, the leak current can be suppressed by reducing the trap level. Furthermore, since a part of the introduced hydrogen atoms is also combined with the interface state at the boundary between the polycrystalline silicon thin film and the gate oxide film, the threshold voltage of the transistor can be lowered.

[0003]

In the above-mentioned conventional technique, since the P-SiN film 109 used as the diffusion source contains a considerable amount of hydrogen, it may cause a reduction reaction with the ITO forming the pixel electrode 108. There is To prevent this, I
The portion of the P-SiN film adjacent to the TO needs to be removed by photolithography and etching, which requires cost and time. Further, since the hydrogenation efficiency is deteriorated in the portion where the P-SiN film is removed, there is a problem that the TFT characteristics vary. As another hydrogenation treatment technique, a method of exposing the TFT to hydrogen plasma to introduce hydrogen has been attempted. However, similar to the method using a P-SiN film as a hydrogen supply source, there is a problem that extra cost and time are required for a special device, an additional process, and the like.

[0004]

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, it is an object of the present invention to provide a method of manufacturing a display element substrate capable of efficient hydrogenation treatment. The following measures have been taken in order to achieve this object. That is, in a method of manufacturing a display element substrate in which a thin film transistor having a polycrystalline semiconductor thin film as an element region, a pixel electrode driven by the thin film transistor, and a wiring electrode of the thin film transistor are integrally formed, a thin film transistor is formed. A deposition step of forming an interlayer film having post-insulating and hygroscopic properties, a coating step of forming a hydrogen diffusion blocking cap film on the interlayer film, and a thermal decomposition of water trapped in the interlayer film. Hydrogenation step of generating hydrogen and diffusing it to the side opposite to the cap film and introducing the hydrogen into the polycrystalline semiconductor thin film.

In the deposition step, for example, silicon glass is formed as an interlayer film. This silicon glass is made of PSG having a phosphorus content of 8% or less, for example. In the covering step, for example, a dense conductor film is formed as the cap film. This conductor film can be selected from metal materials such as aluminum, titanium, tantalum, molybdenum, chromium, tungsten or titanium nitride. Alternatively, it is possible to select from metal silicides such as aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide or tungsten silicide. Further, the conductor film can be composed of a multilayer film of two or more layers selected from aluminum, titanium, molybdenum, chromium, tungsten, aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide, tungsten silicide and the like. In these cases, it is also possible to pattern the conductor film after the hydrogenation step to process it into a wiring electrode. Further, a flattening step of forming a flattening film after the wiring step and a pixel step of forming a pixel electrode on the flattening film may be performed.

According to another aspect, in the covering step, a dense insulating film may be formed as a cap film.
This insulating film is made of P-SiN, P-SiO, P-SiON.
Etc. can be selected. In this case, the insulating film may be removed after the hydrogenation step.

[0007] Preferably, the hydrogenation step is from 150 ° C to
The heat treatment is performed in the range of 500 ° C. Preferably, the heating time is set in the range of 1 hour to 15 hours. This heat treatment is preferably performed under an atmosphere containing nitrogen gas or hydrogen gas.

[0008]

According to the present invention, the interlayer film deposited on the thin film transistor is used as a hydrogen supply source.
That is, after forming a hydrogen diffusion-inhibiting cap film on this interlayer film, the moisture trapped in the interlayer film is thermally decomposed to generate hydrogen, which is then introduced into the polycrystalline semiconductor thin film. For this cap film, for example, a dense conductor film can be used, and patterning is performed after the hydrogenation process to form a wiring electrode, a black mask, or the like. Therefore, since the cap film is not particularly formed for hydrotreating, there is an advantage that the hydrotreating method according to the present invention can be carried out without increasing the number of steps.
The cap film is not limited to the conductor film, and a dense insulating film may be used. In this case, the insulating film can be left as it is as an interlayer film.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a process chart showing a first embodiment of a method for manufacturing a display element substrate according to the present invention. First, as shown in (1), a polycrystalline semiconductor thin film 2 is entirely formed on a glass substrate 1 by using CVD or the like. In this example, the polycrystalline semiconductor thin film 2 is made of polycrystalline silicon (Poly-S).
i) consists of. Next, as shown in (2), a gate oxide film 3 is formed on the surface of the polycrystalline semiconductor thin film 2, and a gate electrode G is arranged on the gate oxide film 3 to form a thin film transistor (TFT) 4. The thin film transistor 4 has a drain region D and a source region S in which impurities are implanted at a high concentration on both sides of the gate electrode G.

Next, as shown in (3), a deposition step of forming an interlayer film 5 having an insulating property and a hygroscopic property is performed. The interlayer insulating film 5 is made of, for example, silicon glass. Preferably, the silicon glass is PS with a phosphorus content of 8% or less.
G. In this example, PSG having a phosphorus concentration of 4% is deposited. It has hygroscopicity and is suitable for containing water in advance.

Next, as shown in (4), the interlayer film 5 is locally etched to open a contact hole communicating with the source region S of the TFT 4. Then, a covering step of forming a hydrogen diffusion blocking cap film 6 on the interlayer film 5 is performed. The cap film 6 is made of a dense conductor film and can be selected from, for example, aluminum, titanium, tantalum, titanium nitride and the like. In this example, aluminum is used, and its thickness is 300 nm or more to provide sufficient hydrogen diffusion inhibiting property. Subsequently, a hydrogenation step is carried out in which the moisture captured in the interlayer film 5 is thermally decomposed to generate hydrogen, and is diffused to the side opposite to the cap film 6 and introduced into the polycrystalline semiconductor thin film 2. The heating temperature at this time is appropriately in the range of 150 ° C to 500 ° C. When the temperature is 150 ° C or lower, thermal decomposition of water does not proceed. On the contrary, if the temperature is increased to 500 ° C. or higher, the cap film 6 made of aluminum or the like is melted and the interlayer film 5 made of PSG or the like is densified. In this example, heating was performed at 300 ° C. Appropriate heating time is about 1 hour to 15 hours. A longer heating time is more effective for improving the TFT characteristics. However, if it is set to 15 hours or more, the throughput becomes poor. On the contrary, if it is within 1 hour, the hydrogenation treatment may be insufficient. In this example, heat treatment was performed for about 3 hours. This heat treatment is preferably performed in an atmosphere containing nitrogen gas or hydrogen gas. It is considered that by performing this heat treatment, the moisture absorbed by the interlayer film 5 is decomposed, and only the generated hydrogen can diffuse into the polycrystalline semiconductor thin film 2 and be hydrogenated. At this time, since the device surface is covered with the cap film 6, it is possible to prevent hydrogen from diffusing out of the device.

Next, as shown in (5), the cap film 6 is patterned to form a wiring electrode for the source region S of the TFT 4. After this wiring step, another interlayer film 7 is deposited. Finally, as shown in (6), the interlayer films 5 and 7 are locally etched to form a contact hole communicating with the drain region D of the TFT 4. Finally, the pixel step of forming the pixel electrode 8 on the interlayer film 7 is performed to complete the display element substrate.

In order to evaluate the process shortening effect of the manufacturing method according to the present invention, the running time was measured. It was possible to keep the average of about 14 days from the introduction of the glass substrate 1 to the completion of the display element substrate. Further, in the present embodiment, unlike the conventional case, a P-SiN film or the like is not used as a diffusion source so that the CVD is performed.
The process and the like can be omitted, and the manufacturing cost can be reduced to about 95% compared with the conventional method. Further, when an active matrix liquid crystal display device was assembled using this display device substrate and the pixel defect rate was inspected, it was 1.0 ppm or less on average, which could be suppressed to an extremely low level. It is considered that this is because efficient hydrogenation treatment is performed and the damage caused by the hydrogenation treatment is small.

On the other hand, as a comparative example, a conventional step of depositing a P-SiN film as a hydrogen diffusion source and performing a hydrogenation process through photolithography and etching is adopted.
A display element substrate was actually prepared. In this case, it took an average of 18 days from the introduction of the glass substrate to the completion of the display element substrate. When an active matrix liquid crystal display device was assembled using the display device substrate thus prepared and the pixel defect rate was inspected, it was about 2.5 ppm on average, and the running cost was also increased.

FIG. 2 illustrates in detail the hydrogenation step, which is an essential part of the method for manufacturing a display element substrate according to the present invention. As shown in (1), after forming the TFT 4, PSG is deposited as the interlayer film 5. Next, as shown in (2), aluminum is vapor-deposited as the cap film 6 on the interlayer film 5. Moisture penetrates into the interlayer film 5 during the standing before the vapor deposition process or during the pretreatment for the vapor deposition. By using PSG having high hygroscopicity as the interlayer film 5, a sufficient amount of water can be secured. Finally, as shown in (3), moisture is decomposed into hydrogen and oxygen by annealing during or after vapor deposition of the cap film 6. This decomposed hydrogen is Poly-Si
Is diffused into the polycrystalline semiconductor thin film 2. In addition, PSG
The higher the phosphorus concentration, the better the hygroscopicity, which is advantageous for the above-mentioned hydrotreatment. However, phosphorus concentration is 8%
On the contrary, hydrogenation is inhibited when the temperature exceeds the limit. It is considered that this is because the thermally decomposed hydrogen has its diffusion and transfer blocked by phosphorus. That is, there is an optimum phosphorus concentration range when PSG is used as the interlayer film.

Next, a second embodiment of the method of manufacturing a display element substrate according to the present invention will be described in detail with reference to FIG.
As shown in (1) and (2), a semiconductor process of forming the thin film transistor 4 on the substrate 1 is performed. This step is similar to the step shown in (1) and (2) of FIG. Next, as shown in (3), a deposition step of forming an interlayer film 5 having an insulating property and a hygroscopic property is performed. This step is also similar to the step shown in (3) of FIG.

Next, as shown in (4), the interlayer film 5 made of PSG is locally etched to open a contact hole communicating with the source region of the TFT 4. Subsequently, a conductor film of aluminum or the like is formed and patterned into a predetermined shape to form the wiring electrode 9. Next, as shown in (5), a coating step of forming a hydrogen diffusion blocking cap film 6 on the interlayer film 5 is performed. In this embodiment, the cap film 6 is made of a dense insulating film. The insulating film is P-SiN, P-Si
It is selected from O, P-SiON and the like. In this example, P-Si
N was used. The film thickness of P-SiN was set to 100 nm or more in order to give the cap film 6 a sufficient hydrogen diffusion inhibiting property. Then, a hydrogenation process was performed in which the moisture captured in the interlayer film 5 was thermally decomposed to generate hydrogen, and was diffused to the side opposite to the cap film 6 and introduced into the polycrystalline semiconductor thin film 2. Also in this example, the heating temperature was set to 300 ° C. and the heating time was set to 3 hours or more. Finally, as shown in (6), the cap film 6 and the underlying interlayer film 5 are locally etched to open a contact hole communicating with the drain region D of the TFT 4. Subsequently, a transparent conductive film such as ITO is formed and patterned into a predetermined shape to form the pixel electrode 8. In this way, the display element substrate is completed.

In this example, it took 18 days on average until the glass substrate 1 was charged and the display element substrate was completed. The throughput is increased as compared with the first embodiment shown in FIG. 1, but this is because a step of separately depositing an insulating film instead of the conductor film for the wiring electrode as the cap film is added. An active matrix liquid crystal display device was assembled using the display element substrate according to the embodiment of FIG. 3, and the pixel defect rate was inspected. As a result, the average rate was 1.3 ppm or less, indicating that sufficient hydrogenation efficiency was obtained. Was obtained. In the embodiment of FIG. 3, the cap film 6 is left as it is and used as an interlayer film between the wiring electrode 9 and the pixel electrode 8.
The present invention is not limited to this. The used cap film 6 may be removed after the hydrogenation step, and another interlayer film having excellent etching property may be deposited instead of the cap film 6. By doing so, the contact opening process for the drain region D of the TFT 4 can be facilitated.

Next, with reference to FIGS. 4 and 5, a third embodiment of the method for manufacturing a display element substrate according to the present invention will be described in detail. The present embodiment is a combination of a hydrogenation process using an interlayer film having a hygroscopic property and a flattening process. First, in step A of FIG. 4, a first polycrystalline silicon thin film (1Po) is formed on the surface of an insulating substrate made of quartz or the like.
ly) is formed by the LPCVD method. Next, Si ions are injected to once miniaturize and then solid phase growth is performed to obtain 1 Pol.
Aim to increase the particle size of y. Then, 1Poly is patterned into a predetermined shape to form an element region. Further, its surface is thermally oxidized to obtain SiO ₂ to obtain a gate oxide film. Further, boron ions are implanted at a predetermined concentration to adjust the threshold voltage in advance. Next, in step B, SiN is formed into a gate nitride film by the LPCVD method. The surface of this SiN is thermally oxidized and converted into SiO ₂ . In this way SiO ₂ / SiN
A gate insulating film having a three-layer structure of / SiO ₂ and excellent in pressure resistance can be obtained. Next, a second polycrystalline silicon thin film (2Poly) is deposited by the LPCVD method. After reducing the resistance of 2 Poly, the gate electrode G is obtained by patterning into a predetermined shape. Then, As ion is injected at a high concentration and 1P
A source region S and a drain region D are provided in oly. In this way, an N-channel type TFT is formed. Subsequently, in step C, an interlayer film (PSG) is deposited by the APCVD method. The first contact hole (1CO
N) and the second contact hole (2CON) are opened, and then aluminum (Al) is entirely deposited by sputtering. In this state, heat treatment (annealing) is performed to thermally decompose the moisture captured by PSG to generate hydrogen, and aluminum formed by sputtering is used as a cap film to diffuse hydrogen and introduce it into 1Poly. Carry out the process.

Next, as shown in step D of FIG. 5, aluminum is patterned into a predetermined shape to form a wiring electrode electrically connected to the source region S of the TFT. Subsequently, in step E, the unevenness of the PSG surface is filled with a flattening film. Therefore, in this example, a liquid acrylic resin having a predetermined viscosity was applied by spin coating. Then, heat treatment is performed to cure the acrylic resin to form a flattening film. Photolithography and etching are performed on the cured flattening film to form an opening that matches 2CON. This 2C
The drain region D of the TFT is exposed at the bottom of ON. Next, in step F, a transparent conductive film is formed by sputtering. In this embodiment, IT is used as the transparent conductive film material.
O is used. ITO is also filled inside 2CON, and T
It is electrically connected to the drain region D of the FT. Finally, in step G, ITO is patterned into a predetermined shape to form a pixel electrode. Through the above steps, the flattened display element substrate is completed. Such a display element substrate is used, for example, in assembling an active matrix liquid crystal display element. In this case, after the pixel process described above, an assembly process is performed in which the counter substrate on which the counter electrode is formed in advance is bonded to the display element substrate through a predetermined gap. Subsequently, an encapsulation process of injecting liquid crystal into the gap is performed to complete the active matrix liquid crystal display element. In the above-described embodiment, as shown in step C, 1CON communicating with the source region S and 2CON communicating with the drain region D of the TFT.
Can be opened at the same time by etching the PSG. Therefore, the manufacturing process can be simplified as compared with the conventional case.
Further, in this embodiment, a flattening film is applied to absorb the undulations on the substrate surface and remove the step. Therefore, when applied to a liquid crystal display device, the pretilt angle of liquid crystal molecules can be made uniform and the reverse tilt domain can be suppressed to improve the display quality.

Next, with reference to FIG. 6, an example of an active matrix liquid crystal display device assembled using the display device substrate manufactured according to the present invention will be described. As shown in the figure, the present liquid crystal display device includes a pair of glass substrates 51, 5
The two are arranged to face each other, and the liquid crystal layer 53 is sealed in the gap. One glass substrate 51 is processed in accordance with the present invention, and has signal lines 54 and scanning lines 55 arranged in a matrix, and TFTs 56 and pixel electrodes 57 arranged at the intersections thereof. This TFT 56 has been subjected to hydrogenation treatment according to the present invention. The TFT 56 is an active switching element that is line-sequentially selected by the scanning line 55 and writes the image signal supplied from the signal line 54 to the corresponding pixel electrode 57. On the other hand, a counter electrode 58 and a color filter film 59 are formed on the inner surface of the upper glass substrate 52. The color filter film 59 is divided into R (red), G (green), and B (blue) segments corresponding to each pixel electrode 57. A desired full-color image display can be obtained by sandwiching the active matrix liquid crystal display element having such a structure between two polarizing plates 60 and 61 and allowing white light to enter.

In order to make the disclosure of the present invention sufficient, the description will be continued with reference to more specific examples. FIG. 8 is a process drawing showing a fourth embodiment of the method for manufacturing a display element substrate according to the present invention. First, as shown in (1), the glass substrate 1
A polycrystalline semiconductor thin film 2 made of Poly-Si is formed on the entire surface by CVD or the like. Then, this is patterned into a predetermined shape. Next, as shown in (2), a gate oxide film 3 is formed on the surface of the polycrystalline semiconductor thin film 2, and a gate electrode G is arranged on the gate oxide film 3 to form a thin film transistor 4.
The thin film transistor 4 has a drain region D and a source region S in which impurities are implanted at a high concentration on both sides of the gate electrode G.
Have. Next, as shown in (3), an interlayer film 5 having an insulating property and a hygroscopic property is formed. In this example, PSG having a phosphorus concentration of 4% is deposited as the interlayer film 5. It has hygroscopicity and is suitable for containing water in advance. Next, as shown in (4), the interlayer film 5 is locally etched,
A contact hole communicating with the source region S of the TFT 4 is opened. Subsequently, a cap film 6 made of molybdenum is formed on the interlayer film 5. The cap film 6 has a dense composition and has a thickness of 300 nm or more to ensure a sufficient hydrogen diffusion inhibiting property. Instead of molybdenum, a metal wiring material such as titanium, chromium, or tungsten can be selected as the cap film 6. Alternatively, it is possible to select from metal silicides such as aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide, and tungsten silicide. Subsequently, the water captured in the interlayer film 5 is thermally decomposed to generate hydrogen, and is diffused to the side opposite to the cap film 6 and introduced into the polycrystalline semiconductor thin film 2. The heating temperature at this time is preferably such that PSG does not densify and molybdenum does not melt, and is set to, for example, 300 ° C. Although the device characteristics are improved when the heating time is as long as possible, it is preferably 3 hours or more in consideration of throughput. This heat treatment is performed in a nitrogen or hydrogen atmosphere. It is considered that by performing this heat treatment, the moisture absorbed by the interlayer film 5 is decomposed, and only the generated hydrogen can diffuse into the polycrystalline semiconductor thin film 2 and be hydrogenated. At this time, since the device surface is covered with the cap film 6, it is possible to prevent hydrogen from trying to diffuse upward. Next, as shown in (5), the cap film 6 made of molybdenum is patterned to form a wiring electrode for the source region S of the TFT 4. After this wiring step, another interlayer film 7 is deposited. Finally, as shown in (6), the interlayer films 5 and 7 are locally etched to remove TF.
A contact hole communicating with the drain region D of T4 is provided. Then, the pixel electrode 8 made of ITO or the like is formed on the interlayer film 7 to complete the display element substrate.

In order to evaluate the process shortening effect of the manufacturing method according to this example, the running time was measured. It was possible to keep the average of about 14 days from the introduction of the glass substrate 1 to the completion of the display element substrate. Further, in this embodiment, unlike the conventional case, a P-SiN film or the like is not used as a diffusion source, so that CVD
The process and the like can be omitted, and the manufacturing cost can be reduced to about 95% compared with the conventional method. Further, when an active matrix liquid crystal display device was assembled using this display device substrate and the pixel defect rate was inspected, it was 1.0 ppm or less on average, which could be suppressed to an extremely low level. This is because efficient hydrogenation treatment is performed and the damage caused by the hydrogenation treatment is small.

Next, a fifth embodiment of the method of manufacturing a display element substrate according to the present invention will be described with reference to FIG. Basically, it is similar to the fourth embodiment shown in FIG. 8, and corresponding parts are designated by corresponding reference numerals to facilitate understanding.
As shown in (1) and (2), a semiconductor process of forming the thin film transistor 4 on the glass substrate 1 is performed. This step is the same as the step shown in (1) and (2) of FIG. Next, as shown in (3), an interlayer film 5 having an insulating property and a hygroscopic property is formed. In this embodiment, non-doped silicon glass (NSG) is used as the interlayer film 5. This N
After the SG has sufficiently absorbed moisture, the SG is locally etched to open a contact hole communicating with the source region S of the TFT 4. Subsequently, a first titanium film is formed on the interlayer film 5.
The cap film 6a is deposited, and then the second cap film 6b made of aluminum is successively deposited to form a metal film having a two-layer structure. Thereafter, heat treatment at 400 ° C. is performed to diffuse hydrogen contained in interlayer film 5 into polycrystalline semiconductor thin film 2. In this case, the first cap film 6a made of titanium functions as a barrier metal layer for preventing spikes between aluminum and Poly-Si due to the heat treatment. Therefore, the titanium film thickness is preferably 100 nm or less. Next, as shown in (5), after performing a hydrogenation process, a cap film having a two-layer structure is patterned as a wiring electrode. Another interlayer film 7 is deposited on this. Finally, the pixel electrode 8 is formed as shown in (6) to complete the display element substrate. In this embodiment, 2
Titanium and aluminum are used to form the cap film having a layered structure, but the present invention is not limited to this. Generally, it is possible to form the cap film by using a multilayer film of two or more layers selected from aluminum, titanium, morbutene, chromium, tungsten, aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide and tungsten silicide.

To evaluate the process shortening effect of the manufacturing method according to this example, the running time was measured. It took about 15 days on average from the introduction of the glass substrate 1 to the completion of the display element substrate. Compared with the fourth embodiment, the heating temperature for the hydrogenation treatment was raised, so that the hydrogenation proceeded further. As a result, when an active matrix liquid crystal display device was assembled using the display device substrate according to the fifth example and the pixel defect rate was inspected, it was 0.8 ppm or less on average, and it was possible to suppress it to a very low level.

FIG. 10 is a schematic cross-sectional view showing another specific example of the display element substrate according to the present invention. As illustrated, the thin film transistor 4 is formed on the glass substrate 1. In this example, the thin film transistor 4 is covered with the first interlayer film 5 and the second interlayer film 7. A wiring electrode 9 is interposed between the interlayer films 5 and 7 and communicates with the source region S of the thin film transistor 4. A cap film 6 having a hydrogen diffusion inhibiting property is formed on these two layers of interlayer films 5 and 7. By performing heat treatment in this state, hydrogen is introduced into the polycrystalline semiconductor thin film 2.
At this time, if at least one of the interlayer films 5 and 7 has sufficient hygroscopicity, effective hydrogenation treatment can be performed according to the present invention. It is not always necessary that all the laminated interlayer films have hygroscopicity.

FIG. 11 is a schematic sectional view showing still another specific example. In the above-described first to fifth embodiments, the hydrogenation process is all performed after opening the contact holes. However, the present invention is not limited to this, and the cap film 6 can be formed and the hydrogenation process can be performed without opening the contact hole in the interlayer film 5 as in this example. In this case, as the cap film 6, for example, an insulating film having a dense composition can be used. After that, a contact hole may be opened in the interlayer film 5 with the cap film 6 left as it is or after being removed by etching.

FIG. 12 is a schematic sectional view showing still another specific example. In this example, after the contact hole communicating with both the source region S and the drain region D of the thin film transistor 4 is opened in the interlayer film 5, the cap film 6 made of a dense conductor material is deposited and the hydrogenation process is performed. .

[0029]

As described above, according to the present invention, a hydrogen diffusion preventing cap film is formed on a hygroscopic interlayer film, and moisture trapped in the interlayer film is decomposed by heating. To generate hydrogen and diffuse it to the side opposite to the cap film to hydrogenate the thin film transistor. The interlayer film and cap film used for this hydrogenation treatment are ordinary TFTs.
Since it is included in the manufacturing process and no additional process is required for the hydrogenation treatment, there is an effect that manufacturing cost can be reduced and high throughput can be achieved. Since a P-SiN film containing hydrogen is not used as a diffusion source unlike the conventional case, a reduction reaction with a pixel electrode made of ITO or the like does not occur,
This has the effect of improving the defect rate. Further, since hydrogen is introduced from the interlayer film adjacent to the polycrystalline semiconductor thin film, there is an effect that variations are reduced and high performance of the TFT can be achieved. Further, unlike the conventional case, since an additional step is not added due to the hydrogenation treatment, there is an effect that damage to the TFT during the manufacturing step can be reduced and high quality can be achieved.

[Brief description of drawings]

FIG. 1 is a process drawing showing a first embodiment of a method for manufacturing a display element substrate according to the present invention.

FIG. 2 is a schematic diagram illustrating in detail the hydrogenation process of the first embodiment.

FIG. 3 is a process drawing showing a second embodiment of the method of manufacturing a display element substrate according to the present invention.

FIG. 4 is a process drawing showing a third embodiment of the method of manufacturing a display element substrate according to the present invention.

FIG. 5 is also a manufacturing process drawing of the third embodiment.

FIG. 6 is an exploded perspective view showing an active matrix liquid crystal display element assembled using a display element substrate manufactured according to the present invention.

FIG. 7 is a schematic diagram for explaining a conventional hydrotreating method.

FIG. 8 is a process drawing showing a fourth embodiment of the method of manufacturing a display element substrate according to the present invention.

FIG. 9 is a process drawing showing a fifth embodiment of the method of manufacturing a display element substrate according to the present invention.

FIG. 10 is a schematic cross-sectional view showing another specific example of the display element substrate according to the present invention.

FIG. 11 is a sectional view showing another specific example of the same.

FIG. 12 is a sectional view showing still another specific example.

[Explanation of symbols] 1 substrate 2 polycrystalline semiconductor thin film 4 thin film transistor 5 interlayer film 6 cap film 8 pixel electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number in the agency FI Technical indication location G02F 1/136 500 (72) Inventor Takezo Urazono 6-735 Kitashinagawa Shinagawa-ku, Tokyo No. Sony Corporation (72) Inventor Hiroyuki Ikeda 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation

Claims (17)

[Claims] 1. A method of manufacturing a display element substrate in which a thin film transistor having a polycrystalline semiconductor thin film as an element region, a pixel electrode driven by the thin film transistor, and a wiring electrode of the thin film transistor are integrally formed. After forming the thin film transistor, a deposition step of forming an insulating and hygroscopic interlayer film, a coating step of forming a hydrogen diffusion preventing cap film on the interlayer film, and a trapping process on the interlayer film. And a hydrogenation step of thermally decomposing the generated moisture to generate hydrogen, and diffusing it to the side opposite to the cap film and introducing it into the polycrystalline semiconductor thin film. . 2. The method for manufacturing a display element substrate according to claim 1, wherein in the depositing step, silicon glass is deposited as an interlayer film. 3. The phosphorus content of the silicon glass is 8
% PSG or less, The manufacturing method of the display element substrate of Claim 2 characterized by the above-mentioned. 4. The method for manufacturing a display element substrate according to claim 1, wherein in the coating step, a dense conductor film is formed as a cap film. 5. The conductor film is made of aluminum, titanium,
The method for manufacturing a display element substrate according to claim 4, wherein the method is selected from tantalum, molybdenum, chromium, tungsten, and titanium nitride. 6. The method of manufacturing a display element substrate according to claim 4, wherein the conductor film is selected from aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide, and tungsten silicide. 7. The conductor film is made of aluminum, titanium,
The method for manufacturing a display element substrate according to claim 4, wherein the display element substrate is a multi-layer film of two or more layers selected from molybdenum, chromium, tungsten, aluminum silicide, titanium silicide, molybdenum silicide, chromium silicide, and tungsten silicide. 8. The method for manufacturing a display element substrate according to claim 4, further comprising a wiring step of patterning the conductor film to process into a wiring electrode after the hydrogenation step. 9. The display element according to claim 8, further comprising a flattening step of forming a flattening film and a pixel step of forming a pixel electrode on the flattening film after the wiring step. Substrate manufacturing method. 10. The method for manufacturing a display element substrate according to claim 1, wherein in the coating step, a dense insulating film is formed as a cap film. 11. The insulating film is P-SiN, P-SiO.
And P-SiON are selected, The manufacturing method of the display element substrate of Claim 10 characterized by the above-mentioned. 12. The method of manufacturing a display element substrate according to claim 10, wherein the insulating film is removed after the hydrogenation step. 13. The hydrogenation step comprises 150 ° C. to 500 ° C.
The method for manufacturing a display element substrate according to claim 1, wherein the heat treatment is performed within the range. 14. The method of manufacturing a display element substrate according to claim 1, wherein the hydrogenation step is performed by heating for 1 hour to 15 hours. 15. The method for manufacturing a display element substrate according to claim 1, wherein the hydrogenation step is performed by heat treatment in an atmosphere containing nitrogen gas or hydrogen gas. 16. A semiconductor process for forming a thin film transistor on a polycrystalline silicon thin film provided on a substrate, a deposition process for forming an interlayer film made of silicon glass having an insulating property and a hygroscopic property, and a step for depositing the interlayer film. A coating step of forming a cap film made of aluminum having a hydrogen diffusion inhibiting property on the upper surface, and moisture trapped in the interlayer film is thermally decomposed to generate hydrogen, and hydrogen is diffused to the side opposite to the cap film. A hydrogenation step of introducing into the polycrystalline silicon thin film, a wiring step of patterning the cap film into a wiring electrode that is electrically connected to the thin film transistor through the interlayer film, and a pixel forming a pixel electrode connected to the thin film transistor. A method of manufacturing a display element substrate, the method including: 17. A semiconductor process for forming a thin film transistor on a polycrystalline semiconductor film provided on one substrate, a deposition process for forming an insulating and hygroscopic interlayer film, and hydrogen on the interlayer film. A coating step of forming a diffusion-inhibiting cap film, and heat decomposition of moisture trapped in the interlayer film to generate hydrogen, and diffusion to the side opposite to the cap film to form the polycrystalline semiconductor film. Hydrogenation step of introducing, pixel step of forming pixel electrode after processing the cap film, and assembly step of joining the other substrate on which the counter electrode is formed in advance to the one substrate through a predetermined gap And a sealing step of injecting liquid crystal into the gap.