JPH078100B2 - Power control method - Google Patents
Power control methodInfo
- Publication number
- JPH078100B2 JPH078100B2 JP60265776A JP26577685A JPH078100B2 JP H078100 B2 JPH078100 B2 JP H078100B2 JP 60265776 A JP60265776 A JP 60265776A JP 26577685 A JP26577685 A JP 26577685A JP H078100 B2 JPH078100 B2 JP H078100B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- circuit
- output
- signal
- supply circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 4
- 238000001514 detection method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000002411 adverse Effects 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
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- Emergency Protection Circuit Devices (AREA)
- Direct Current Feeding And Distribution (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、大電力を消費するために複数の直流電源回路
で構成された電源を制御する電源制御方式に関し、特に
大型コンピュータ用の電源制御方式に関する。Description: TECHNICAL FIELD The present invention relates to a power supply control system for controlling a power supply composed of a plurality of DC power supply circuits in order to consume a large amount of power, and particularly to a power supply control for a large computer. Regarding the scheme.
第2図は従来の電源制御方式を示すブロック図で、n個
の直流電源回路d1′〜dn′は、出力を共通接続して負荷
(図示略)に供給する。直流電源回路d1′〜dn′それぞ
れは、出力が過電圧である時に過電圧信号OV1′〜OVn′
を出力し出力が不足電圧である時に不足電圧信号UV1′
〜UVn′を出力し、出力が不足電流である時に不足電流
信号UC1′〜UCn′を出力する。また電圧安定化制御回路
d0は直流電源回路d1′〜dn′の共通出力が過電圧である
時に過電圧信号OVを出力し、不足電圧である時に不足電
圧信号UVを出力する。FIG. 2 is a block diagram showing a conventional power supply control method, in which n DC power supply circuits d 1 ′ to d n ′ have their outputs connected in common and supplied to a load (not shown). Each of the DC power supply circuits d 1 ′ to d n ′ has an overvoltage signal OV 1 ′ to OV n ′ when the output is overvoltage.
Is output and when the output is undervoltage, the undervoltage signal UV 1 ′
'Outputs, insufficient current signal UC 1 when the output is insufficient current' ~UV n outputs a to UC n '. In addition, the voltage stabilization control circuit
d 0 outputs the overvoltage signal OV when the common output of the DC power supply circuits d 1 ′ to d n ′ is overvoltage, and outputs the undervoltage signal UV when it is undervoltage.
不足電流信号UC1′〜UCn′はアンド回路1に入力され、
過電圧信号OV1′〜OVn′はオア回路2に入力され、不足
電圧信号UV1′〜UVn′はオア回路3に入力され、オア回
路2の出力と過電圧信号OVがアンド回路4に入力され、
オア回路3の出力と不足電圧信号UVがアンド回路5に入
力される。アンド回路1,4,5の出力の論理和である信号A
LM′がオア回路6から出力された時は直流電源回路d1′
〜dn′それぞれを遮断し、出力を零にする。Undercurrent signals UC 1 ′ to UC n ′ are input to the AND circuit 1,
The overvoltage signals OV 1 ′ to OV n ′ are input to the OR circuit 2, the undervoltage signals UV 1 ′ to UV n ′ are input to the OR circuit 3, and the output of the OR circuit 2 and the overvoltage signal OV are input to the AND circuit 4. Is
The output of the OR circuit 3 and the undervoltage signal UV are input to the AND circuit 5. Signal A, which is the logical sum of the outputs of AND circuits 1, 4, and 5.
When LM ′ is output from the OR circuit 6, DC power supply circuit d 1 ′
~ D n ′ is cut off and the output is made zero.
すなわち直流電源回路d1′〜dn′の少くとも一つの出力
が過電圧となり、かつ直流電源回路d1′〜dn′の共通出
力が過電圧となった時に信号ALM′が出力され直流電源
回路d1′〜dn′は遮断される。That DC power supply circuit at least one output of d 1 '~d n' is an overvoltage, and the DC power supply circuit d 1 '~d n' common output signal ALM 'is output when becomes overvoltage DC power supply circuit d 1 ′ to d n ′ are blocked.
また、直流電源回路d1′〜dn′の少くとも一つの出力が
不足電圧となり、かつ直流電源回路d1′〜dn′の共通出
力が不足電圧となった時、または直流電源回路d1′〜
dn′のすべての出力が不足電流となった時にも信号AL
M′が出力され直流電源回路d1′〜dn′は遮断される。Also, when one of the output at least of the DC power supply circuit d 1 'to d n' is insufficient voltage and the common output of the DC power supply circuit d 1 'to d n' becomes undervoltage, or DC power source circuit d 1 '~
Signal AL even when all outputs of d n ′ become undercurrent
M 'is output DC power supply circuit d 1' ~d n 'is blocked.
直流電源回路d1′〜dn′それぞれは、出力が過電流とな
れば遮断され、次のような欠点を有する。Each of the DC power supply circuits d 1 ′ to d n ′ has the following drawbacks because it is shut off when the output becomes an overcurrent.
直流電源回路d1′〜dn′が負荷に対して冗長度がない場
合は、直流電源回路d1′〜dn′のうちの一つでも過電流
となると、直ちにすべての直流電源回路d1′〜dn′が遮
断され、負荷が停止してしまう。When the DC power supply circuits d 1 ′ to d n ′ have no redundancy with respect to the load, if even one of the DC power supply circuits d 1 ′ to d n ′ becomes an overcurrent, immediately all the DC power supply circuits d 1 1 'to d n' is cut off, the load will stop.
例えば直流電源回路d1′が過電流により遮断となった時
は、残りの直流電源回路d2′〜dn′により負荷に電流を
供給しようとするが、もともと冗長度がなく負荷で要求
する電流容量より供給する直流電源回路の容量が少なく
なるため、さらに直流電源回路d2′〜dn′のうち1つ以
上が過電流となり遮断となる。これを繰り返して直ちに
すべての直流電源回路d2′〜dn′が遮断となる。For example, when the DC power supply circuit d 1 ′ is cut off due to an overcurrent, the remaining DC power supply circuits d 2 ′ to d n ′ try to supply current to the load, but originally there is no redundancy and it is required by the load. Since the capacity of the DC power supply circuit to be supplied is smaller than the current capacity, one or more of the DC power supply circuits d 2 ′ to d n ′ are further cut off due to overcurrent. By repeating this, all DC power supply circuits d 2 ′ to d n ′ are cut off immediately.
直流電源回路d1′〜dn′の1台が遮断となった場合でも
残りの直流電源回路が過電流になることなく負荷に十分
電流を供給出来るように直流電源回路d1′〜dn′の台数
を決めて冗長度を持たせることができる。この場合で各
々の直流電源回路d1′〜dn′の過電流の設定が定格電流
値以上に設定されていた場合(一般に過電流の設定値は
定格電流値より余裕をもって大き目に決められる。)
で、直流電源回路d1′〜dn′が定格電流において負荷に
対して冗長度がない時は、例えば直流電源回路d1′が遮
断になれば、他の直流電源回路d2′〜dn′で負荷に電流
を供給し続けることができるが、直流電源回路d2′〜
dn′においては、出力電流が定格以上となり電源の信頼
度に悪い影響を与えるという欠点がある。Even if one of the DC power supply circuits d 1 ′ to d n ′ is cut off, the remaining DC power supply circuits can supply sufficient current to the load without causing overcurrent, and the DC power supply circuits d 1 ′ to d n Redundancy can be provided by deciding the number of ′. In this case, when the setting of the overcurrent of each DC power supply circuit d 1 ′ to d n ′ is set to be equal to or higher than the rated current value (generally, the set value of the overcurrent is determined with a margin larger than the rated current value. )
When the DC power supply circuits d 1 ′ to d n ′ have no redundancy with respect to the load at the rated current, for example, if the DC power supply circuit d 1 ′ is cut off, the other DC power supply circuits d 2 ′ to d 'I can continue to supply current to the load, the DC power supply circuit d 2' n ~
In d n ′, there is a drawback in that the output current exceeds the rating and the reliability of the power source is adversely affected.
さらに過電流の設定値および定格電流値のいずれにおい
ても負荷電流に対して冗長度を有するように直流電源回
路d1′〜dn′の台数を決めて直流電源回路d1′〜dn′の
うちの一台が遮断されても、残りの直流電源回路のいず
れかの出力電流が定格以内にあるように負荷に電流を供
給し続けることができる。Furthermore the DC power supply circuit d 1 as well have a redundancy to the load current in any of the set value and the rated current value of the overcurrent DC decide the number of 'to d n' power circuit d 1 'to d n' Even if one of them is cut off, the current can be continuously supplied to the load so that the output current of any of the remaining DC power supply circuits is within the rating.
しかしこの場合でも過電流の設定が定格電流以上にされ
ている場合は、直流電源回路d1′〜dn′のいずれかの出
力電流が定格以上のまま負荷に電流を供給し続けてしま
うのを確実に防止できない。However, even in this case, if the overcurrent is set to the rated current or higher, the output current of any of the DC power supply circuits d 1 ′ to d n ′ will continue to be supplied to the load with the output current higher than the rated value. Cannot be reliably prevented.
例えば、直流電源回路d1′が過電流により遮断となって
も残りの直流電源回路d2′〜dn′の出力電流が過電流の
設定値および定格電流のいずれの範囲内にもある状態で
負荷に電流を供給するが、さらに直流電源回路d2′が過
電流により遮断となって残りの直流電源回路d3′〜dn′
の出力電流が過電流以内で負荷に電流を供給し続ける
が、定格電流を越えてしまうということがある。この場
合直流電源回路d1′,d2′が遮断となった場合は、定格
を越えて電流を供給し続けることになるので電源の信頼
度に悪影響を与えることになる。For example, even if the DC power supply circuit d 1 ′ is cut off by an overcurrent, the output current of the remaining DC power supply circuits d 2 ′ to d n ′ is in the range of both the set value of overcurrent and the rated current. Current is supplied to the load, but the DC power supply circuit d 2 ′ is cut off due to overcurrent and the remaining DC power supply circuits d 3 ′ to d n ′.
When the output current of is within the overcurrent, the current continues to be supplied to the load, but it may exceed the rated current. In this case, if the DC power supply circuits d 1 ′ and d 2 ′ are cut off, the current will be continuously supplied beyond the rating, which will adversely affect the reliability of the power supply.
本発明の電源制御方式は、それぞれの出力が負荷に共通
接続され、それらのうちの1台が遮断されたときにおい
てもその他の出力電流値が定格値以下にとどまるように
台数が設定された複数の直流電源回路と、この複数の直
流電源回路のうち1つの出力が過電流または不足電流の
時は警告信号を出力する警告手段と、前記複数の直流電
源回路のうち2つ以上の出力が過電流または不足電流の
時は前記複数の直流電源回路を遮断する遮断手段とを含
んで構成される。In the power supply control method of the present invention, each output is commonly connected to a load, and even when one of them is cut off, the other output current values are set to a plurality of units whose number is set below the rated value. DC power supply circuit, warning means for outputting a warning signal when one output of the plurality of DC power supply circuits is overcurrent or undercurrent, and two or more outputs of the plurality of DC power supply circuits When a current or an insufficient current is present, it is configured to include a cutoff unit that cuts off the plurality of DC power supply circuits.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図は本発明の一実施例のブロック図で、n個の直流
電源回路d1〜dnは、出力を共通接続して負荷に供給す
る。直流電源回路d1〜dnそれぞれは、出力が過電圧であ
る時に過電圧信号OV1〜OVnを出力し、出力が不足電圧で
ある時に不足電圧信号UV1〜UVnを出力し、出力が過電流
である時に過電流信号OC1〜OCnを出力し、出力が不足電
流である時に不足電流信号UC1〜UCnを出力する。また電
圧安定化制御回路d0は直流電源回路d1〜dnの共通出力が
過電圧である時に過電圧信号OVを出力し、不足電圧であ
る時に不足電圧信号UVを出力する。直流電源回路d1〜dn
それぞれは過電流信号OC1〜OCnそれぞれと不足電流信号
UC1〜UCnそれぞれを入力するオア回路a1〜anが設けられ
ている。FIG. 1 is a block diagram of an embodiment of the present invention, in which the n DC power supply circuits d 1 to d n are connected in common and supply the outputs. DC power supply circuit d 1 to d n, respectively, and outputs an overvoltage signal OV 1 ~OV n when the output is overvoltage, and outputs the undervoltage signal UV 1 ~UV n when the output is insufficient voltage, the output is over outputting an overcurrent signal OC 1 ~OC n when a current and outputs the insufficient current signal UC 1 to UC n when the output is under current. The voltage stabilization control circuit d 0 outputs the overvoltage signal OV when the common output of the DC power supply circuits d 1 to d n is overvoltage, and outputs the undervoltage signal UV when it is undervoltage. DC power supply circuit d 1 to d n
Overcurrent signals OC 1 to OC n and undercurrent signals
OR circuit a 1 ~a n to enter the UC 1 to UC n each are provided.
なお、直流電源回路d1〜dnのうち1台が遮断されても、
残りの(n−1)台の直流電源回路が定格内の出力電流
で負荷の要求する電流を充足できるように直流電源回路
d1〜dnの台数nを設定しておく。Even if one of the DC power supply circuits d 1 to d n is cut off,
DC power supply circuit so that the remaining (n-1) DC power supply circuits can satisfy the current required by the load with the output current within the rating
setting the number n of d 1 ~d n.
過電圧一致検出用回路H1は、過電圧信号OV1.〜OVnを入
力するオア回路12を有し、オア回路12の出力と過電圧信
号OVを入力するアンド回路14からの信号を出力する。The overvoltage coincidence detection circuit H 1 has an OR circuit 12 that inputs the overvoltage signals OV 1 to OV n, and outputs the output of the OR circuit 12 and a signal from the AND circuit 14 that inputs the overvoltage signal OV.
不足電圧一致検出用回路H2は、不足電圧信号UV1〜UVnを
入力するオア回路13を有し、オア回路13の出力と不足電
圧信号UVを入力するアンド回路15からの信号を出力す
る。The undervoltage match detection circuit H 2 has an OR circuit 13 that inputs the undervoltage signals UV 1 to UV n , and outputs a signal from the AND circuit 15 that inputs the output of the OR circuit 13 and the undervoltage signal UV. .
論理回路G1はオア回路a1,a2の出力を入力するアンド回
路C1と、オア回路a1,a2の出力を入力する排他的論理和
回路S1を有する。論理回路G2〜Gn−1それぞれは、アン
ド回路C2と排他的論理和回路S2,……,アンド回路Cn−
1と排他的論理和回路Sn−1を有し、アンド回路C2〜Cn
−1それぞれは排他的論理和回路S1の出力とオア回路a3
の出力,……,排他的論理和回路Sn−2の出力とオア回
路anの出力を入力し、排他的論理和回路S2〜Sn−1排他
的論理和回路S1の出力とオア回路a3の出力,……,排他
的論理和回路Sn−2の出力とオア回路anの出力を入力す
る。Logic circuit G 1 includes an AND circuit C 1 for inputting the output of the OR circuit a 1, a 2, an exclusive OR circuits S 1 to enter the output of the OR circuit a 1, a 2. Each of the logic circuits G 2 to G n −1 includes an AND circuit C 2 and an exclusive OR circuit S 2 , ..., And circuit C n −.
1 and an exclusive OR circuit S n -1, and AND circuits C 2 to C n
-1 is the output of the exclusive OR circuit S 1 and the OR circuit a 3
, ..., The output of the exclusive OR circuit S n -2 and the output of the OR circuit a n are input, and the outputs of the exclusive OR circuits S 2 to S n -1 exclusive OR circuit S 1 are input. The output of the OR circuit a 3 , ..., The output of the exclusive OR circuit S n -2 and the output of the OR circuit a n are input.
オア回路19はアンド回路C1〜Cn−1の出力を入力する。
オア回路16はオア回路19およびアンド回路14,15の出力
を入力し、信号ALMを出力する。アンド回路18は排他的
論理和回路Sn−1の出力とオア回路19の出力をインバー
タ17を介して入力し、信号Wを出力する。なお信号ALM
が出力された時は直流電源回路d1〜dnを遮断する。信号
Wは警告用の信号である。The OR circuit 19 inputs the outputs of the AND circuits C 1 to C n -1.
The OR circuit 16 inputs the outputs of the OR circuit 19 and AND circuits 14 and 15, and outputs a signal ALM. The AND circuit 18 inputs the output of the exclusive OR circuit S n -1 and the output of the OR circuit 19 via the inverter 17, and outputs the signal W. Signal ALM
Is output, the DC power supply circuits d 1 to d n are shut off. The signal W is a warning signal.
直流電源回路d1〜dnのうち少くとも1つの出力が過電圧
で、かつ直流電源回路d1〜dnの共通出力が過電圧である
時または直流電源回路d1〜dnのうち少くとも1つの出力
が不足電圧で、かつ直流電源回路d1〜dnの共通出力が不
足電圧である時は過電圧一致検出用回路H1または不足電
圧一致検出用回路H2およびオア回路16を通して信号ALM
が出力され、直流電源回路d1〜dnが遮断される。DC power supply circuit d 1 at least one output overvoltage of the to d n, and at least one of time or the DC power supply circuit d 1 to d n common output of the DC power supply circuit d 1 to d n is overvoltage 1 When the two outputs are undervoltage and the common output of the DC power supply circuits d 1 to d n is undervoltage, the signal ALM is sent through the overvoltage match detection circuit H 1 or the undervoltage match detection circuit H 2 and the OR circuit 16.
Is output and the DC power supply circuits d 1 to d n are shut off.
直流電源回路d1〜dnの少くとも2つの出力が過電流また
は不足電流となり、オア回路a1〜anの2つ以上から信号
が出力された時は、アンド回路C1〜Cn−1のいずれかか
ら信号が出力され、オア回路19,16を通して信号ALMが出
力され、直流電源回路d1〜dnが遮断される。When at least two outputs of the DC power supply circuits d 1 to d n are overcurrent or undercurrent and signals are output from two or more of the OR circuits a 1 to a n , the AND circuits C 1 to C n − A signal is output from any one of them, a signal ALM is output through the OR circuits 19 and 16, and the DC power supply circuits d 1 to d n are cut off.
直流電源回路d1〜dnのうち1つのみが過電流または不足
電流となってオア回路a1〜nの1つから信号が出された
時は、排他的論理和回路Sn−1の信号が出力され、また
この時はオア回路19の信号が出力されないのでインバー
タ17の信号が出力されアンド回路18から信号Wが出力さ
れる。またこの時には信号ALMは出力されず、過電流ま
たは不足電流となったもの以外の直流電源回路d1〜dnは
遮断されない。When only one of the DC power supply circuits d 1 to d n is overcurrent or undercurrent and a signal is output from one of the OR circuits a 1 to n , the exclusive OR circuit S n -1 A signal is output, and at this time, the signal of the OR circuit 19 is not output, so the signal of the inverter 17 is output and the signal W is output from the AND circuit 18. Further, at this time, the signal ALM is not output, and the DC power supply circuits d 1 to d n other than those having an overcurrent or an undercurrent are not cut off.
本発明は以上説明したように、それぞれの出力が共通接
続された複数の直流電源回路の1回路が過電流または不
足電流となった場合には、負荷には電流が供給し続けた
まま警告信号により過電流等の状態を知ることが出来る
ので負荷を停止させることなく障害を除去する等の適切
な処置をとることが出来る。また2回路以上の直流電源
回路が過電流または不足電流となった場合にはすべての
直流電源回路を断とするので直流電源回路が定格を越え
て運転されることがなく直流電源回路の信頼性を確保で
きる効果がある。As described above, according to the present invention, when one of a plurality of DC power supply circuits having respective outputs commonly connected has an overcurrent or an undercurrent, a warning signal is continuously supplied to the load. Since it is possible to know the state of overcurrent and the like, it is possible to take appropriate measures such as eliminating the failure without stopping the load. Also, when two or more DC power supply circuits become overcurrent or undercurrent, all DC power supply circuits are disconnected, so that the DC power supply circuits do not operate beyond their ratings and the reliability of the DC power supply circuits is improved. Is effective.
第1図は本発明の一実施例のブロック図、第2図は従来
の電源制御方式のブロック図である。 d1〜dn,d1′〜dn′……直流電源回路、d0′,d0′……
電圧安定化回路、OV,OV1〜OVn,OV1′,OVn′……過電
圧信号、UV,UV1〜UVn,UV1′〜UVn′……不足電圧信
号、OC1〜OCn……過電流信号、UC1〜UCn,UC1′〜UCn′
……不足電流信号、H1……過電圧一致検出用回路、H2…
…不足電圧検出用回路。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional power supply control system. d 1 to d n , d 1 ′ to d n ′ ... DC power supply circuit, d 0 ′, d 0 ′ ……
Voltage stabilizer, OV, OV 1 to OV n , OV 1 ′, OV n ′ ... Overvoltage signal, UV, UV 1 to UV n , UV 1 ′ to UV n ′ ... Undervoltage signal, OC 1 to OC n …… Overcurrent signal, UC 1 to UC n , UC 1 ′ to UC n ′
…… Undercurrent signal, H 1 …… Overvoltage coincidence detection circuit, H 2 …
... Circuit for undervoltage detection.
Claims (1)
れらのうちの1台が遮断されたときにおいてもその他の
出力電流値が定格値以下にとどまるように台数が設定さ
れた複数の直流電源回路と、この複数の直流電源回路の
うち1台の出力が過電流または不足電流の時は警告信号
を出力する警告手段と、前記複数の直流電源回路のうち
2台以上の出力が過電流または不足電流の時は前記複数
の直流電源回路を遮断する遮断手段とを含むことを特徴
とする電源制御方式。1. A plurality of DC power supplies whose number is set so that each output is commonly connected to a load, and when one of them is cut off, the other output current values remain below the rated value. A circuit, warning means for outputting a warning signal when the output of one of the plurality of DC power supply circuits is overcurrent or undercurrent, and the output of two or more of the plurality of DC power supply circuits is overcurrent or A power supply control method comprising: a cutoff unit that cuts off the plurality of DC power supply circuits when the current is insufficient.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60265776A JPH078100B2 (en) | 1985-11-25 | 1985-11-25 | Power control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60265776A JPH078100B2 (en) | 1985-11-25 | 1985-11-25 | Power control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62126827A JPS62126827A (en) | 1987-06-09 |
| JPH078100B2 true JPH078100B2 (en) | 1995-01-30 |
Family
ID=17421877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60265776A Expired - Lifetime JPH078100B2 (en) | 1985-11-25 | 1985-11-25 | Power control method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH078100B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62230315A (en) * | 1986-03-28 | 1987-10-09 | 日本電気株式会社 | Electric source control system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS573525A (en) * | 1980-06-06 | 1982-01-09 | Fujitsu Denso | Power source |
| JPS58198122A (en) * | 1982-05-14 | 1983-11-18 | 日本電気株式会社 | Switching regulator |
-
1985
- 1985-11-25 JP JP60265776A patent/JPH078100B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62126827A (en) | 1987-06-09 |
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