JPH0782189B2 - Camera data imprinting device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a data imprinting device for a camera provided on a film holder, and in particular, inserting a data card into a predetermined position of the film holder and writing on the data card. The present invention relates to a data imprinting device for a camera provided on a film holder that imprints the data on a film.

[Conventional technology]

Conventionally, the data film is inserted into the data film insertion part formed in the light path of the light emitting element and the data imprinting optical system, and the light emitting element is made to emit light so that the data handwritten on the data film is copied onto the film. There is a data imprinting device adapted to be embedded (Japanese Patent Laid-Open No. 54-11).
(See Japanese Patent No. 1332). A stroboscopic discharge tube is used as the light emitting element.

[Problems to be solved by the invention]

However, conventionally, only one shot of the light emission trigger for causing the strobe discharge tube to emit light is output corresponding to the shutter release, and there is a possibility that the strobe discharge tube may emit light. In this case, data imprinting cannot be performed. The problem arises.

The present invention has been made in view of the above circumstances, and provides a data imprinting device for a camera provided in a film holder, which can reduce the light emission error of a strobe discharge tube and improve its reliability. With the goal.

[Means for solving problems]

In order to achieve the above object, the present invention inserts a data card into a predetermined position of a film holder in which a film is loaded, irradiates the data card with a strobe discharge tube for data projection, and reflects or transmits the reflected light. Input of the data imprinting signal output corresponding to the shutter release in the data imprinting device of the camera imprinting the data written on the data card on the film by guiding it to the film through the data imprinting optical system. Sometimes, means for outputting a first light emission trigger for causing the strobe discharge tube to emit light, light emission confirmation means for confirming whether or not the strobe discharge tube emits light, and the strobe discharge tube by the first light emission trigger When it is confirmed that the
A means for outputting a second light emission trigger after a lapse of a fixed time after the output of the first light emission trigger is provided.

[Action]

According to the present invention, when the data imprinting signal output corresponding to the shutter release is input, the first light emitting tolga is output to cause the strobe discharge tube to emit light. Then, when it is confirmed by the light emission confirmation means that the strobe discharge tube is not emitting light by the first light emission trigger, the second light emission trigger is output after a predetermined time has elapsed after the first light emission trigger is output. To do. That is, even if the strobe discharge tube does not emit light due to the first light emission trigger, the light emission trigger is output again to cause the strobe discharge tube to emit light with a higher probability.

〔Example〕

Hereinafter, a preferred embodiment of a data imprinting device for a camera according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is an internal perspective view showing a state where the film holder 20 is attached to the rear portion of the camera body 10. This camera is a commercial camera and has a film holder (hereinafter referred to as a long holder) 20
A long roll film 22 is loaded inside. The film 22 is wound around a winding roll 30 from a supply roll 24 via rollers 26, 27, 28, and the film is fed by rotating the winding roll 30 in the arrow direction.

On the other hand, in the lower part of the long holder 20, an optical system of a data imprinting device and the like are provided.
A business card-sized data card 32 can be inserted. The data writing section at the tip of the data card 32 is irradiated with strobe light by a strobe discharge tube (xenon tube) Xe, and the reflected light is transmitted through a mirror 34, a lens 36 and a mirror 38 to a film between rollers 27 and 28. Imaged above,
As a result, the data such as the shooting date, the shooting location, and the customer name, which are written by handwriting or the like, are imprinted on the data writing section of the data card 32.

Note that the maximum number of shots of this film 22 is about 150 shots, and the data imprinted between each frame is useful for organizing the film after the end of shooting.

FIG. 1 is a conceptual diagram showing a control unit of the data imprinting apparatus, which mainly comprises a strobe control unit 100 and a strobe unit 200.

The flash unit 200 has a charging unit, a discharging unit, a battery checking unit, and the like, and is provided with a power source (NiCd battery or the like) 202 different from the camera body. In addition, a battery switch BSW for detecting attachment / detachment of the battery 202 is provided.

The strobe control unit 100 is driven by a power source on the camera body side, and outputs a start signal for charging or the like to the strobe unit 200 or a data imprinting signal for causing the strobe discharge tube Xe to emit light. Or a signal indicating abnormal charging, etc. is input, the light emitting diode LED1, LE
A warning is displayed by D2 and a signal for prohibiting the next shutter release is output to the central processing unit (CPU) 42.
Furthermore, the flash control unit 100 has a cover switch CSW that turns ON / OFF in synchronization with opening / closing of the cover of the data card insertion slot.
Is provided. Note that the CPU 42 is connected to a CPU (not shown) on the camera body side, and when a signal for prohibiting shutter release is input to the terminal from the flash control unit 100, this is output to the CPU on the camera body side to release the shutter. To prevent That is, the camera body is designed in advance so that the shutter release is prohibited when the pulling lid (film shading plate) is attached to the long holder (when a signal for prohibiting the shutter release is input to the terminal O of the CPU 42). The flash control unit 100 uses this terminal when prohibiting shutter release. If the shutter release is possible while the CPU 42 is in the shutter release enabled state, the terminal TR
The data imprinting signal is output from the IG to the strobe control unit 100.

The strobe control unit 100 and the strobe unit 200 are isolated from each other by a separate power source as described above, and signals are exchanged between them through the seven photocouplers PC1 to PC7.

That is, although noise is generated in the flash unit 200, since the power supply 202 and the signal line are isolated,
The generated noise is not added to the flash control unit 100 and other circuits. Therefore, while charging the flash unit 200,
For example, control of film feeding can be performed in parallel, and the cycle time can be shortened.

The details of the flash control unit 100 and the flash unit 200 will be described later.

[Detailed structure of long holder]

Next, a detailed structure of the long holder 20 will be described with reference to FIGS. 3 to 6.

FIG. 3 is an exploded perspective view of a main part of the long holder. In the figure, an optical system and the like of the data imprinting device are housed in the lower portion 60A of the outer frame 60 (see FIG. 2), and a cover 62 for opening and closing the data card insertion slot is provided in front of it.

That is, the cover 62 is openably and closably mounted on the support portions 61, 61 of the outer frame 60 by the mounting brackets 63A, 63B and the pins 64, 64. A cover switch CSW is provided on the mounting bracket 63A, and a lever 6 for turning the cover switch CSW ON / OFF is further provided.
The pin 5 is pivotally supported by the pin 64 so that it can be rotated in conjunction with the opening and closing of the cover.

On the other hand, FIG. 4 is an exploded perspective view of members and the like constituting an optical path for image capturing of the data image capturing device housed in the lower portion 60A of the outer frame 60. A strobe discharge tube Xe is housed in the member 70, and a member 72 is arranged above the strobe discharge tube Xe. Inside this member 72, as shown in FIG. 2, optical systems for data imprinting such as mirrors 34, 38 and lens 36 are provided. Further, a shield plate 74 is provided on the lower surface of the member 70, a data card insertion port is provided between the member 70 and the shield plate 74, and a member 76 and a flocked material 78 are provided in the insertion port. External light does not enter the inside of the member 70.

Therefore, the data card 32 is inserted into the member 70 through the data card insertion opening after opening the cover 62.

Further, in FIG. 3, the pin 66 is inserted into the hole 60B of the outer frame 60, and is urged by the leaf spring 68 so that the pin 66 projects from the outer frame 60. The leaf spring 68 is a battery switch BSW that detects attachment / detachment of the strobe battery 202.
Acts as an actuator for operating. That is, the battery 202 is mounted by moving the battery 202 in the direction of arrow A to abut against the outer surface of the outer frame 60, and then sliding it in the direction of arrow B to connect the power supply terminal. The pin 66 provided pushes back the leaf spring 68 that is pressed when the battery 202 moves in the direction of arrow A. This leaf spring
With the movement of 68, the battery switch BSW is turned on / off.

FIG. 5 is a perspective view of a frame body 80 arranged inside the outer frame 60, and a motor drive substrate 82 of a motor (not shown) for feeding a film is provided on the outer periphery of the frame body 80. A strobe control board 8 on which the strobe control unit 100 of FIG.
4. A strobe board 86 on which the strobe unit 200 and the like are mounted is arranged.

In addition to the motor drive circuit, the motor drive substrate 82 is provided with a battery switch BSW that faces the leaf spring 68 and is turned on / off by the leaf spring. Further, a motor is arranged on the frame body 80 below the substrate 82 (not shown), and the output of this motor is transmitted to the gear 83 for driving the winding roll via the gear toilet. .

A liquid crystal display 85 for displaying the number of shots is provided on the strobe control board 84, and the strobe board 86 is provided.
Above is the main capacitor C _M for strobe discharge tube emission,
C _M, such as a photocoupler PC1~PC7 is provided.

FIG. 6 is a perspective view of the middle frame 90 which is attached to and detached from the frame 80. The long roll film is attached to and detached from the middle frame 90.
That is, the lids 90 and 92 are arranged so as to be openable and closable in the direction of the arrow, and the lids 90 and 92 are opened when attaching or detaching the film.
The film is wound into an Ω shape as shown in FIG. Also, film loading is performed in a dark room. Further, when the inner frame 90 is mounted in the frame body 80, a gear coaxially provided with the winding roll 30 and a gear 83 on the frame body 80 side are gear-connected,
The film can be fed by the motor.

[Strobe control unit]

Next, details of the flash control unit 100 shown in FIG. 1 will be described.

FIG. 7 is a circuit diagram showing an embodiment of the flash control unit 100. The strobe control unit 100 is connected to the CPU 42 by two signal lines as shown in FIG. 1, and exchanges signals with the strobe unit 200 via seven photocouplers PC1 to PC7.

The strobe control unit 100 mainly has the following functions.

The data copy signal SY for causing the strobe discharge tube Xe to emit light in synchronization with the shutter release is sent to the photocoupler PC1.
To the flash unit 200 via.

A start signal for charging the main capacitor C _M of the strobe discharge tube Xe is output to the strobe unit 200 via the photocoupler PC2.

A warning is displayed when the battery power of the flash battery 202 is exhausted, and the next photographing (shutter release) is prohibited in the data imprinting use mode.

A warning is displayed when the flash discharge is abnormal or when the charging is abnormal, and the next shutter release is prohibited in the data imprinting use mode.

Select the data imprinting non-use mode and the data imprinting use mode by turning ON / OFF the cover switch CSW of the data card 32, and prohibit the output of the data imprinting signal SY in the data imprinting non-use mode, ,
In this case, the prohibition of shutter release is released.

Next, each of the above-mentioned operations will be described in detail with reference to the timing chart of FIG.

Regarding the operation of and, if the CPU 42 has a shutter release,
A signal TRI (H level) is output from the terminal TRIG based on a signal applied from (not shown) (FIG. 8 (R)).
This signal TRI is an AND circuit 102 and a flip-flop 104.
To terminal C of. On the other hand, a signal from the cover switch CSW is added to the terminal D of the flip-flop 104. The cover switch CSW is turned on when the cover 62 of the data card insertion opening is opened, and outputs an H level signal to the terminal D of the flip-flop 104, and the cover 62
Is off when is closed, the terminal D of the flip-flop 104
Then, an L level signal is output to (FIG. 8 (Q)).

The flip-flop 104 outputs a signal CV having the same level as the input signal of the terminal D from the output terminal Q to the AND circuit 102 and the NAND circuit 106 when the input signal of the terminal C is at the L level, and the input signal of the terminal C is H. In the case of the level, the input signal of the terminal D is latched at the rising edge of the signal, and the latch is released at the falling edge.

Therefore, when the cover 62 is opened and the cover switch CSW is ON, the flip-flop 104 is output when the signal TR1 is output.
The signal CV of H level is output from the terminal Q of the signal C, and the signal CV of H level is held at least during the output period of the signal TR1 (FIG. 8 (S)). As a result, the AND condition of the AND circuit 102 is satisfied, and the data imprinting signal SY (H level) is output from the AND circuit 102 during the output period of the signal TR1 (FIG. 8 (T)), and the photocoupler PC1 emits light. The diode emits light and the phototransistor turns on. It should be noted that when the phototransistor is turned on, a light emission trigger for causing the strobe discharge tube Xe to emit light is generated in the strobe unit 200, the details of which will be described later.

On the other hand, when the cover 62 is closed and the cover switch CSW is OFF, the flip-flop 104 is output when the signal TR1 is output.
An L-level signal SV is output from the terminal Q of the. As a result, the AND condition of the AND circuit 102 is not satisfied, the output of the data copy signal Y from the AND circuit 102 is blocked, and the phototransistor of the photocoupler PC1 remains OFF.

The L level signal SV output from the terminal Q of the flip-flop 104 is applied to the NAND circuit 106. As a result, the NAND circuit 106 outputs the H level signal irrespective of other input signals (signals indicating whether or not data copy preparation is OK). The output line of the NAND circuit 106 is connected to the pull lid switch 108. The pull lid switch 108 is turned on when the pull lid (film light-shielding plate) is attached to the long holder 20, and is OF when pulled out from the long holder 20.
It is a switch to F.

Therefore, when an H level signal is output from the NAND circuit 106 while the pulling lid switch 108 is OFF, the signal is input to the terminal of the CPU 42. When the CPU 42 inputs an H level signal to the terminal, it sends a signal that prohibits the next shooting (shutter release) to the CPU on the camera body side.
Output to.

That is, when the pulling lid is pulled out from the long holder and the cover 62 of the data card insertion slot is closed,
The next shutter release is always possible regardless of whether or not the data transfer preparation is OK. On the other hand, when the pulling lid is attached to the long holder and the pulling lid switch 108 is ON, the L level signal is input to the terminal of the CPU 42 regardless of the output signal of the NAND circuit 106, and the next shutter release is prohibited. To be done. In the following description, the state where the pulling lid is pulled out from the long holder and the pulling lid switch 108 is OFF will be described.

About the operation of When the start signal (L level signal) for charging the main capacitor C _M is output, when the power of the camera body side is turned on, at the time of resetting after the flash fires, and for a fixed time (10 (For minutes) There may be no shutter release.

First, when the power source of the camera body is turned on (Fig. 8 (A)), the one-shot circuit 110 outputs a pulse signal A1 having a predetermined pulse width (Fig. 8 (B)).
Is inverted by the inverter 112 and added as a signal to the AND circuit 114 (FIG. 8 (C)),
It is applied to the reset terminal R of the flip-flop 116 to reset the flip-flop 116.

The other input of the AND circuit 114 is connected to the output signal A2 of the timer 118.
And an output signal A3 of the circuit 120 which delays the input signal and outputs the inverted signal.

The timer 118 starts charging again when the shutter release is not performed for 10 minutes after the preparation for data imprinting is completed. When the reset signal is input to the reset terminal R, the H level signal A is output for 10 minutes thereafter. . When the power is turned on, it is reset and immediately outputs the H-level signal A2 (FIG. 8 (D)).

Further, the circuit 120 inputs a reset signal RE (H level signal) output after strobe light emission or the like, delays this, and inverts and outputs it. Normally, the light emitting diode of the photocoupler PC5 does not emit light and the phototransistor is off, so the reset signal RE is not output, so the power is turned on.
At times, an H-level signal A3 is output (Fig. 8 (E)).

The AND circuit 114 takes the AND conditions of the above three input signals, A2 and A3, but since the signals A2 and A3 are at the H level, the signal becomes the H level and outputs the H level signal B1 ( FIG. 8 (F)). This signal B1 is applied to the NAND circuit 122 and the delay circuit 124.

The delay circuit 124 outputs a predetermined pulse when the power is turned on as shown in FIG.
The output signal B1D of 4 is delayed to output a signal B1D. This signal
B1D is added to the AND circuit 126.

The output signal of the inverter 128 is added to the other input of the AND circuit 126. The same signal as that of the circuit 120 (a signal that becomes L level when not reset) is applied to the input of the inverter 128. Then, the AND circuit 126 takes the AND condition of the two input signals and outputs it to the reset terminal R of the timer 118, and the timer 118 is reset when an L level signal is applied to the reset terminal 118. Therefore, when the delay circuit 124 outputs the L-level signal B1D after the power is turned on, the timer 118 is reset again.

On the other hand, the other input of the NAND circuit 122 has a main capacitor C
A signal B2 is added to indicate whether _M is charging. still,
When the power is turned on, charging has not started,
The light emitting diode of the photocoupler PC4 does not emit light, the phototransistor is turned off, and the signal B2 is at H level (FIG. 8 (G)).

Therefore, the NAND circuit 122 for inputting the signals B1 and B2 is input.
As shown in FIGS. 8F to 8H, since the signal B1 is at the L level when the power is turned on, the signal C at the H level is immediately output. This signal C is inverted by the inverter 123 and output as a charging start signal (L level signal) (FIG. 8 (I)). That is, the light emitting diode of the photocoupler PC2 emits light and the phototransistor turns on,
Charging with the flash unit 200 starts.

When the strobe unit 200 starts charging, the light emitting diode of the photocoupler PC4 emits light during this period, the phototransistor turns on, and the charge signal (L level signal) is output. That is, the signal B becomes L level.
Therefore, after the signal B1 goes to the H level, the NAND circuit 122 continues charging until the signal B goes to the H level.
The signal C of H level is output, and the start signal is output through the inverter 124 during that time.

In this way, when the start signal is output and charging is completed, both the signals B1 and B2 are at H level and the signal C is at L level.

Next, a case where the shutter release is not performed for 10 minutes in the state where the charging is completed will be described.

In this case, the output signal A2 of the timer 118 becomes L level,
The output signal B1 of the AND circuit 114 also becomes L level at the same time (FIGS. 8D and 8F). This allows the NAND circuit 12
The output signal C of 2 becomes H level, and the start signal is output again (FIG. 8 (H), (I)).

On the other hand, when the signal B1 becomes L level, the delay circuit 124 outputs an L level signal B1D after a predetermined time has elapsed (eighth embodiment).
(Figure (J)). As a result, the timer 118 is reset and outputs the signal A2 of H level again, and the output signal B1 of the AND circuit 122 also becomes H level (FIGS. 8D and 8F).

Further, the start signal is also output at the time of resetting after the flash light is emitted.

That is, at the time of reset, the light emitting diode of the photocoupler PC5 emits light to turn on the phototransistor, and as a result, the reset signal RE (H level signal) is output. The reset signal RE is delayed by the circuit 120 for a predetermined time and then inverted. Therefore, the output signal A3 of the circuit 120 becomes L level, and the start signal is output in the same manner as described above. Further, the reset signal RE is inverted by the inverter 128 and applied to the AND circuit 126, so that the timer 118 is reset.

Operation Regarding the control to display a warning when the battery of the flash battery 202 is exhausted and to prohibit the next shutter release,
Execute every time the battery check is performed. By the way, since the battery check is performed under an actual load during charging as described later, control based on whether the battery is exhausted is performed every time the charging start signal is output, that is,
This is performed every time the NAND circuit 122 outputs the signal C of H level.

Now, when the power is turned on, the signal C of H level is output from the NAND circuit 122.
Is output (FIG. 8 (H)), this signal C is applied to the AND circuit 130 and the differentiating circuit 132. The differentiating circuit 132 takes the rising differential of the input signal C and applies a pulse signal BCR (FIG. 8 (L)) having a predetermined pulse width to the reset terminal R of the flip-flop 134 and the circuit 136.

As a result, the flip-flop 134 is reset and outputs the L level signal from the output terminal Q. Also, the circuit 136
Delays the input signal and outputs the inverted signal. The signal E (the eighth signal) is input to the input of the pulse signal BCR (FIG. 8 (L)).
(M)) is output to the AND signal 130.

On the other hand, a signal indicating whether the battery level is normal as a result of the battery check of the strobe battery 202 is added to the AND circuit 130. This signal indicates that the battery level is normal during charging as described below.
Since the light emitting diode of the photocoupler PC3 emits light to turn on the phototransistor, it is at L level, and when the battery is exhausted or the like, the phototransistor does not turn on and is always at H level. Therefore, when the power is turned on and charging is started, and the battery level at that time is normal, the signal becomes as shown in FIG. 8 (K). As shown in the figure, this signal has a slight time delay compared to the start signal.

When the battery level is normal, the AND circuit 130 which inputs the signal C, the signal E and the signal outputs the signal F shown in FIG. 8 (N) to the terminal C of the flip-flop 134. It should be noted that the signal F is a signal that becomes H level for a moment when the power is turned on, and then becomes L level. However, since the pulse width of the reset signal BCR is longer than the H level time of the signal F, the flip-flop 134 is set. However, the L-level signal Q1 is continuously output from the output terminal Q (FIG. 8 (O)).

On the other hand, in the event of an abnormality such as when the battery is exhausted, the signal is always at the H level as shown by the broken line in FIG. 8 (K), so the AND condition of the AND circuit 130 is satisfied again when the signal E rises, and The signal F becomes H level as shown by the broken line in FIG. At the rise of the signal F, the reset of the flip-flop 134 is completed, so the flip-flop 134 is set and the terminal Q outputs the signal Q1 of H level as shown by the broken line in FIG. 8 (O). It

When the output signal Q1 of the flip-flop 134 becomes H level, an H level signal is applied to the NAND circuit 106 via the OR circuit 136. Also, to the other input of the NAND circuit 106,
As described above, the H level signal is constantly applied when the cover 62 of the data card insertion slot is opened.

Therefore, the NAND circuit 106 outputs the L level signal to the terminal of the CPU 42, which prohibits the next shutter release.

Further, when the output signal Q1 of the flip-flop 134 becomes H level, the AND circuit 138 becomes operable, and the pulse signal output from the oscillator 140 is applied to the yellow light emitting diode LED1 via the AND circuit 138 (first Fig. 8 (P) As a result, the light emitting diode LED1 blinks, and a warning display such as battery exhaustion of the strobe battery 202 is displayed.

Regarding the operation of the light emitting diode of the photocoupler PC6, when the data imprinting signal SY is output (FIG. 8 (T)) and the strobe light is emitted, the light is emitted and the phototransistor is turned on. As a result, the signal applied to the AND circuit 142 becomes L level (FIG. 8 (U)). The data copy signal SY is added to the other input of the AND circuit 142. Therefore, the AND circuit 142 outputs the data imprinting signal SY,
The H level signal G is output to the integrating circuit 144 for a very short time until the signal rises after strobe light emission (eighth embodiment).
(FIG. (V)).

The integrating circuit 144 integrates the input signal and flip-flops 116
Is output to the terminal C of the flip-flop 116 when the H level of the signal G is short as described above.
Flip-flop is not reached until the level is set
116 is not set. That is, the flip-flop 116 retains its state after being reset when the power is turned on.

On the other hand, if the strobe is not emitted during the output of the data imprinting signal SY, the signal is held at the H level as shown by the broken line in FIG. It is held at the H level as shown by the broken line in FIG. As a result, the integrating circuit 14 that integrates the signal G
The integrated value of 4 reaches the H level, the flip-flop 116 is set, and the H level signal is output from the output terminal Q. This signal is applied to the NAND circuit 106 via the OR circuits 146 and 136, and is applied to the AND circuit 148 via the OR circuit 146.

Therefore, the shutter release for the next time is prohibited as in the case of the battery exhaustion described above. Also, AND circuit 14
Since the pulse signal is applied from the oscillator 140 to the other input of 8, the AND circuit 148 applies this pulse signal to the red light emitting diode LED2 to blink the light emitting diode LED2.

Further, the light emitting diode of the photocoupler PC7 emits light when the strobe unit 200 has a charging abnormality, and turns on the phototransistor. As a result, the signal indicating the charging abnormality (L level signal) is inverted by the inverter 150, and the inverter 150 outputs the H level signal. Therefore, as in the case of the abnormal strobe light emission, the H level signal is applied to the NAND circuit 106 via the OR circuits 146 and 136, and is also applied to the AND circuit 148 via the OR circuit 146 to inhibit the shutter release and to emit light. A warning is displayed by flashing the diode LED2.

[Strobe part]

Next, details of the flash unit 200 shown in FIG. 1 will be described.

FIG. 9 is a block diagram showing an embodiment of the flash unit 200, and FIG. 10 is a circuit diagram showing its details.

As shown in FIG. 9, the flash unit 200 mainly includes a battery check unit 210, a charging unit 220, a light emission trigger unit 230, a discharge unit 240, a light emission stop control unit 250, an emergency stop unit 260, and a reset unit 270. There is. Power is supplied to each of these parts from a strobe battery 202 that is different from the power supply on the camera body side. The flash control unit 10
0 means that signals are exchanged via the seven photocouplers PC1 to PC7.

The battery check unit 210 checks the output level of the battery 202 under the actual load during charging of the main capacitor C _M , and becomes operable when the start signal is output from the strobe control unit 100 as described above. When the battery level is normal, a signal (L level) is output.

That is, in FIG. 10, when the photodiode of the photocoupler PC2 is turned on by the start signal from the strobe control unit 100, the transistor Q1 is turned on, which turns on the transistor Q2 and causes the battery check unit 210 to output the battery 2
02 power will be supplied.

To the positive input of the comparator COMP1, the voltage on the anode side of the light emitting diode LED3, that is, the reference voltage for judging whether or not the battery is exhausted, is applied, and the negative input is supplied via the transistor Q2. A predetermined voltage division value is added by the resistors R1 and R2 of the power source and the variable resistor VR1. Therefore, the comparator COM1 outputs an L level signal when the battery is not exhausted and the divided voltage value of the negative input is larger than the reference voltage of the positive input, and as a result, the light emitting diode of the photocoupler PC3 emits light. Then, the phototransistor turns on and outputs a signal (L level signal) to the flash control unit 100. On the other hand, the comparator COMP1 is set to H when the divided voltage value of the negative input is smaller than the reference voltage of the positive input due to battery consumption.
The level signal is output, and as a result, the light emitting diode of the photocoupler PC3 does not emit light and the signal T (L level signal) is output.
Is not output.

Next, the charging unit 220 will be described. There is a method of using a blocking oscillation circuit by a positive feedback connection of a transformer for a booster circuit composed of one transistor, which includes a forward converter and a flyback converter. The forward converter has been generally used for strobes, but in the present invention, a booster circuit by a flyback converter is used. This is because the camera according to the present invention is for commercial use, and the durability shot number is 100
This is because the target is 10,000 times, and durability is required more than the conventional number of endurance shots of about 10,000 times. Also,
Since the output current does not flow in the flyback converter when the input current is flowing and the load state does not directly affect the input, the input power supply can be independently determined by the circuit constant, which is an excellent power supply for battery equipment. ing. However, a separate control means is required for applications such as strobes that require the input power supply to be reduced as much as possible after the charging of the capacitor is completed.

Now, in FIG. 9, the charging unit 220 becomes operable by inputting a signal (L level signal), charges the main capacitor C _M, and outputs the signal CHG indicating that charging is being performed during the charging period to the photocoupler. Output to the flash control unit 100 via PC4. Also, the main capacitor C _M
When the charging is completed, the charging is stopped and the signal CHG is not output, but the charging is stopped and the signal CHG is not output even when the signal is input from the emergency stop unit 260 described later.

That is, in FIG. 10, when the transistor Q1 is turned on by the start signal as described above, the battery check unit 210 becomes operable, and power is supplied to the gate of the transistor PUT1 of the charging unit 220 via the diode D1. As a result, the transistor PUT1 is turned on, the transistors Q3 and Q4 are turned on, and the flyback booster circuit 222 operates. That is, the transistor Q5 is turned on / off by the known blocking oscillation, and while the transistor Q5 is turned on, a current flows through the coil L1, and at the moment when the transistor Q5 is turned off and the current in the coil L1 is cut off, immediately before that. The magnetic energy stored in the surrounding space (core) due to the current flowing in the coil causes a repulsive electromotive force in the coil L2 due to the electromagnetic induction action, and the main capacitor passes through the diodes D3 and D4.
C _M and C _M are charged.

Also, the transistor Q4 turns on, which causes the diode
A current flows through the light emitting diode of the photocoupler PC4 via D2, the light emitting diode emits light, and the phototransistor
When turned on, a signal indicating that charging is being performed (L level signal) is applied to the flash control unit 100. In this way, the main capacitors C _M and C _M are charged.

On the other hand, when the voltage applied to the main capacitors C _M and C _M exceeds the predetermined voltage (for example, 300 V) set by the Zener diodes ZD1 and ZD2, the base voltage is applied to the base of the transistor Q6 via the Zener diodes ZD1, ZD2, and D5. A current flows and the transistor Q6 turns on. This turns on transistor Q7 and turns on transistor Q8 in booster circuit 222.
By switching to N, the switching transistor Q5 is turned off and the boosting by the boosting circuit 222 is stopped. Further, since the anode side of the transistor PUT1 is pulled to the ground via the diode D7, the transistor PUT1 is turned off, and as a result, the transistors Q3 and Q4 are turned off.

In this way, when the operation of the booster circuit 222 is stopped, the voltage level of the main capacitors C _M , C _M becomes 300 V, and current stops flowing through the Zener diodes ZD1, ZD2, D5, the transistor Q6 becomes It turns off, and then the transistor Q7F turns off. As a result, the light emitting diode of the photocoupler PC4 does not emit light via the diode D2, the phototransistor is turned off, and the signal is not output. The operation of the charging unit 220 is completed as described above. The time required for the charging is about 1 second.

Next, the light emission trigger unit 230, the discharge unit 240, and the light emission stop control unit
250 will be described. In FIG. 9, the light emission trigger unit 2
When the light emitting diode of the photocoupler PC1 turns on the light emitting phototransistor 30 by the data imprinting signal SY and the signal (L level signal) is input, 30 outputs the first light emission trigger signal TR2 to the discharge unit 240 at the time of input. Discharge unit 24
0 causes the strobe discharge tube Xe to discharge the electric charge charged in the main capacitor C _M by this light emission trigger signal TR2.

The light emission stop control unit 250 receives the signal EN from the light emission trigger unit 230 when the signal is input to the light emission trigger unit 230 and the discharge unit based on the discharge of the main capacitor C _M.
It becomes operable by the agreement added from 240.
When the phototransistor PT provided near the strobe discharge tube Xe detects that the strobe discharge tube Xe emits light in this operable state, the light emission trigger unit 23
A signal for prohibiting 0 from outputting the second light emission trigger signal is output to the light emission trigger unit 230, and also a signal (L level signal) is output to the strobe control unit 100 via the photocoupler PC6. Reset section 27 to notify that there was a charge and request the next charging start.
Output signal to 0. On the other hand, if the strobe light emission is not performed by the first light emission trigger signal TR2, the light emission stop control 250 does not output the above signals and
The light emission trigger unit 230 outputs the second light emission trigger signal TR2 after a predetermined time has elapsed.

The above operation will be described in detail with reference to FIG. In FIG. 10, when the light emitting diode of the photocoupler PC1 emits light by the data imprinting signal SY and the phototransistor is turned on, power is supplied to the base of the transistor Q9 and the transistor Q9 is turned on, whereby the light emission trigger unit 230 is powered. Supplied and operational.

Due to this power supply, the transistor Q10 is connected to the capacitor C1.
The light emission trigger signal TR2 is output via the capacitor C2 and the diode D7 when the output signal of the transistor Q10 rises during the charging period.

Further, the transistor Q11 is turned on during the charging period of the capacitor C3 by the power supply, and the charge of the capacitor C4 is forcibly discharged.

When the light emission trigger signal TR2 is output from the light emission trigger unit 230, the light emission trigger signal TR2 fires the thyristor SCR1 of the discharge unit 240, and the charge of the capacitor C5 is rapidly discharged. As a result, a high voltage is applied to the grid of the strobe discharge tube Xe via the transformer T1, and the main discharge of the electric charges of the main capacitors C _M and C _M is started by the starting discharge in the grid, and a momentary strong flash light is emitted. Is emitted.

On the other hand, the electric charges of the main capacitors C _M and C _M are discharged, and the electric charges of the capacitors C6 and C7 are discharged. As a result, a current flows to the base of the transistor Q12 of the light emission stop control unit 250 and the transistor Q12 is Turn on. This allows
Power is supplied to the light emission stop control unit 250 via the transistor Q12.

By this power supply, the transistor Q13 is turned on, a signal (L level signal) is applied to the reset unit 270, and the reset unit 270 outputs the signal RE requesting the next charging start. The details of the reset unit 270 will be described later.

Further, the phototransistor RT of the light emission stop control unit 250 is
It turns on by strobe emission and applies the power supply voltage to the negative input of the comparator COMP2. The transistor Q14 turns on during the charging period of the capacitor C8 after power is supplied, and the capacitor C9
To forcibly discharge the electric charge of the phototransistor
The power supply voltage from PT turns off the transistor Q14
After C9 is charged, it will be added to the negative input of the comparator COMP2.

The positive input of the comparator COMP2 is added to the divided voltage value by the resistors R3 and R4. The resistors R3 and R4 have a light emission trigger unit 230
The predetermined voltage (for example, 4V) set by the Zener diode ZD3 of is applied.

Therefore, when the phototransistor PT is turned on, the comparator COMP2 outputs the L level signal as a result of the voltage value of the negative input becoming higher than the voltage value of the positive input. As a result, the transistor Q15 turns on and the thyristor SCR2 fires.

When the thyristor SCR2 is ignited, the light emitting diode of the photocoupler PC6 emits light, the phototransistor is turned on, and the strobe control unit 100 outputs a signal (L level signal) indicating that strobe light is emitted. Also a diode
The charge of the capacitor C1 of the light emission trigger unit 230 is discharged via D8, the ON state of the transistor Q10 is held, and the output of the second light emission trigger signal TR2 described later is prohibited.

Next, a case where strobe light emission is not performed by the first light emission trigger signal TR2 output from the light emission trigger unit 230 will be described.

The thyristor SCR3 is not yet ignited in the state where the capacitor C1 is charged and the transistor Q10 is turned off after the first light emission trigger signal TR2 is output. On the other hand, the charge of the capacitor C4 is forcibly discharged by the transistor Q11 which is turned on during the charging period of the capacitor C3, and after the transistor Q11 is turned off, the capacitor C4 is charged via the resistors R5, R6 and the variable resistor VR2.

When the capacitor C4 is charged by a predetermined amount, the thyristor SCR3 is ignited, the transistor Q10 is turned on again, and the capacitor C4 is turned on when the output signal of the transistor Q10 rises.
2nd emission trigger signal TR2 via diode D7
Is output.

The time until the thyristor SCR3 is ignited after the transistor Q11 is turned off depends on the CR time constants of the resistors R5 and R6, the variable resistor VR2 and the capacitor C4. That is, the time from the output of the first light emission trigger signal to the output of the second light emission trigger signal can be adjusted by appropriately setting the CR time constant.

When the strobe discharge tube Xe emits light in response to the second light emission trigger signal, the light emission stop control unit 250 operates in the same manner as above.

Further, if the strobe discharge tube Xe does not emit light even by the second light emission trigger signal, then the light emission trigger unit 230
Does not output a light emission trigger signal. This is because if the strobe discharge tube Xe does not emit light due to the light emission trigger signal, the light emission trigger signal is output again, and if it still does not emit light, it is considered that there is another cause. still,
Even if the strobe discharge tube Xe does not emit light due to the first firing trigger signal, the condition between the electrodes of the strobe discharge tube Xe changes, so the strobe discharge tube Xe will be activated by the second firing trigger signal after a predetermined time. There is a sufficient amount of light emission (main discharge), which can reduce light emission errors.

Next, the emergency stop unit 260 will be described. In FIG. 9, when the charging voltage becomes abnormally high for some reason during discharging of the main capacitor C _M , the discharging unit 240 outputs a signal E.
M is added to the emergency stop 260. Incidentally, the booster circuit 222 of the flyback type charging unit 220 for charging the main capacitor C _M by generating an electromotive force regardless of the state of the load, when there is a failure in the control means for controlling the charging, charging voltage May be abnormally high.

In response to the input of the signal EM, the emergency stop unit 360 outputs a signal (level signal) to the charging unit 220 to stop charging, and outputs a signal BY to the discharging unit 240, which discharges different from the strobe discharge tube Xe. The charge of the main capacitor C _M is forcibly discharged by the path, and a signal (level signal) is further output to notify the strobe control unit 100 via the photocoupler PC7 that there is a charging abnormality.

The above operation will be described in detail with reference to FIG. In the figure, the voltage applied to the main capacitors C _M and C _M is a predetermined voltage (300 V) set by the Zener diodes ZD1 and ZD2.
Above the zener diode as described above.
Base current flows to the base of the transistor Q6 through ZD1, ZD2 and diode D5, and the transistor Q6 is turned on.
The charging operation at 220 stops.

However, if the above charging operation does not stop due to some abnormality, the voltage applied to the main capacitors C _M and C _M is 30
It goes beyond 0V and rises further.

On the other hand, Zener diodes ZD4 and ZD5 have
It is set to 350V. Therefore, the main capacitor
When the voltage applied to C _M and C _M exceeds 350 V, the emergency stop unit 260 is connected via Zener diodes ZD4, ZD5 and diode D9.
A current flows into the base of the transistor Q15, and the transistor Q15 turns on.

As a result, the transistor Q16 turns on, the signal BY output via the diode D10 causes the thyristor SCR4 to fire, and the main capacitors C _M , C _M pass through the thyristor SCR4.
Is forcibly discharged.

When the transistor Q16 is turned on, the thyristor SCR5 is ignited, and the transistor Q17 is turned on. When the thyristor SCR5 is ignited, the light emitting diode of the photocoupler PC7 emits light to turn on the phototransistor, a signal indicating an abnormal charge (L level signal) is applied to the strobe control unit 40, and the transistor Q17 turns on. A signal (level signal) is applied to the charging section 220, and the charging operation in the charging section 220 is stopped in the same manner as when the transistor Q6 is turned on.

Finally, the reset unit 270 will be described. In FIG. 9, the reset unit 270 outputs a signal RE to the strobe control unit 100 via the photocoupler PC5 when a signal indicating that the main capacitor C _M has been discharged is added from the light emission stop control unit 250. Request the next charge start. Further, the battery switch BSW is a switch that turns off when the strobe battery 102 is attached and turns on when the strobe battery 102 is detached. The reset unit 270 turns on / off the battery switch BSW.
The signal RE is output even at times.

Next, the above operation will be described in detail with reference to FIG. First,
A case where the strobe battery 202 is mounted will be described.

Since the battery switch BSW is in the ON state before the battery is installed, the capacitors C10 to C13 of the reset unit 270 are in this state.
Is being forcibly discharged.

Here, the strobe battery 202 is attached to the long holder 20 by moving it in the direction of arrow A to abut the outer surface of the outer frame 60 as shown in FIG. 3, and then sliding it in the direction of arrow B. To be done. Then, when the battery 202 contacts the outer surface of the outer frame 60, the protruding pin 66 is pressed to turn off the battery switch BSW, and the power terminal is connected at the moving end in the arrow B direction.

Therefore, when the above battery is installed, the gate current (direction flowing out from the element) of the transistor PUT2 flows during charging of the capacitor C13, the transistor PUT2 turns on, and the photocoupler PC
The light emitting diode of 5 emits light and the phototransistor turns on.
Then, the signal RE (H level signal) is applied to the flash control unit 100. As a result, as described above, the strobe control unit
100 will output the start signal.

On the other hand, by outputting the start signal, the photo coupler
When the phototransistor of PC2 is turned on, the current is delayed for a predetermined time through line 1 and the delay circuit 272 and then flows to the base of the transistor Q18, which turns on. As a result, the anode side of the transistor PUT2 becomes the ground level via the line l2.
Turns off, and the phototransistor of photocoupler PC2 turns off.
To do.

That is, the reset unit 270 outputs the signal RE from when the transistor PUT2 is turned on until it is turned off.

Next, the electric charge of the main capacitor C _M is discharged, and a signal (L level signal) is output from the light emission stop control unit 250 to the reset unit 2.
The case of being added to 70 will be described.

In this case, the electric charge of the capacitor C13 is discharged, and the gate current again flows through the transistor PUT2.
T2 turns on. Then, the transistor PUT2 is turned off after the elapse of a certain time in the same manner as described above.

Next, the case where the strobe battery 202 is detached from the long holder 20 will be described.

In this case, first, the power supply terminal of the battery 202 is detached so that power is not supplied to the flash unit 200, and then the battery switch BSW is turned on. This allows capacitors C10, C1
The electric charge charged to 1 flows into the capacitor C12 through the gate of the transistor PUT2 and the transistor PUT2
N and the signal RE is output.

By the way, the reason why the signal RE requesting the next charging start is output when the strobe battery 202 is detached is as follows.

That is, when the strobe battery 202 is attached, the main capacitor C _M is completely charged and the data transfer preparation is OK, no warning is displayed and shutter release is not prohibited. Therefore, in this state, if the signal RE is not output from the reset unit 270 when the strobe battery 202 is removed, the strobe battery 202 and the strobe control unit 100 are power sources different from each other. There is a problem in that a warning display such as consumption and shutter release are not prohibited, and a display different from the actual situation is displayed.

Therefore, when the flash battery 202 is removed, the reset unit 270 outputs the signal RE.

When the signal RE is output from the reset unit 270, the strobe control unit 100 outputs a charging start signal and a battery check is performed as described with reference to FIG.
The second abnormality (not mounted) can be detected, whereby the light emitting diode LED1 indicating the battery abnormality is blinked, and the L level signal is output to the terminal of the CPU 42 to inhibit the shutter release.

〔The invention's effect〕

As described above, according to the data imprinting apparatus for a camera of the present invention, if the strobe discharge tube does not emit light by the first light emission trigger, the second light emission trigger is output after a certain period of time has elapsed. As a result, the strobe discharge tube can be made to emit light with a higher probability, and data imprinting can be performed reliably.

[Brief description of drawings]

FIG. 1 is a conceptual view showing a control unit of a data imprinting apparatus for a camera according to the present invention, FIG. 2 is an internal perspective view of the camera body with the film holder mounted on the rear portion thereof, and FIG. FIG. 4 is an exploded perspective view of a main part of the holder, FIG. 4 is an exploded perspective view of members forming an optical path for copying of the data copying apparatus, and FIG.
FIG. 7 is a perspective view of a frame body disposed inside the outer frame of FIG. 3, FIG. 6 is a perspective view of a removable middle frame in the frame body of FIG. 5, and FIG.
FIG. 8 is a circuit diagram showing an embodiment of the strobe control unit in FIG. 1, and FIGS. 8A to 8V are timing charts used to explain the operation of the strobe control unit shown in FIG. FIG. 9 is a block diagram showing an embodiment of the strobe section shown in FIG. 1, and FIG. 10 is a circuit diagram showing details of the block diagram shown in FIG. 20 ... Film holder (long holder), 100 ... Strobe control section, 20 ... Strobe section, 230 ... Emission trigger section, 240 ... Discharge section, 250 ... Emission stop control section.

Claims (1)

[Claims] 1. A data card is inserted into a predetermined position of a film holder in which a film is loaded, and the data card is irradiated with a strobe discharge tube for data imprinting, and the reflected light or transmitted light thereof is converted into a data imprinting optical system. In the data imprinting device of the camera that imprints the data entered on the data card onto the film by guiding the data to the film through the strobe discharge tube when the data imprinting signal output corresponding to the shutter release is input. A means for outputting a first light emission trigger for emitting light, a light emission confirmation means for confirming whether or not the strobe discharge tube emits light, and a confirmation that the strobe discharge tube does not emit light by the first light emission trigger. And a means for outputting a second light emission trigger after a lapse of a fixed time after the output of the first light emission trigger. A data imprinting device for a camera having a film holder.