JPH0789573B2 - Semiconductor element container - Google Patents
Semiconductor element containerInfo
- Publication number
- JPH0789573B2 JPH0789573B2 JP61138817A JP13881786A JPH0789573B2 JP H0789573 B2 JPH0789573 B2 JP H0789573B2 JP 61138817 A JP61138817 A JP 61138817A JP 13881786 A JP13881786 A JP 13881786A JP H0789573 B2 JPH0789573 B2 JP H0789573B2
- Authority
- JP
- Japan
- Prior art keywords
- container
- metallized layer
- layer
- sealing
- metallization layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Microwave Amplifiers (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体素子容器に係り、特に高周波帯で使用さ
れるマイクロ波半導体素子用容器に関する。TECHNICAL FIELD The present invention relates to a semiconductor device container, and more particularly to a container for microwave semiconductor devices used in a high frequency band.
高周波トランジスタの容器は、高周波化が進むにつれ、
容器を構成する基体は、より小形化が進むが、同時に気
密性あるいは組立作業性についての問題が生じる。特に
気密性を重視した容器としては、例えば第2図に示す如
く、絶縁性容器基体101上に固着された絶縁性壁部材4
を設けた構造をとり、この壁部材4の上面には封止用メ
タライズ層5を設け、さらにキャップ111の周辺部に封
止用メタライズ層7を設けて、上下のメタライズ層5,7
が、封止用金属6例えば金スズをはさんで、密着封止す
る(第1の従来例)。また、作業性を重視した容器とし
ては、第3図に示す如く、容器基体101上のキャップ封
止面に印刷セラミック205を設け、キャップ211の封止面
上に設けられたガラス材207とによって、封止する第2
の従来例がある。As the frequency of the high-frequency transistor container increases,
Although the substrate forming the container is further miniaturized, at the same time, problems with airtightness and assembling workability arise. As a container in which airtightness is particularly emphasized, for example, as shown in FIG. 2, an insulating wall member 4 fixed on an insulating container base 101.
The metallization layer 5 for sealing is provided on the upper surface of the wall member 4, and the metallization layer 7 for sealing is further provided on the peripheral portion of the cap 111 to form the metallization layers 5, 7 above and below.
However, a sealing metal 6 such as gold tin is sandwiched between them for close sealing (first conventional example). Further, as a container in which workability is emphasized, as shown in FIG. 3, a printed ceramic 205 is provided on the cap sealing surface of the container base 101, and a glass material 207 is provided on the sealing surface of the cap 211. , Sealing second
There is a conventional example of.
第2図に示す従来例は、絶縁性壁部材4を設けること
で、例えば金スズのような封止用金属6が使用でき、気
密性に優れた容器を実現できるが、組立工程中において
ペレット供給時のアームあるいはコレットが、又ワイヤ
ボンディング時のウエッジあるいはキャピラリーが、こ
の壁部材4に接触するため、組立工程の作業性を非常に
悪くし、自動化への大きな障害となっている。In the conventional example shown in FIG. 2, by providing the insulating wall member 4, a sealing metal 6 such as gold tin can be used, and a container having excellent airtightness can be realized. The arm or collet at the time of supply and the wedge or capillary at the time of wire bonding come into contact with the wall member 4, so that the workability of the assembly process is extremely deteriorated, which is a major obstacle to automation.
第3図に示す従来例は、第2図に示すような壁部材4は
なく、組立時の自動化への障害はないが、封止材料にガ
ラス材207等の絶縁物しか使用できない。このため、金
スズのような金属を用いるものに比べ、気密性の点で劣
ったものしかできず、信頼度の高い製品を製造できな
い。このように、従来の構造をもつ容器は、気密性と組
立作業性とのうちどちらかを犠牲にしたものであった。In the conventional example shown in FIG. 3, there is no wall member 4 as shown in FIG. 2 and there is no obstacle to automation at the time of assembly, but only an insulating material such as a glass material 207 can be used as a sealing material. For this reason, compared to the one using a metal such as gold and tin, only the airtightness is inferior, and a highly reliable product cannot be manufactured. As described above, the container having the conventional structure sacrifices one of airtightness and assembling workability.
本発明の目的は、前記問題点を解決し、気密性と組立作
業性とを両立させることができるようにした半導体素子
容器を提供することにある。It is an object of the present invention to provide a semiconductor element container which solves the above-mentioned problems and can achieve both airtightness and assembly workability.
本発明の半導体素子容器の構成は、絶縁性容器基体の上
主表面のうち略中央部を高い位置に、前記略中央部の周
囲部を低い位置になるように2段の形状にし、前記高い
位置に、半導体素子を固着させるメタライズ層及び入出
力電極導出のメタライズ層を形成し、前記高い位置と前
記低い位置との間の前記基体の側表面に前記入出力電極
導出のメタライズ層に続くメタライズ層を形成し、前記
低い位置に前記側表面上のメタライズ層に続くメタライ
ズ層を形成し、前記低い位置に前記側表面上のメタライ
ズ層に離間して絶縁性壁部材を設け、前記高い位置と前
記部材の上主表面とが略同一の高さとなるように前記部
材を形成し、前記部材の上主表面のメタライズ層とキャ
ップのメタライズ層とが金属で封止されることを特徴と
する。The structure of the semiconductor element container of the present invention has a two-step shape in which the substantially central portion of the upper main surface of the insulating container substrate is at a high position and the peripheral portion of the substantially central portion is at a lower position, A metallization layer for fixing the semiconductor element and a metallization layer for leading out the input / output electrode are formed at a position, and the metallization layer for leading out the input / output electrode is provided on the side surface of the base between the high position and the low position. A layer is formed, a metallization layer following the metallization layer on the side surface is formed at the low position, an insulating wall member is provided at a distance from the metallization layer on the side surface at the low position, The member is formed such that the upper main surface of the member has substantially the same height, and the metallized layer on the upper main surface of the member and the metallized layer of the cap are sealed with metal.
次に図面を参照しながら本発明を詳細に説明する。 The present invention will now be described in detail with reference to the drawings.
第1図は本発明の一実施例の半導体素子容器を示す断面
図である。同図に示すように、本半導体素子容器は、凸
形絶縁性容器基体1の上主表面と絶縁性壁部材4の上主
表面が、ほぼ同じ高さになるように形成する。凸形絶縁
性容器基体1上に設けられたメタライズ層2には、トラ
ンジスタペレット10が固着される。また、このメタライ
ズ層2は、少くとも接地側リード15に電気的に接続され
ている。入力側リード3は、入力側電極導出用メタライ
ズ層8と電気的に接続されている。絶縁性壁部材4の上
面に設けられた封止用メタライズ層5は、キャップ11に
設けられた封止用メタライズ層7と共に、封止用金属6
によって、容器とキャップ11とを気密封止する。入力側
電極配線用のワイヤ9,出力側電極配線用のワイヤ12,出
力側リード14に電気的に接続されている出力側電極導出
用メタライズ層13等が設けられる。FIG. 1 is a sectional view showing a semiconductor device container according to an embodiment of the present invention. As shown in the figure, the present semiconductor element container is formed such that the upper main surface of the convex insulating container base 1 and the upper main surface of the insulating wall member 4 have substantially the same height. A transistor pellet 10 is fixed to the metallized layer 2 provided on the convex insulating container substrate 1. The metallized layer 2 is electrically connected to at least the ground side lead 15. The input side lead 3 is electrically connected to the input side electrode leading metallization layer 8. The metallizing layer 5 for sealing provided on the upper surface of the insulating wall member 4 is a metal 6 for sealing together with the metallizing layer 7 for sealing provided on the cap 11.
To hermetically seal the container and the cap 11. A wire 9 for input side electrode wiring, a wire 12 for output side electrode wiring, an output side electrode leading metallization layer 13 electrically connected to the output side lead 14, and the like are provided.
第1図に示したように、基体1の上主表面のうち高い位
置に形成されたメタライズ層8,13は、高い位置と低い位
置との間の側表面のメタライズ層とそれぞれ電気的に接
続され、さらに低い位置の上主表面のメタライズ層とそ
れぞれ電気的に接続されている。また、部材4と側表面
上のメタライズ層とは離間している。As shown in FIG. 1, the metallization layers 8 and 13 formed at high positions on the upper main surface of the substrate 1 are electrically connected to the metallization layers on the side surfaces between the high positions and the low positions, respectively. And is electrically connected to the metallization layer on the upper main surface at a lower position. Further, the member 4 and the metallized layer on the side surface are separated from each other.
以上説明したように、本発明によれば、トランジスタペ
レット・マウント面である容器基体上面と封止面である
壁部材上面とが、ほぼ同一の高さに形成できるため、組
立の作業性がよく、金属封止ができるため、気密性にも
すぐれた高信頼度で量産性のある容器が実現できる等の
効果が得られる。さらに、本発明によれば、側表面のメ
タライズ層が、絶縁性壁部材と離間しているため、この
部材上の封止用金属と封止時に短絡事故を発生する心配
がなく、また特にマイクロ波半導体素子に適した、低損
失の容器が得られるという効果がある。As described above, according to the present invention, since the upper surface of the container base that is the transistor pellet mounting surface and the upper surface of the wall member that is the sealing surface can be formed at substantially the same height, the workability of assembly is improved. Since metal sealing can be performed, it is possible to obtain a highly reliable mass-producible container having excellent airtightness. Further, according to the present invention, since the metallized layer on the side surface is separated from the insulating wall member, there is no concern that a short circuit accident will occur at the time of sealing with the sealing metal on this member, and particularly the micro wall There is an effect that a low loss container suitable for a wave semiconductor device can be obtained.
尚前記実施例の説明は、FET型トランジスタを想定して
いるが、バイポーラ型トランジスタの場合につても同様
である。The description of the above embodiment assumes a FET type transistor, but the same applies to the case of a bipolar type transistor.
第1図は本発明の実施例の半導体素子容器を示す断面
図、第2図は第1の従来例のマイクロ波半導体素子用容
器を示す断面図、第3図は第2の従来例のマイクロ波半
導体素子用容器を示す断面図である。 1……凸形絶縁性容器基体、2……ペレット固着用メタ
ライズ層、3……入力側リード、4……絶縁性壁部材、
5……容器側封止用メタライズ層、6……封止用金属、
7……キャップ側封止用メタライズ層、8……入力側電
極導出用メタライズ層、9……入力側電極配線用ワイ
ヤ、10……トランジスタペレット、11……キャップ、12
……出力側電極配線用ワイヤ、13……出力側電極導出用
メタライズ層、14……出力側リード、15……接地側リー
ド、101……絶縁性容器基体、111,211……キャップ、20
5……印刷セラミック、207……封止用ガラス材。FIG. 1 is a sectional view showing a semiconductor device container according to an embodiment of the present invention, FIG. 2 is a sectional view showing a microwave semiconductor device container according to a first conventional example, and FIG. 3 is a second conventional example. It is sectional drawing which shows the container for wave semiconductor elements. DESCRIPTION OF SYMBOLS 1 ... Convex insulating container substrate, 2 ... Pellet fixing metallization layer, 3 ... Input side lead, 4 ... Insulating wall member,
5: metallizing layer for sealing the container side, 6: sealing metal,
7 ... Cap side sealing metallization layer, 8 ... Input side electrode lead-out metallization layer, 9 ... Input side electrode wiring wire, 10 ... Transistor pellet, 11 ... Cap, 12
...... Output side electrode wiring wire, 13 …… Output side electrode lead-out metallized layer, 14 …… Output side lead, 15 …… Ground side lead, 101 …… Insulating container base, 111, 211 …… Cap, 20
5 …… Printed ceramic, 207 …… Encapsulating glass material.
Claims (1)
を高い位置に、前記略中央部の周囲部を低い位置になる
ように2段の形状にし、前記高い位置に、半導体素子を
固着させるメタライズ層及び入出力電極導出のメタライ
ズ層を形成し、前記高い位置と前記低い位置との間の前
記基体の側表面に前記入出力電極導出のメタライズ層に
続くメタライズ層を形成し、前記低い位置に前記側表面
上のメタライズ層に続くメタライズ層を形成し、前記低
い位置に前記側表面上のメタライズ層に離間して絶縁性
壁部材を設け、前記高い位置と前記部材の上主表面とが
略同一の高さとなるように前記部材を形成し、前記部材
の上主表面のメタライズ層とキャップのメタライズ層と
が金属で封止されることを特徴とする半導体素子容器。1. A semiconductor device having an upper main surface of an insulative container base having a two-tiered shape so that a substantially central portion is located at a high position and a peripheral portion of the substantially central portion is located at a lower position, and the semiconductor element is located at the higher position. To form a metallized layer for adhering to and a metallized layer for leading out the input / output electrodes, and forming a metallized layer following the metallized layer for leading out the input / output electrodes on the side surface of the base between the high position and the low position, A metallization layer following the metallization layer on the side surface is formed at the low position, and an insulating wall member is provided at the low position so as to be spaced apart from the metallization layer on the side surface. A semiconductor element container, wherein the member is formed so that the surface thereof has substantially the same height, and the metallized layer on the upper main surface of the member and the metallized layer of the cap are sealed with metal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61138817A JPH0789573B2 (en) | 1986-06-13 | 1986-06-13 | Semiconductor element container |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61138817A JPH0789573B2 (en) | 1986-06-13 | 1986-06-13 | Semiconductor element container |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62293742A JPS62293742A (en) | 1987-12-21 |
| JPH0789573B2 true JPH0789573B2 (en) | 1995-09-27 |
Family
ID=15230928
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61138817A Expired - Lifetime JPH0789573B2 (en) | 1986-06-13 | 1986-06-13 | Semiconductor element container |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0789573B2 (en) |
-
1986
- 1986-06-13 JP JP61138817A patent/JPH0789573B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62293742A (en) | 1987-12-21 |
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