JPH0792768B2 - Microcomputer - Google Patents

Description

[Field of Industrial Application] The present invention relates to a microcomputer, and in particular, is provided with a detection circuit in advance so as to efficiently detect defects in manufacturing a one-chip microcomputer formed on a semiconductor substrate. Regarding microcomputers.

[Conventional technology]

Conventionally, the test method used to test the operation of the microcomputer is to execute the instruction operation that the microcomputer functions once and output the execution result to the microcomputer terminal to see if it is the expected result. I was making a decision. Also, in a microcomputer that also has a program memory that stores a series of instructions, whether the machine jam as expected is written in the program memory A method is also used in which it is output to an external terminal every time and compared with an expected value.

[Problems to be solved by the invention]

However, recent advances in semiconductor manufacturing technology have been remarkable, and VLSIs having hundreds of thousands of transistors on one semiconductor chip are being manufactured. Microcomputers manufactured using such VLSI technology have data processing and manufacturing functions comparable to those of large-scale general-purpose computers a long time ago, and are tested using the test method described above. If so, the types of instructions to be executed and the amount of data to be processed are very large, which makes the procedure for testing lengthy.

Further, from the viewpoint of detection of malfunction of the microcomputer, it is not enough to judge that the instruction operation is normally executed, and the operation that should not be performed at the time of executing a certain instruction is not performed. Without confirmation, the defect detection rate cannot be improved. For this reason, the test procedure becomes more complicated and the time required for developing the test pattern becomes enormous.

Another problem in testing the microcomputer is that the number of terminals of the microcomputer is limited and it is not sufficient to judge the logic state inside the microcomputer.

Conventionally, as a countermeasure against this problem, a method of performing time-division control of a large number of internal logic gate signals and outputting them to terminals, or controlling to compress a large number of logic gate signals into a small number of signals and outputting them to terminals has been adopted. However, these methods have a drawback that the internal hardware for testing increases.

The present invention has been made in view of these points, and an object of the present invention is to provide a microcomputer capable of judging the operation of a complicated control signal inside the microcomputer by a simple test procedure. Another object of the present invention is to provide a microcomputer which allows a large number of internal signals to be led to the terminals and tested without increasing the number of external terminals.

[Means for solving problems]

A microcomputer of the present invention includes a program memory in which a machine language of an instruction is stored, a program address pointer for sequentially designating addresses of the program memory, a micro program memory for holding an instruction execution control procedure and control signal information, A sequence pointer in which address information obtained based on an instruction read from the address of the program memory designated by the program address pointer is set, and the address of the microprogram memory is set with the address information as a head address. A microcomputer provided with a sequence pointer for designating the next address based on the content read out from the designated address, and outputs the output of the program address pointer based on a control signal to the output of the microprogram memory. Instead of the above Over means for introducing Ken scan pointer, and characterized in that it comprises further means for deriving an output from the address of the microprogram memory in which the sequence pointer on the basis of the introduced content specified in the microcomputer of the terminal.

〔Example〕

 Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a microcomputer according to the present invention, showing a signal flow between the functional blocks.

In FIG. 1, reference numeral 10 is a program memory in which the machine language of the instruction is stored, and is normally composed of a mask programmable read only memory. Reference numeral 11 is a program address pointer that points to a specific address of the program memory 10. Reference numeral 20 is a microprogram memory for storing a microprogram consisting of instruction execution control procedures and control signal information, and 21 is a sequence pointer for designating the flow of the microprogram. Reference numeral 30 denotes a control unit that receives signals output from the micro program memory 21 and generates various control signals. Reference numeral 50 is an address bus for transferring address data of various storage devices, and 51 is a data bus used for transferring processing data. In this embodiment, the address bus 50 is 16
The data width of the data bus 51 is 8 bits. Reference numeral 60 is an instruction register for inputting the machine language of the instruction output from the program memory via the data bus 51. 41 and 42 are address bus 50 and data bus 51
Is an input / output port for sending the contents of the above to the outside of the microcomputer or inputting external information to the internal bus 51.
In the present embodiment, 41 is an output port for performing only the operation of outputting the upper bits of the address bus 50, and 42 is an operation of transmitting / receiving the data bus and the external data signal and outputting the lower bits of the address bus 50. This configuration, which is an input / output port configured to perform the operation in a time division manner, is generally called a multiplexed bus port.

In addition to this, the microcomputer has a logical arithmetic operation unit and a register file unit for temporarily storing data, but they are not shown.

Next, the operation of this embodiment will be described with reference to FIG. 2 which shows the sequence pointer 21 and the micro program memory 20 in detail.

In FIG. 2, the same functional blocks as in FIG. 1 are assigned the same numbers as in FIG. In the normal operation of this embodiment, the program address pointer 11 accesses a specific instruction in the program memory 10 to read the machine language of the instruction.
Instruction execution control is performed according to this machine language.First, the signals C _{1 to} C ₈ output from the instruction register 60 as the start address information of the control sequence are input to the sequence pointer 21, and this data is decoded by the decoder 22. accessing a specific address of the microprogram memory 21 to obtain a control signal μPO ₁ ~μPO ₃₂ to various processing units to operate in the first sequence of instructions as the output. Of these control signals, μPO _{25 to} μPO ₃₂ are input to the sequence pointer 21 as the next step address signal for obtaining the control signal of the next sequence. The above procedure is repeated to execute the instruction. Now, in order to test this microcomputer, a signal is given from the outside of the microcomputer to activate the control signal TEST (high level active). At this time, the sequence pointer
AD _{1 to} AD ₈ of the program address signal output from the program address pointer 11 are applied to 21. Since the number of output bits of the microprogram memory is 32 bits and the address bus 50 has a 16-bit width, the program memory address signal AD ₀ is used as a signal for multiplexing the output of the microprogram memory 20. The multiplexed signal is sent to the address bus 50 via the bus drivers 501 to 516 gated by the control signal TEST. Also, since the program address pointer is controlled to be sequentially incremented by the control signal TEST,
The output of the program memory is output to the input / output port 42 via the data bus 51, and the output of the micro program memory is output to the output port 41 via the address bus 50.

〔The invention's effect〕

As described above, the present invention has means for introducing the output of the program address pointer into the sequence pointer of the micro program memory and deriving the output of the micro program memory to the terminal. Information can be detected from the outside by a simple procedure, and therefore, defects in manufacturing a microcomputer can be removed at low cost.

Further, according to the present invention, even in a microcomputer having a built-in program memory, the control signal information and the contents of the program memory can be derived to the outside at the same time without increasing the number of terminals, and the effect is even greater.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention. FIG. 2 is a detailed block diagram of the micro program memory, 20, and sequence pointer. 10 ... Program memory, 11 ... Program address pointer, 20 ... Micro program memory, 21 ... Sequence pointer, 22 ... Decoder, 30 ... Control unit, 41 ...
… Output port, 42… I / O port, 50… Address bus, 51… Data bus, 60… Instruction register, 501 to 516… Bus driver.

Claims (1)

[Claims] 1. A program memory in which a machine language of instructions is stored, a program address pointer for sequentially designating addresses of the program memory, a micro program memory for holding instruction execution control procedures and control signal information, and the program. A sequence pointer in which address information obtained based on an instruction read from the address of the program memory specified by the address pointer is set, and the address of the micro program memory is specified with the address information as the start address. A microcomputer having a sequence pointer for designating the next address based on the contents read from the designated address, wherein the output of the program address pointer is replaced with the output of the micro program memory based on a control signal. To the sequence pointer Microcomputer, wherein the means for entering, to become further comprising a means for deriving the output from the address of the microprogram memory in which the sequence pointer on the basis of the introduced content specified in the microcomputer of the terminal.