JPH0797833B2 - Ghost removal device - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a ghost eliminating device for a television receiver.

[Background of the Invention]

When a radio wave (desired wave) coming directly from the transmitting antenna and a radio wave reflected from a building are received by the receiving antenna at the same time, a so-called ghost occurs, in which the image due to the desired wave and the image due to the reflected wave appear differently. To do. Ghosts associated with television receivers are a major cause of deterioration in image quality, and various measures have conventionally been taken to remove and prevent ghosts. As one of them, there is a ghost elimination method by a transversal filter in a video band. This method eliminates ghosts by connecting a number of delay elements, each of which has a minute delay time determined by the highest frequency component contained in the video signal, in series, and outputs the output of each delay element by weighted addition using a coefficient circuit. A ghost compensation signal is obtained.

An example of a ghost removing device using such a transversal filter is shown in a block diagram in FIG. In the figure, 1 is a video signal input terminal, 2 is a video signal output terminal, 3
Is a transversal filter, 4 is a subtractor, 5 is a reference signal generating circuit, 6 is a differentiating circuit, 7 is a comparator, 8 is a shift register, 9 is a subtractor, 10 is a tap gain memory, 11
Is a D / A (digital / analog) converter, 12 is a synchronizing signal separating circuit, 12 'is a vertical synchronizing signal separating circuit, 13 is a timing generating circuit, and 13' is a counter (timer).

FIG. 2 shows the transversal filter 3 in FIG.
3 is a block diagram showing the details of FIG. In the figure, 14 is an adder, 15 is a delay element having a delay time τ, and 16 is a tap amplifier. The tap amplifier 16 is an amplifier whose amplification gain can be changed by a control voltage input from the tap gain memory 10 via the D / A converter 11.

First, an outline of the operation in the circuit configuration of FIG. 1 will be described.

The video signal input from the input terminal 1 is sent from the output terminal 2 to the circuit of the next stage via the transversal filter 3, but if the sent video signal contains a ghost component, this We want to remove the components before sending them out. Therefore, it is necessary to detect the ghost component contained in the video signal output from the filter 3.

It is a technically easy method to select the vertical sync signal from the video signal for convenience and detect the ghost component superimposed on it (the ghost component superimposed on the pattern). , It is difficult to detect the ghost component because the pattern is a signal that constantly changes).

The video signal at the input terminal 1 is the sync signal separation circuit 12
At, the vertical sync signal is separated. The separated synchronization signal is supplied to the timing generation circuit 13 and used as a reference for timing signal generation. Reference signal generation circuit 5
Generates a vertical synchronization signal as a reference signal in accordance with the timing instructed by the timing generation circuit 13.
Therefore, if the vertical synchronizing signal contained in the video signal output from the filter 3 and the vertical synchronizing signal as the reference signal output from the circuit 5 are subtracted by the subtractor 4, the vertical synchronizing signal in the video signal is obtained. The ghost component superposed on the signal is obtained.

The ghost component is differentiated by the differentiating circuit 6, and the differentiated output is digitalized (binarized) by the comparator 7,
This digital output is written in the shift register 8. The timing of writing is controlled by the timing generation circuit 13. The gain data stored in the tap gain memory 10 is modified according to the data read from the shift register 8. That is, the data is read from the memory, the subtractor 9 makes a correction according to the data read from the shift register 8, and the correction is written in the memory 10 again.

In the above description, the reference signal is preset and the subtractor 4 subtracts the reference signal from the output signal of the transversal filter 3. However, the reference signal is not always necessary, and the output signal of the transversal filter 3 is directly differentiated. 6 may be provided.

When this process ends, the tap gain data is then read from the memory 10, converted into an analog voltage by the D / A converter 11, and this analog voltage is applied as a control voltage to the tap amplifier 16 in the transversal filter 3. The amplification gain is controlled. As a result, the video signal in which the ghost component is reduced is output from the filter 3. By repeating the above process by a predetermined number by the counter 13 ', the filter 3 finally outputs a video signal in which no ghost component is superposed.

The above is the outline of the operation of the ghost elimination device shown in FIG. 1. However, the description will be slightly supplemented below with reference to FIG. 3 showing the signal waveforms of the main parts in FIG.

In FIG. 3, (a) shows the vertical synchronizing signal as the reference signal output from the reference signal generating circuit 5, and F indicates the leading edge thereof. (B) shows the vertical synchronizing signal included in the video signal output from the transversal filter 3, and the hatched portion shows the superimposed ghost component. (C) shows the ghost component obtained as a result of the subtraction in the subtractor 4, and (D) shows the differential output pulse P thereof. Control signal (gate pulse) at the timing of the leading edge F of the vertical synchronizing signal from the timing generating circuit 13.
Is sent to the shift register 8 and the operation of the shift register 8 is started from that point, the binarized output of the pulse P is taken into the shift register 8 at the timing T time after the timing of the leading edge F. In this way
The shift register 8 stores ghost information consisting of a series of bit numbers, and sequentially outputs the information to the subtractor 9.

Next, as described above, the correction operation of the stored data in the tap gain memory 10 is started.
2 and the number (C ₁ , C ₂ ...) of the tap amplifier 16 in FIG. ₂ are associated with each other, and in this case, C ₁ , C ₂ , C ₃ ……
In this order, the tap gain data at the addresses corresponding to them are modified.

When the correction of the data in the tap gain memory 10 is completed, the operation to give new tap gain data to each tap amplifier 16 of the transversal filter 3 this time is carried out. The analog voltage is converted by the D / A converter 11 and applied to each tap amplifier 16. The applied voltage is held in a small-capacity capacitor (not shown) .When the voltage has been applied to each tap amplifier once, the tap amplifier C ₁ starts applying the voltage again, and this is repeated to discharge the capacitor. Is preventing.

Ghost detection, tap gain memory 10 as described above
The data correction process and the control voltage application process to each tap amplifier are performed once per field because the vertical synchronizing signal is used as the reference signal.

The counter 13 'also defines the number of times the above process is repeated. That is, since the data in the tap gain memory 10 is constantly modified during ghost elimination, even if there is no ghost, the lowest bit of the data is 0 or every vertical period due to noise included in the video signal. It vibrates to 1. Therefore, if the ghost removing operation is always performed, the S / N may be deteriorated, or the ghost may be added to the unstable operation due to the disturbance due to the reflected radio waves of an airplane or the like. Therefore, after a lapse of time when it is estimated that the ghost removal is sufficiently performed, the tap gain memory 10 is prohibited from being modified by this, so that the tap gain does not change. The counter 13 '
Usually counts the output of the vertical synchronizing signal separation circuit 12 'which occurs once per field (60 Hz).

As described above, in such a ghost removing device, a gate pulse is supplied from the timing generating circuit 13 to the shift register 8 as a timing signal for starting the operation of the register. ,
It is important that the timing of this gate pulse generation is correct.
The extremely important point in achieving the effect of removing the ghost component will be described in detail below.

FIG. 4 (A) shows, in detail, only the circuit portion M'of the circuit portion M shown in FIG. 1 which produces the gate pulse supplied from the video signal input to the terminal 1 to the shift register 8 as M '. It is the block diagram shown.

In the figure, 20 is a clamp circuit, 21 and 22 are sample and hold circuits, 23 is an average value circuit, 24 is a comparator, 25 is an AND circuit, 26 is a gate pulse generation terminal, 27 is a sync signal separation circuit 28 is a timing pulse. The generation circuit.

FIG. 4 (B) is a waveform diagram of signals at respective parts in FIG. 4 (A). In the figure, only vertical synchronization signals are shown as video signals. F represents the leading edge of the vertical synchronizing signal, and E ₁ and E ₂ both represent equalization pulses.

Refer to FIGS. 4 (a) and 4 (b). First, a video signal as shown in FIG. 4B is input to the video signal input terminal 1. Here, the video signal is the leading edge F of the vertical sync signal.
Only shown. The level of the tip of the sync signal of the video signal is adjusted by the clamp circuit 20, and the video signal is sent to the sample hold circuits 21 and 22 and the sync signal separation circuit 27. The output of the sync signal separation circuit 27 is input to the timing pulse generation circuit 28, and various timing signals A, B and C are generated.

The sample hold circuit 21 samples the pedestal voltage between the equalizing pulse E ₁ and the vertical synchronizing signal front edge F by the timing pulse A. In the sample and hold circuit 22, the sync tip voltage between the leading edge F of the vertical sync signal and the equalization pulse E ₂ is sampled by the sample pulse B. The average value circuit 23 obtains the average value of these voltages, that is, 1/2 of the amplitude of the vertical synchronizing signal is input to the comparator 24. On the other hand, the other input of the comparator 24
The output of the clamp circuit 20 is input. Therefore, when the signal amplitude of the vertical synchronizing signal in the input video signal reaches 1/2 of the predetermined level, the output of the comparator 24 changes from low to high. Since the synchronizing signal is present every horizontal period, a desired gate pulse can be obtained by selecting only the vertical synchronizing signal portion by the selection pulse C and the AND circuit 25.

The time when the output of the comparator 24 changes from low to high is selected when the amplitude of the vertical synchronizing signal reaches 1/2 of the predetermined amplitude because the leading edge F of the vertical synchronizing signal is not necessarily vertical. This is not limited to this, but it may be inclined, and even in that case, the time when the rising edge of the leading edge F reaches 1/2 of the predetermined level is regarded as the time when the leading edge F occurs. The selection pulse C is a mask pulse that selects the vicinity of the leading edge F of the vertical synchronizing signal.

As for the method of generating various timing pulses, A, B, and C, it is clear from the matters described in the specification of Japanese Patent Application No. 57-72582 that the input television signal is synchronized with the sync signal separation circuit 12.
(Fig. 1) Synchronous separation is performed to extract only the synchronous signal, and from this, the vertical synchronous signal portion and 1/2 H intervals existing in the vicinity thereof (where H indicates the horizontal scanning period) are equalized. Only the pulse group is detected, and the equalized pulse E ₁ shown in FIG. 4 (b) is detected by counting a predetermined number of the equalized pulses, whereby the sample pulse A and the mask pulse c are detected. , The sample pulse B may be continuously generated.

FIG. 5 is a waveform diagram showing the timing of the gate pulse generated in the circuit of FIG. 4 (a) in comparison with the vertical synchronizing signal.

Through the process of explaining the operation with reference to FIG. 4, the gate pulse as shown in FIG. 5B is applied to the leading edge F of the vertical synchronizing signal of the video signal containing the ghost of FIG. 5A. G
Occurs and is supplied to the shift register 8. Therefore, the shift register 8 starts its operation, and the clocks C ₁ , C ₂ , C ₃ , C ₄
Up to 4 bits each take a row input.

At the time of clock C ₅ , the ghost component (hatched portion in FIG. 5 (a)) superimposed on the vertical synchronizing signal is detected, and it passes through the differentiating circuit 6 and the comparator 7 in FIG. 5 (c).
The pulse output P shown in is taken in as a high input. As a result, the series of ghost information captured in the shift register 8 becomes [10000]. This reduces the gain of the tap amplifier C ₅ in the transversal filter 3,
Ghosts are gradually removed.

However, when a very large ghost is input, or when impulse noise is mixed in due to the ignition of the vehicle, this gate pulse may occur at a position completely different from the leading edge F of the vertical synchronizing signal.

That is, FIG. 6 (a) shows a television signal in the vicinity of the vertical synchronizing signal portion, and FIG. 6 (b) shows a waveform obtained by synchronously separating this and extracting only equalized pulses at 1 / 2H intervals. The equalization pulse is counted using a counter (not shown), and if there are six, the timing pulse, A,
It was mentioned earlier that B and C should be generated continuously. However, as shown in (a), when impulse noise N is mixed in the television signal and exceeds the tip level of the synchronizing signal Sy, this noise N is also regarded as a synchronizing signal, and as shown in (c). It becomes an equalization pulse '. If the noise N happens to occur in the middle of the sync signal Sy and the equalization pulse which are separated from each other by 1H period, the interval between the noise N and the sync signal Sy becomes 1 / 2H, which is a sync signal that was not originally taken out. Sy
As a result of being extracted as the equalization pulse ', the equalization pulse more than that in (b) is generated in (c). As a result, the timing pulses A, B and C are generated not at the vertical synchronizing signal but at the equalizing pulse E ₀ before that and at the previous equalizing pulse E ₀ . In this case, the timing chart shown in FIG. 5 becomes as shown in FIG.

In FIG. 7, (a) is an equalized pulse in the television signal.
E ₀ and (b) are gate pulses that are erroneously generated at incorrect timing. The synchronizing signal as a reference signal generated separately from the equalization pulse E ₀ in the television signal is subtracted by the subtractor 4 (see FIG. 1) and differentiated by the differentiating circuit 6. Since the equalized pulse E ₀ has a narrower pulse width than the vertical synchronizing signal as the reference signal, the output of the differentiating circuit 6 becomes as shown in (c). That is, even when there is no ghost, if the timing of gate generation is incorrect due to impulse noise, a differential output P'for correcting tap C ₃ is generated in this case.
As a result, the ghost elimination device results in adding a ghost rather than suppressing the ghost.

The above has described the case where only one impulse noise is mixed, but in general impulse noise is completely random,
In addition, since a large number of gate pulses are mixed, gate pulses are generated everywhere in the television signal, and a situation occurs in which each tap is corrected by a picture signal.

Furthermore, if a strong ghost exists, the signal of the picture is mixed in the sync signal part, and the sync separation also malfunctions,
Wrong gate generation timing.

Due to such circumstances, the conventional ghost removing apparatus has a problem that it causes unstable operation depending on environmental conditions and significantly impairs image quality.

[Object of the Invention]

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to provide a ghost removing device that operates stably even in the presence of impulse noise or a strong ghost and that can obtain a sufficient removing effect.

[Outline of Invention]

In order to achieve the above-mentioned object, in the present invention, a means for monitoring whether or not the gate pulse is generated in synchronization with the vertical synchronizing signal is provided, and if it does not occur correctly due to the presence of impulse noise or a strong ghost. If it is determined that the tap gain memory is temporarily rewritten, the timer counting operation is also temporarily disabled to prevent unstable operation. It is characterized in that the number of times the gain is corrected is constant.

Example of Invention

 Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 8 is a block diagram showing a main part of one embodiment of the present invention (that is, a circuit part added to the conventional ghost removing device by the present invention). In the figure, 30 and 31 are respectively D
Type flip-flop, 32 is an inverter, 33 is an AND circuit, 3
Reference numeral 4 denotes an input terminal of a sync signal (output of the sync signal separation circuit 27 of FIG. 4A) obtained by sync separation, 35 denotes a sample pulse A (timing pulse A from the timing pulse generation circuit 28) input terminal, 36 Is a sample pulse B (timing pulse B from the circuit 28) input terminal, 37 is a memory write control signal output terminal (a terminal for outputting a write control signal to the tap gain memory 10 in FIG. 1), and 38 is an AND circuit. , 39 are vertical synchronizing signal input terminals, and 40 is a clock pulse output terminal to the counter 13 '.

FIG. 9 is a waveform diagram showing signal waveforms of various parts in the circuit of FIG.

The operation will be described with reference to FIGS. First, when the gate pulse is generated at the correct timing, that is, the ninth pulse
The sync separation output (34) shown in FIG. 9 (a) is input from the terminal 34 to the D input terminals of the D flip flops 30, 31. The sample pulses A (35) and B (36) shown in FIG. 9 (a) are input to the CK terminals of the D flip-flops 30 and 31 via the terminals 35 and 36, respectively. Therefore, inverter
As shown in (c) and (e) of FIG. 9 (a), the outputs of 32 and D flip-flop 31 become high level in synchronization with the sample pulses A and B, respectively, and the output of the AND circuit 33 (f). Becomes high level and the tap gain memory 10 can be rewritten.

Further, since the AND circuit 38 takes the AND of the write control signal (f) and the vertical synchronizing signal separation output (g), the counter 13 '
The clock pulse shown in (h) is output to the clock pulse output terminal 40 of. Accordingly, the counter 13 'counts 1 as the tap gain memory 10 is rewritten.

However, when the gate pulse is generated at the deviated timing position E ₀ instead of the regular timing position F, the output (c) of the inverter 32 goes through the same process as described in FIG. 9A. ) Is high level, the output (e) of the D flip-flop 31 is low level, the output (f) of the AND circuit 33 is low level, and rewriting of the tap gain memory 10 is prohibited.

In this case, since the write signal (f) falls before the vertical synchronizing signal (g) is generated, the output of the AND circuit 38, that is, the clock pulse (h) to the counter 13 'is not generated and the counter 13' is not generated. There is no change in the count value of.

Further, as in the case of FIG. 9C, when the gate pulse still occurs at the deviated timing position E ₂ instead of the regular timing position F, the output (c) of the inverter 32 is processed by the same process. Is low level, and the output of D flip-flop 31 is high level.
After all, rewriting is prohibited. Further, as is already clear, the write control signal (f) remains at the low level,
No clock pulse is supplied to the counter 13 '.

As described above, when the gate pulse does not occur at the correct timing position F, the rewriting of the tap gain memory 10 is prohibited, and the clock pulse is not derived to the counter 13 'correspondingly, so that the counting operation is temporarily performed. Can be stopped automatically.

Therefore, as described above, the number of corrections of the tap gain memory 10 can be set to a constant value determined by the number of bits of the counter 13 ', in addition to avoiding unstable operation, under any environment.

[Advantages of the Invention] As described above, according to the present invention, it is possible to prevent deterioration of the removal performance and unstable operation in the presence of impulse noise and strong ghosts, which are problems in the conventional ghost removal apparatus. In any case, it is possible to obtain a sufficient ghost elimination effect by fixing the tap gain memory constant.

[Brief description of drawings]

FIG. 1 is a block diagram showing a conventionally known ghost removing device, FIG. 2 is a block diagram showing details of the transversal filter in FIG. 1, and FIG. 3 is a waveform diagram showing signal waveforms of essential parts in FIG. 4 is a block diagram showing the gate pulse generator in FIG. 4 (a), FIG. 4 (b) is a waveform diagram showing the signal waveform of each part in FIG. 4 (a), and FIG. 5 is a gate pulse in the case of normal operation. 6 is a timing diagram showing the timing relationship between the differential pulse and the differential pulse, FIG. 6 is a waveform diagram showing the television signal and its synchronous separation output, FIG. 7 is a timing diagram showing the timing relationship between the gate pulse and the differential pulse in the case of malfunction, and FIG. FIG. 9 is a circuit diagram showing a main part of an embodiment of the present invention, and FIGS. 9 (a), 9 (b) and 9 (c) are signal waveform diagrams of respective parts in the circuit of FIG. Explanation of code 1 …… Video signal input terminal 2 …… Video signal output terminal 3 …… Transversal filter 4 …… Subtractor 5 …… Reference signal generation circuit 6 …… Differentiation circuit 7 …… Comparator 8 …… Shift register , 9 ...... Subtractor 10 ...... Tap gain memory 11 ...... D / A converter, 12 ...... Sync signal separation circuit 13 ...... Timing generation circuit 30, 31 …… D-type flip-flop 32 …… Inverter, 33 …… AND circuit 12 '... Vertical sync signal separation circuit 13' ... Counter, 38 ... AND circuit

Continuation of front page (56) Reference JP-A-59-151577 (JP, A) JP-A-56-166675 (JP, A) JP-A-59-32269 (JP, A) JP-A-58-191576 (JP , A)

Claims (1)

[Claims] 1. A transversal filter having a plurality of taps, the gain of each of which can be varied, a tap gain memory for storing gain data of taps included in the filter, and a predetermined reference included in a video signal. Detecting means for detecting the presence position of the ghost component with respect to the signal, correction means for correcting the tap gain data stored in the tap gain memory according to the detected presence position information, and in the filter according to the corrected data In a ghost removing device comprising a control means for controlling each tap and a counting means for counting the number of detection, correction and control, a pulse generation means for generating a gate pulse at a position where the reference signal is expected, and the gate pulse Is provided at a position where the reference signal is expected, When the means determines that the generation position is incorrect, the video signal gated by the gating pulse is not used for modifying the tap gain data stored in the tap gain memory, and the counting operation of the counting means is performed. A ghost removing device characterized by temporarily prohibiting.