JPH08101286A - Calendar clock circuit - Google Patents

Abstract

PURPOSE: To adjust a calendar clock easily and accurately while reducing the labor. CONSTITUTION: An error setting switch section 4 comprising a plurality of switches stores the values of set error (a) corresponding to the switching state. When an error measuring section 2 measures the error at a clock circuit section 1, a set error value (a) is determined from an error value (f) and delivered to an initial value operating/setting section 5. The initial value operating/setting section 5 calculates an initial value (b) for minimizing the error from the set value (a). The initial value (b) is delivered to a correction reference counter section 7 and held. When the initial value (b) is set, the correction reference counter section 7 counts the output (c) from an oscillator and delivers a reference pulse output (d). Consequently, corrected time information, i.e., a calendar clock output value (e), is delivered from a calendar counter section 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a calendar clock circuit, and more particularly to a calendar clock circuit for correcting an error in time information.

[0002]

2. Description of the Related Art Conventionally, in a calendar clock circuit used in an information processing apparatus, for example, an electronic timepiece disclosed in Japanese Patent Laid-Open No. 2-150791, a semi-fixed capacitor or a variable capacitor is used as an oscillator for adjusting the oscillation frequency. A capacitor is used. When adjusting the error of such a clock circuit, while measuring the output value of the calendar clock with a measuring instrument, the output frequency to the counter is changed by artificially changing the capacity of the variable capacitor, and the error of the time information is adjusted. are doing.

[0003]

In the above-described conventional calendar clock circuit, there is a possibility that the adjustment itself may be inaccurate due to an error made by an operator who artificially changes or changes the capacitance of the variable capacitor or the like. In addition, there is a problem in that it takes time and effort for a skilled person to make an accurate adjustment.

An object of the present invention is to provide a calendar clock circuit which can easily and accurately adjust the time information and can automate the switching operation for error measurement and adjustment.

[0005]

SUMMARY OF THE INVENTION A calendar clock circuit of the present invention uses a correction reference counter section for counting the output from an oscillator based on an initial value and a reference pulse output from the correction reference counter section as time information. The minimum error from the setting error value of the error setting switch unit and the error setting switch unit that stores the error value of the calendar counter output unit that outputs the calendar clock output value in correspondence with the states of the plurality of switches. Of the calendar from the calendar counter section in the clock circuit section via a time measurement switch and an initial value calculation setting section for calculating an initial value of the value and setting it in the correction reference counter section. An error measuring unit for measuring an error of a clock output value and sending a calendar clock output error to the error setting switch unit, and calculating the initial value. Configured to modify the time information by the error in the correction reference counter from tough sets the initial value to be minimized.

[0006]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram of a calendar clock circuit showing an embodiment of the present invention. As shown in FIG. 1, the calendar clock circuit according to the present embodiment receives a clock circuit unit 1 which has an oscillator 6 therein and which outputs a calendar clock output value e as time information, and an output e of the clock circuit unit 1. Error measuring section 2 for measuring the error and sending error information f to the clock circuit section 1 as a result, and a measurement for sending output e of this clock circuit section 1 to the error measuring section 2 when measuring the error. Switch 3 for. Normally, the output e of the clock circuit unit 1 is supplied to other circuits that require a clock.

The clock circuit section 1 includes an oscillator 6, a correction reference counter section 7 for counting the output c from the oscillator 6 based on an initial value b, and the correction reference counter section 7.
A calendar counter unit 8 which sends out a calendar clock output value e as time information by a reference pulse output d from the device, and a plurality of switches. The error setting switch unit 4 stored in the error setting switch unit 4 and the initial value calculation setting unit 5 that calculates the minimum error initial value b from the value of the setting error a of the error setting switch unit 4 and sets it in the correction reference counter unit 7. There is. In the present embodiment, the clock output value e as the time information is corrected by setting the initial value b which minimizes the error in the correction reference counter section 7.

When measuring the error with the calendar clock circuit, the error setting switch section 4 is operated. As described above, the error setting switch unit 4 is a group of a plurality of switches and can set a value within the error range of the calendar clock output value e sent by the calendar counter unit 8. First, the error setting switch unit 4 is set to zero (0). On the other hand, at this time, the error measuring unit 2 is connected to the timepiece circuit unit 1 by turning on (closing) the measurement switch 3, and the error of the calendar timepiece output value e when the error setting switch unit 4 is set to 0. To measure. When this error measurement is completed, the calendar clock output error f measured by the error measuring unit 2 is automatically set in the error setting switch unit 4.

Next, the operation of the clock circuit section 1 will be described. In this case, the measurement switch 3 is turned off (open) to disconnect the error measurement unit 2. As described above, the error setting switch section 4 sends the automatically set setting error a to the initial value calculation setting section 5. Upon receiving the setting error a, the initial value calculation setting unit 5 calculates an initial value b of the correction reference counter unit 7 that minimizes the error and holds the value. As a result, the initial value b is set in the correction reference counter section 7. However, since the oscillator 6 outputs the oscillator output c to the correction reference counter unit 7 at a certain frequency, when the correction reference counter unit 7 sets the initial value b from the initial value calculation setting unit 5, the oscillator output c To count. Then,
When one cycle is counted by the correction reference counter unit 7,
The reference pulse output d is sent to the calendar counter unit 8.
At the same time, the initial value calculation setting unit 5 sets the initial value b in the correction reference counter unit 7 again. Further, the calendar counter unit 8 counts the reference pulse output d and outputs a calendar clock output value e which is time information.

[0010]

As described above, the calendar timepiece circuit of the present invention has the timepiece circuit portion for setting the error, the measuring switch and the error measuring portion, so that the capacitance of the variable capacitor is artificially adjusted. No adjustment needed,
The effect is that time adjustment can be performed easily and accurately. In addition, the present invention has an effect that it is possible to reduce an artificial man-hour by automating the error measurement and the switching of the setting switch section.

[Brief description of drawings]

FIG. 1 is a block diagram of a calendar clock circuit showing an embodiment of the present invention.

[Explanation of symbols]

 1 Clock Circuit Section 2 Error Measuring Section 3 Measurement Switch 4 Error Setting Switch Section 5 Initial Value Calculation Setting Section 6 Oscillator 7 Correction Reference Counter Section 8 Calendar Counter Section

Claims (2)

[Claims] 1. A correction reference counter section that counts an output from an oscillator based on an initial value, and a calendar counter section that outputs a calendar clock output value as time information by a reference pulse output from the correction reference counter section. The correction reference counter unit calculates an error minimum initial value from the error setting switch unit that stores the error value of the calendar clock output value corresponding to the states of a plurality of switches and the setting error value of the error setting switch unit. A clock circuit section having an initial value calculation setting section to be set to, and an error setting switch for measuring an error of the calendar clock output value from the calendar counter section in the clock circuit section via a time measurement switch. Error measuring section for sending a calendar clock output error to the correction reference counter section from the initial value calculation setting section. A calendar clock circuit characterized in that the time information is corrected by setting an initial value of 2. The calendar clock circuit according to claim 1, wherein the initial value calculation setting unit holds the initial value with the minimum error.