JPH08163578A - Digital convergence device - Google Patents

Abstract

(57) [Abstract] [Purpose] In a device that corrects the convergence of a color television receiver, by switching the number of adjustment points according to the adjustment accuracy of the input signal, the memory capacity can be reduced and the adjustment can be performed easily in a short time. It is an object of the present invention to provide a digital convergence device that can be realized. [Arrangement] In the adjustment point discrimination circuit 24, adjustment point switching is performed by preset data for each input signal, signal discrimination by the size of the screen amplitude, and input signal discrimination by horizontal and vertical frequency detection, and is automatically digitalized according to the input signal. In order to switch the convergence adjustment point, the interpolation calculation circuit 23 between adjustments is turned on / off by the multiplexers 21 and 22.
F

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital convergence device for correcting the convergence of a color television receiver.

[0002]

2. Description of the Related Art Generally, in a projection type color image receiving apparatus for enlarging and projecting on a screen by using three projection tubes which emit three primary colors, the angle of incidence of the projection tube with respect to the screen is different for each projection tube. Misalignment occurs. The superposition of these three primary colors, so-called convergence, employs a method in which a convergence correction waveform is created in an analog manner in synchronization with the horizontal and vertical scanning periods, and the size and shape of the waveform are changed to adjust the convergence. There is a problem with accuracy. Therefore, as a method capable of supporting various signals and having high convergence accuracy, for example, Japanese Patent Laid-Open No.
A digital convergence device disclosed in Japanese Patent Laid-Open No. 130288 has been proposed.

The conventional digital convergence device will be described below. FIG. 7 shows a block diagram of a conventional digital convergence device. This displays a convergence correction pattern such as a crosshatch pattern (shown in FIG. 8) on the screen, digitally writes the convergence correction amount data for each adjustment point to the frame memory, and reads this data D A / A conversion is performed to perform convergence correction.

In FIG. 7, 1 is a read address control unit, 2 is a crosshatch generator, 3 is a video circuit, 4 is a write address control unit, 5 is a control panel, 6 is a reversible counter, 7 is a multiplexer, and 8 is 1. Frame memory, 9 is a register, 10 is a processing unit between vertical adjustment points, 1
1 is a D / A conversion circuit, 12 is an LPF, 13 is a scanning line number detection unit, 14 is an adjustment point number setting unit, 15 is a coefficient calculation unit, 1
Reference numeral 6 is an output amplifier, and 17 is a deflection circuit.

A horizontal / vertical cycle pulse synchronized with the deflection current cycle is applied as a sync signal to a sync signal input terminal 20,
This drives the read address controller 1. The crosshatch generator 2 is driven by using the pulse from the read address control unit 1, and the video circuit 3 displays the crosshatch pattern on the projection screen. On the other hand, the address key of the control panel 5 is used to specify a cross point (for example, A in FIG. 7) at a position where convergence correction is necessary, and the position address is set in the write address control unit 4. Next, a correction amount is written in the one-frame memory 8 through the data reversible counter 6 while looking at the screen with a data writing key of a color to be corrected, for example, a red data writing key provided on the control panel 5. Usually, the writing to the 1-frame memory 8 is switched and controlled by the multiplexer 7 so as to be performed during the blanking period of the video signal. Therefore, reading is not impaired.

In this way, the same operation is performed at each adjustment point. Next, the reading of the 1-frame memory 8 is performed by the read address control unit 4 for each adjustment point position on the screen, and through the register 9 driven by the read address control unit 1, the vertical adjustment point processing is performed. The correction amount process in the vertical scanning direction between the adjustment points is performed in the unit 10. In order to correspond to various signal sources,
It is necessary to perform processing between adjustment points according to the number of scanning lines.
Therefore, the input synchronizing signal is supplied to the scanning line number detection unit 13, detects the number of scanning lines in one field, and is applied to the adjustment point number setting unit 14. In the number-of-adjustment-points setting unit 14, the number of scanning lines in one field is M
= M / (L + 1) The number of scanning lines N, which is the number of adjustment points, is calculated,
It is added to the coefficient calculator 15. In addition to the write address control unit 4 and the read address control unit 1, the operation is switched every N lines.

The output of the vertical adjustment point-to-point processing unit 10 which operates as described above is input to the D / A conversion circuit 11, where a signal converted into an analog amount is obtained. The signal between the adjustment points in the horizontal direction is smoothed by the low-pass filter (LPF) 12 for the correction amount at the adjustment points in each row, amplified by the output amplification section 16, and then supplied to the convergence yoke 18. Further, the data of the 1-frame memory is stored in the non-volatile memory for each input signal, the stored data is switched by the detection signal from the scanning line number detecting unit 13 and expanded in the 1-frame memory, and the deflection circuit is used as a system switching signal. 17 is added to switch the deflection amplitude, frequency, etc. In this way, individual correction data is held for each signal source, and independent correction can be performed for each adjustment point, so that convergence correction can be performed accurately.

[0008]

However, in the above-mentioned conventional configuration, although the convergence adjustment can be performed with high accuracy for each signal source, the adjustment points are the same for any input signal, so There is a problem that the number of data is large and a large amount of capacity of the non-volatile memory is used, and the adjustment time is long.

[0009]

In order to solve the above-mentioned problems, the digital convergence apparatus of the present invention generates a plurality of convergence adjustment points in the horizontal and vertical directions on the screen of a color television receiver to display a cursor. Means for inputting the correction data of each adjustment point in the screen and digitally storing the convergence correction amount of each adjustment point, and a synchronization for inputting the correction data from the storage means to the receiver. Means for reading in synchronization with the signal, means for amplifying the read correction data and supplying it to the correction coil, means for presetting the adjustment point determination signal together with the correction data in the memory as the storage means, A means for switching the number of adjustment points is provided according to the detection result of the preset data.

The digital convergence apparatus of the present invention further comprises means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on the screen of a color television receiver and displaying the cursor, and correcting each adjustment point in the screen. By inputting data, the correction data for each adjustment point outside the screen can be calculated by extrapolation from the correction data inside the screen, and the cursor display for each adjustment point outside the screen can be calculated by extrapolation. Means for digitally storing the convergence correction amount at each adjustment point, means for reading the correction data from the storage means in synchronization with a synchronization signal input to the receiver, and means for reading the correction data. Means for amplifying the corrected data and supplying it to the correction coil, and means for determining whether the input signal is a TV image or a computer image by detecting the amplitude of deflection. , Those having a means for switching the adjustment points by the discrimination result.

Further, the digital convergence apparatus of the present invention comprises means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on the screen of the color television receiver and displaying the cursor, and correcting each adjustment point in the screen. By inputting data, the correction data for each adjustment point outside the screen can be calculated by extrapolation from the correction data inside the screen, and the cursor display for each adjustment point outside the screen can be calculated by extrapolation. Means for digitally storing the convergence correction amount at each adjustment point, means for reading the correction data from the storage means in synchronization with a synchronization signal input to the receiver, and means for reading the correction data. By means of amplifying the corrected data and supplying it to the correction coil and the frequency of the input signal, the input signal is a TV image or a high definition computer image. Means for determining whether, but provided with means for switching the adjustment points by the discrimination result.

[0012]

According to the present invention, since the number of adjustment points can be switched and preset according to the correction accuracy of the input signal, the digital convergence correction can be optimally adjusted, the memory capacity can be greatly reduced, and high-precision adjustment can be easily performed. You will be able to do it.

Further, according to the present invention, even when the input signal is changed to a TV image which is overscanned or a computer image which is underscanned and which requires a highly accurate correction,
Since it can be automatically detected by the screen amplitude and the adjustment points can be switched automatically according to the input signal, the digital convergence correction can be optimally adjusted, and the digital convergence correction can be optimally adjusted, and the memory capacity is greatly reduced. In addition, high precision adjustment can be performed easily.

Further, according to the present invention, even if the input signal is different from the TV image or the computer image that requires highly accurate correction, the input signal is detected by detecting the frequency of the input signal. The extrapolation calculation can be turned ON / OFF automatically according to the setting, so that the digital convergence correction can be adjusted optimally. Therefore, the digital convergence correction can be adjusted optimally and the memory capacity can be significantly reduced. You will be able to make adjustments.

[0015]

【Example】

(Embodiment 1) Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

1, FIG. 2, FIG. 3, and FIG. 4 are block diagrams of a digital convergence apparatus according to the first embodiment of the present invention, a block diagram of an over / under-scan determination circuit of its main part, and over / under scanning. The figure of a relation with a screen, a crosshatch, and an extrapolation point, and the figure of relation with two interpolation points of extrapolation calculation data are shown. In FIG. 1, 21, 22
Is a multiplexer for turning on / off the extrapolation operation, 23 is an extrapolation point calculation unit that automatically obtains extrapolation point data from the data of two extrapolation points, 24 is an over / underscan determination circuit, and 25 is a vertical direction A vertical calculation circuit for performing calculation between adjustment points, and 26 is an address control unit for controlling reading and writing of memory.

Further, in FIG. 2, reference numeral 26 indicates O for extrapolation point calculation.
A non-volatile memory that stores N / OFF, 27 is a memory reading circuit that reads the memory for each input signal, and 28 is an extrapolation calculation switch that outputs a signal for switching extrapolation point interpolation ON / OFF according to the read data. Circuit. In FIG. 3, 29 is a cross hatch and 30 is
The screen frame 31 is an adjustment point. It should be noted that components operating in the same manner as in the conventional embodiment shown in FIG.

The operation of the digital convergence device of this embodiment having the above-described structure will be described below. A synchronization signal is input to the input terminal 20, an address control unit 26 generates various address signals for controlling the 1-frame memory 8, and the crosshatch generator 2 outputs horizontal signals as shown in the display screen diagram of FIG. The horizontal and vertical crosshatch patterns 29 are generated and displayed on the screen by the video circuit 3. Then, the cursor key (not shown) of the control panel 5 is used to select the adjustment point at the position to be corrected and the corrected color, and the selected color is stored in the area of the 1-frame memory 8 corresponding to the address. Here, when the extrapolation point is outside the screen as in (a of the adjustment point 32) as shown in FIG.
The over / underscan determination circuit 24 determines overscan, and controls the multiplexers 21 and 22 so that the operation from the control panel passes through the extrapolation point calculation circuit 23. Therefore, the adjustment points (extrapolation points) outside the screen are shown in FIG.
The correction data of the extrapolation point is obtained from the correction data of the extrapolation point by the correction data of the adjustment points (display screens b and c) in the screen of (a), for example, by linear approximation.

When the extrapolation point is within the screen as shown in (a of the adjustment point 32) as shown in FIG. 3B, the over / underscan discrimination circuit 24 discriminates the underscan,
The multiplexers 21 and 22 are controlled so that the operation from the control panel does not pass through the extrapolation point calculation circuit 23. Therefore, the extrapolation points can be independently adjusted regardless of the correction data of the adjustment points (display screens b and c) in the screen of FIG. Since the 1-frame memory 10 in which the adjusted data is written stores only the correction data at the locations corresponding to the adjustment points, the vertical arithmetic circuit 25 interpolates between the adjustment points in the vertical direction. Correction data corresponding to each scanning line between the adjustment points is created. Vertical calculation unit 2
The output from 5 is converted into an analog amount by the D / A conversion circuit 11 and is horizontally smoothed by the LPF 12 to create a corrected waveform.

Here, the operation of the over / underscan determination circuit will be described. When an input signal is optimally displayed on the screen and a crosshatch signal 30 is output, (a) in FIG.
When the control panel 5 is operated with or without extrapolation points on the screen as shown in (b), the extrapolation point calculation ON / OFF data is written into the non-volatile memory 27, and the memory reading circuit 28 reads the data. Is read out, and the extrapolation point switching circuit 29 turns on / off the extrapolation point calculation.
Since ON / OFF of the extrapolation point interpolation is stored in the non-volatile memory, it automatically switches for each input signal.

Next, FIG. 4 is used to explain the extrapolation calculation means in detail. For the extrapolation point a, the extrapolation point calculation circuit 23 obtains the correction data D3 by linear approximation from the correction data D1 at the point c and the correction data D2 at the point b in the screen. At this time, the cursor is displayed not at the position of the extrapolation point a but at the two points of the adjustment points b and c on the screen, which are the basic data of the extrapolation calculation, and the extrapolation calculation is displayed.

The extrapolation point is detected by the control panel 5
The control signal from is supplied to the extrapolation point calculation circuit 23 to discriminate whether the signal is in the screen or out of the screen. This discrimination signal is supplied to the crosshatch generator 2 to display the extrapolation point of the cursor. . Therefore, as shown in the display screen diagram of FIG. 3, for example, the cursor is displayed at the adjustment points b and c, and the square cursor is displayed only at the d position at the adjustment point d in the screen. That is, when only one cursor is displayed, the position of the adjustment point on the screen is displayed, and when two cursors are displayed, the position of the adjustment point (extrapolation point) outside the screen is displayed.

As described above, according to this embodiment, by presetting ON / OFF of the extrapolation point calculation for each input signal, the deflection amplitude of the receiver is overscanned and the adjustment point outside the screen is not displayed. In some cases, the extrapolation point display has cursors at two adjustment positions within the screen, and the extrapolation calculation can automatically perform adjustments outside the screen, and when the deflection amplitude of the receiver is an underscan image, Since extrapolation point calculation and extrapolation point display can be prohibited, overscan /
Even if the extrapolation points are inside or outside the screen due to underscan images, etc., optimum convergence adjustment can be performed in the optimum state according to the input signal.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 5 is a block diagram of a digital convergence device according to the second embodiment of the present invention. In FIG. 5, the difference from the first embodiment is that over / under scanning is determined by the deflection amplitude. In FIG. 5, 33
Is a deflection amplitude control circuit, 34 is a reference voltage for deflection amplitude control when the extrapolation point is on the screen frame, 35 and 36 are comparators, 37 is a horizontal extrapolation point ON / OFF signal, and 38 is a vertical direction. Extrapolation point ON / OFF signal. Note that in FIG. 5, the components that operate in the same manner as in FIG. 1 and FIG. 7 of the conventional embodiment are denoted by the same reference numerals and the description thereof will be omitted.

The operation of the thus constructed digital convergence apparatus of this embodiment will be described below. Here, the operation of switching the extrapolation point calculation between the control panel 5 and the frame memory 8 is the same as that in the first embodiment, and therefore will be omitted. When the signal is input to the receiver and the horizontal amplitude is controlled by the deflection amplitude control circuit 33 to control the deflection circuit 17 to adjust the amplitude of the screen, the minus side voltage of the comparator 35 is changed. Since the reference voltage for deflection amplitude control in the case of 1 is applied to the + side of the comparator, whether the extrapolation point is inside or outside the screen can be determined by whether the voltage output from the comparator 35 is + or −. The extrapolation calculation in the horizontal direction is performed by the discrimination signal 37.
N / OFF. Similarly, in the vertical direction, the extrapolation calculation in the vertical direction is turned ON / OFF by the output of the comparator 36.

As described above, by comparing the screen amplitude for each input signal with the reference amplitude, it is possible to determine over / under scanning and turn on / off the extrapolation calculation.

(Embodiment 3) A third embodiment of the present invention will be described below with reference to the drawings.

FIG. 6 is a block diagram of a digital convergence device according to the second embodiment of the present invention. In FIG. 6, the difference from the first embodiment is that over / under scanning is determined by the frequency of the input signal. In FIG. 6, 39 is a horizontal synchronizing signal, 40 is a vertical synchronizing signal, 41 is a reference clock generator, 42 is a counter for counting the horizontal frequency, 43 is a minute period for lowering the frequency of the reference clock, and 44 is a vertical frequency. Counter, 4
Reference numeral 5 is a horizontal frequency discriminating circuit, 46 is a vertical discriminating circuit, and 47 is an input signal discriminating circuit for discriminating an input signal by the horizontal and vertical frequencies. In FIG. 6, the elements that operate in the same manner as in FIG. 1 and FIG. 7 of the conventional embodiment are denoted by the same reference numerals and the description thereof will be omitted.

The operation of the thus constructed digital convergence apparatus of this embodiment will be described below. Here, the operation of switching the extrapolation point calculation between the control panel 5 and the frame memory 8 is the same as that in the first embodiment, and therefore will be omitted. When a signal is input to the receiver, the horizontal synchronizing signal 39 is counted by the counter 42 by the reference clock input from the reference clock generator 41. The horizontal frequency determining circuit 45 determines the frequency of the horizontal synchronizing signal based on the counted data.

Similarly, the vertical synchronizing signal 40 also divides the reference clock input from the reference clock generator 41 by four cycles.
The counter 44 is activated by the clock whose frequency is lowered by 3
Is counted in. The frequency of the vertical synchronizing signal is determined by the vertical frequency determining circuit 45 based on the counted data. The input signal discrimination circuit 47 discriminates over / under scanning from the horizontal / vertical frequency data, outputs an extrapolation calculation ON / OFF signal, and automatically performs extrapolation calculation.
N / OFF.

In the first, second and third embodiments, the projection type color image receiver has been described for easy understanding, but it is also effective for the shadow mask type direct view type image receiver. Needless to say.

[0033]

As described above, according to the present invention,
By turning on / off the extrapolation operation by over / under scanning of the input signal, the optimum digital convergence can be adjusted according to the input signal, so that highly accurate correction can be easily realized in a short time.

Further, by presetting ON / OFF of the extrapolation operation for each input signal, the optimum digital convergence can be adjusted according to the input signal at the time of readjustment and the correction can be easily performed with high accuracy in a short time. Can be realized.

As described above, according to the present invention, by determining the screen amplitude and automatically turning on / off the extrapolation operation, the optimum digital convergence can be adjusted according to the input signal. Highly accurate correction can be realized easily in time.

Further, according to the present invention, the over / under scan is discriminated by performing the input signal discrimination circuit based on the horizontal frequency and the vertical frequency, and the extrapolation calculation is automatically turned ON / OFF.
By automatically performing the OFF signal, optimum digital convergence can be adjusted according to the input signal, and high-accuracy correction can be easily realized in a short time.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital convergence device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of an adjustment point determination circuit in the digital convergence device according to the first embodiment of the present invention.

3A and 3B are display screen diagrams for explaining the operation of the apparatus of the embodiment.

4A and 4B are views for explaining the operation of the apparatus of the embodiment.

FIG. 5 is a block diagram of a digital convergence device according to a second embodiment of the present invention.

FIG. 6 is a block diagram of a digital convergence device according to a third embodiment of the present invention.

FIG. 7 is a block diagram of a conventional digital convergence device.

FIG. 8 is a display screen diagram for explaining the operation of a conventional digital convergence device.

[Description of Codes] 1 read address control unit 2 crosshatch generator 3 video circuit 4 write address control unit 5 control panel 6 reversible counter 7 multiplexer 8 1 frame memory 9 register 10 vertical adjustment point processing unit 11 D / A conversion Circuit 12 LPF 13 Scanning line number detection unit 14 Adjustment point number setting unit 15 Coefficient calculation unit 16 Output amplification unit 17 Deflection circuit 18 Convergence coil 19 Deflection coil 21, 22 Multiplexer 23 Adjustment point interpolator circuit 24 Adjustment point determination circuit 25 Vertical Arithmetic circuit 26 Address generation unit 27 Non-volatile memory 28 Memory read circuit 29 Adjustment point switching circuit 30 Adjustment point switching signal 31 Crosshatch 32 Adjustment point 33 Interpolation adjustment point 34 Deflection amplitude control circuit 35 Reference voltage generator 36, 37 Comparator 38 OR circuit 39 Horizontal sync signal 40 Vertical sync signal 41 Reference clock generator 42, 44 Counter 43 Minute cycle 45 Horizontal frequency discrimination circuit 46 Vertical frequency discrimination circuit 47 Input signal discrimination circuit

Claims (4)

[Claims] 1. A means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on the screen of a color television receiver and displaying the cursor, and correction data for each adjustment point in the screen are input, and each adjustment point is input. Means for digitally storing the convergence correction amount, means for reading the correction data from the storage means in synchronization with a synchronizing signal input to the receiver, and vertical correction data for the read adjustment points. And a means for amplifying the interpolation-corrected correction data and supplying it to the correction coil, a means for determining the number of convergence adjustment points on the screen, and a means for switching the number of adjustment points according to the determination result. A digital convergence device. 2. The digital convergence device according to claim 1, wherein the means for determining the number of adjustment points on the screen is adapted to determine preset data stored together with the correction data in the memory serving as the storage means. 3. A means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on the screen of a color television receiver and displaying the cursor, and correction data for each of the adjustment points in the screen are input, and each adjustment point is input. Means for digitally storing the convergence correction amount, means for reading the correction data from the storage means in synchronization with a synchronizing signal input to the receiver, and vertical correction data for the read adjustment points. Direction, a means for performing interpolation calculation, a means for amplifying the interpolation-corrected correction data and supplying it to the correction coil, a means for determining the number of convergence adjustment points on the screen based on the amplitude of deflection, and the result of the determination A digital convergence device comprising a switching means. 4. A means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on a screen of a color television receiver and displaying the cursor, and inputting correction data of each adjustment point in the screen and inputting each adjustment point. Means for digitally storing the convergence correction amount, means for reading the correction data from the storage means in synchronization with a synchronizing signal input to the receiver, and vertical correction data for the read adjustment points. Means for interpolating in the direction, means for amplifying the correction data that has been interpolated and supplying it to the correction coil, means for discriminating the number of convergence adjustment points on the screen based on the horizontal and vertical frequencies of the input signal, and the discrimination result. , A digital convergence device comprising means for switching the number of adjustment points.