JPH08205104A - ATM line signal generation method and ATM line signal processing device using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] To multiplex digital video signals so that they can be accommodated in an ATM line. [Structure] When a 525/60 series, D1 type digital video signal (270 Mbps) is multiplexed and transmitted, the number of cells in a data area (horizontal and vertical blanking interval data) other than the active area of the digital video signal is 1 5606 when all 48 bytes of cells are used
It becomes a cell. Considering that the data area is not subjected to compression processing, the number of cells per frame that can be transmitted by the ATM1 line is 11769 cells. Therefore, if the data in the active area is compressed, at least two channels (2CH) of D1 signals can be transmitted. Can be multiplexed using the ATM1 line. At this time, the number of cells allocated to the active area is 279 cells per channel, and the number of cells in the active area is 18506 cells.
If it is compressed to 2, the D1 signals for 2 channels are multiplexed and AT
Can be transmitted by M1 line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM line signal generating method suitable for applying a plurality of digital video signals to multiplex transmission using an ATM1 line and an ATM line signal processing apparatus using the same. .

[0002]

2. Description of the Related Art ATM (Asynchronous Transfer Mode;
In a data transmission system that uses a communication line in the asynchronous transfer mode), all information is transmitted in cells, but the required service quality (error rate, etc.) is different in the part related to cell transmission, and cell conversion is performed. In doing so, there is a layer for the purpose of absorbing this difference in service quality. This layer is the ATM adaptation layer (A
AL; ATM Adaptation Layer).

5 for AAL layer protocol types
There are two types, of which type 5 is known as the most simplified type. AAL type 5 (AA
Among the protocol types, the L5 layer is the type with the smallest number of control signals added to the user information, and the layer structure is shown in FIG.

CP in the AAL5 layer structure of FIG.
The CS sublayer is a CS common part (Comm) that performs a common function that does not depend on a service among convergence sublayers (CSs) for data transfer.
on Part CS). As shown in the figure, the protocol data unit (Protocol Data) of the CPCS sublayer.
For a Unit (PDU), an 8-byte trailer is added to the CPCS payload which is user information, and then converted into a cell payload.

One cell has 48 bytes when it is formed into a payload, and each cell payload has 5 bytes of ATM.
A header is attached to make up one cell of 53 bytes. A header is attached at a rate of one cell for each of the 26 ATM cells to form a physical layer which is a data transmission format. The bit rate of this physical layer is 155.52 Mbps.

[0006]

By the way, utilizing such an ATM line, a digital video signal, for example, a D1 type digital video signal composed of so-called component signals or a D2 type digital video composed of a composite signal is used. There are some problems to be solved when transmitting signals and the like.

As is well known, the bit rate of the ATM line is 155.52 Mbps. However, since various headers and trailers different from each other are added as ATM line control signals by various ALL layers, the actual transmission capacity is It is less than 155.52 Mbps.

Even in the ALL5 layer described above in which the data amount of the control signal to be added is the smallest, the substantial bit rate is reduced to the following numerical values.

As described above, in the physical layer, a header is added at a rate of 1 cell for every 26 cells. In addition, the maximum number of bytes in the first stage of the CPCS sublayer is 2 16 (= 65536) for the payload for signal transmission, and the trailer amount and CPCS as a whole are multiples of the cell (48 bytes). It is 65568 bytes when PAD is added, but it is well known that the actual number of bytes used for transmission as a payload is 65520 bytes, and one ATM cell consists of 53 bytes, of which 5 bytes are an ATM header. Considering that there is C
The effective bit rate per stage of the PCS sublayer is 155.52 Mbps x (26/27) x (65520/65568) x (48/53) = 135.53 Mbps, and various bit rates for transmitted signals Even if the control signal is not included, the effective bit rate of the cell payload is 155.52 Mbps to 135.53 M
It will be reduced to bps.

On the other hand, of the digital video signals, for example, a D1 type digital video signal has a sampling frequency of 13.5 MHz, one pixel has a 10-bit configuration, and in addition to the luminance signal Y, a color difference signal C (Cr, Cb). Therefore, the bit rate per frame is 13.5 Mbps x 10 bits x 2 times = 270 bit rate.

In order to transmit a digital video signal of such a bit rate using an ATM line, data such as an address is added to this data, or identification data when separating into two lines. Since they must be added and transmitted, an ATM line having a total bit rate of 270 Mbps or more is required. Therefore, even if two ATM lines are used, the above-mentioned D1 type digital video signal cannot be transmitted.

A digital video signal can be transmitted by using three ATM lines, but when three ATM lines are used, the video signal is distributed over the three ATM lines, so that a luminance signal component and a color difference signal component are provided on each line. Will be divided into and mixed. In order to properly restore the mixed Y / C signals at the receiving source as needed, an additional new circuit for processing the mixed signals is required, and the number of used lines increases, such as 3 lines. And the problem that the number of bits of the identification code for distinguishing each line increases.

Further, when a video signal is bundled on a higher level line (for example, 620 Mbps, 1.2 Gbps) on the hierarchy of the transmission line, an unused line occurs when the ATM3 line is used, and the line is efficiently used. I can't plan.

The bit rate of the D2 type digital video signal is 143.2 Mbp in the NTSC system.
s, the PAL system has 177 Mbps, and thus includes the same problem as described above. Bit rates of digital video signals other than these are 135.53 Mbps
If it exceeds, the problematic points are the same as above.

In any case, as described above, D1, D
When transmitting two digital video signals, it is not desirable to use a plurality of ATM lines even if the number of lines is two in view of efficiency, and it is preferable to use the ATM1 line for transmission. At this time, if the data is compressed by using the property of the data to be transmitted, the data can be transmitted more efficiently even if the same one line is used. For example, by utilizing the correlation of video signals, a plurality of digital video signals can be multiplexed and transmitted.

Therefore, the present invention solves the above-mentioned conventional problems, and uses an ATM line signal generation method capable of accommodating as many digital video signals as possible in one ATM line and using the same. AT
An M line signal processing device is proposed.

[0017]

In order to solve the above-mentioned problems, in the ATM line signal generating method according to the present invention described in claim 1, a digital video signal is sent to an ATM line A
When transmitting using the TM adaptation layer protocol, the signal components other than the video signal component of the digital video signal are full bit so that multiple digital video signals can be multiplexed and transmitted on the same ATM line. Each video is transmitted according to the number of multiplexed digital video signals so that the video signal component can be accommodated within the number of transmission cells which can be transmitted as it is and allocated to the remaining CPCS payload occupied by the full bit transmission. The signal is compressed, and the compressed video signal component and the signal components other than the video signal are ATM
Converted to the adaptation layer data format for A
This is characterized in that the TM line signal is used.

An ATM according to the present invention described in claim 7.
In the line signal processing device, the digital video signal is transferred to the ATM.
When transmitting using the line, a compression means for compressing a plurality of video signal components of the digital video signal of the same signal form or different signal forms to a predetermined ratio, and a signal component other than the video signal component on the ATM line. Bit conversion means for performing bit conversion to shorten the bit length so as to match the signal, multiplexing means for multiplexing a plurality of compressed and bit-converted digital video signals, and these multiplexed signals It is characterized by comprising an ATM line signal converting means for converting the component into a data format of an adaptation layer for ATM to make an ATM line signal.

[0019]

For example, when converting a 525/60 series, D1 type digital video signal (270 Mbps) into an ATM line signal data format for multiplex transmission, as shown in FIG. Area (horizontal and vertical blanking interval data)
The number of cells is 5606 when all 48 bytes of one cell are used. Considering that these data areas are not subjected to compression processing, the number of cells per frame of the above digital video signal that can be transmitted by the ATM1 line is 11769 cells. Therefore, 5606 × 2CH = 11212 <11769 <5606 × 3CH = 16818 Therefore, if the data in the active area is compressed, the D1 signals for at least two channels (2CH) are sent to the ATM1.
Multiplex transmission is possible using the line. At this time, the number of cells allocated to the active area is (11769-5606 × 2) /2=278.5=279 cells per channel, so the number of cells in the active area is 18506 cells, so 279/18506 = 0.01507 = 15/1000 = 1 / 66.7 = 1/67 If compressed to above, two channels of D1 signals can be multiplexed and transmitted by the ATM1 line.

[0020]

Embodiment Next, an AT for multiplexing according to the present invention
An example of an M line signal generation method and an ATM line signal processing device using the same will be described in detail with reference to the drawings. The applicable digital video signal is an NTSC 4: 2: 2 digital video signal (D in 525/60 system).
1 type) will be described first.

FIG. 2 shows a frame structure relating to a D1 type digital video signal (hereinafter referred to as D1 signal) in the 525/60 system. The horizontal direction is the horizontal scanning direction (the number of pixels), and the vertical direction is the vertical scanning direction (line). Number). One frame is composed of an active area, which is a portion of video information, and a data area in the horizontal blanking area H.BLK and vertical blanking area V.BLK. The first half is an odd field and the second half is an even field.

In the present invention, basically, digital video signals are compressed according to the number of multiplexes so that digital video signals for a plurality of channels can be multiplex-transmitted using an ATM1 line.

A data signal (digital audio signal or other data signal) may be inserted in a signal other than the video signal. The data signals have low correlation. Therefore, it is difficult to compress these data signals unless the nature of the signals is understood, and it is better to avoid them as much as possible. On the other hand, since the video signal has a strong correlation and the property thereof is known, it is possible to compress the video signal and restore it to the original video signal without degrading the signal.

Therefore, when it is desired to compress only the video signal as much as possible to increase the multiplicity and to avoid deterioration of image quality as much as possible, compression is also performed in the data area.
In this case, compression is performed in the data area in which the characteristics of the signal contained therein are known. In a normal case, since the signal included in the horizontal blanking interval is known as a voice signal, the signal is compressed to such an extent that deterioration of the signal quality is not detected. Other uncompressed data is transmitted as full bits.

Next, a specific example of the compression process will be described. D1
It is assumed that both the signal and the D2 signal are 4: 2: 2 type signals.

(1) Example in which 525/60 system D1 signal is multiplexed into two channels In this multiplexing process, only the video signal is subject to compression. The frame structure of the D1 signal is shown in FIG. 1A. One byte has a 10-bit structure.

In the frame signal of FIG. 1A, since the horizontal blanking interval is composed of 276 bytes and the active area is composed of 1440 bytes, data of these areas is converted into 1 byte and 8 bits. After that, the cell is converted into 48 bytes, as shown in FIG. 1B. One cell consists of 48 bytes, but since various control data for reconstructing the video signal frame must be included in this, 48 bytes as a user payload are actually applied to the transmission signal. Although this is not possible, the following description will be made on the assumption that the user payload can be fully used in one cell of 48 bytes for convenience of description.

Here, the cell conversion processing in the horizontal blanking section will be described. 276 bytes × 10 bits / 8 bits = 345 bytes 345 bytes / 48 bytes = 7.2 = 8 cells Bit conversion processing and cell conversion in the same manner. When the processing is performed, a frame structure having a cell number as shown in FIG. 1B is obtained.

Here, since the transmission unit in the physical layer in the AAL5 layer is 27 cells with a header at a rate of 1 cell for every 26 cells, the unit that can be transmitted per ATM line for the video signal is , 155.52Mbps x (2 / 59.94Hz) x (1/8 bit) x (1/53) x (1/27 cells) = 453.3 = 453 Transmission unit Substantial for signal transmission included in this 453 transmission unit The user payload is 26 cells, and the multiplication of 453 transmission units by 26 cells is the total number of cells for signals that can be transmitted by the ATM1 line. Since the maximum number of cells per CPCS sublayer is 1352 cells, the minimum number of CPCS sublayers in this case is (26 cells × 453) / 1352 cells = 8.71 = 9 stages. Since there is a trailer for one cell per stage, the actual number of user payload cells per frame is 26 cells × 453-9 cells = 11769 cells / frame This video signal can be transmitted per ATM line. It is the number of cells per frame.

In FIG. 1, the data area is 8 cells × (244 + 243) lines + 45 cells × (19 lines × 2) = 5606 cells. Therefore, at least 5606 cells must be secured for the D1 signal of one channel as the data area. Must
The required number of cells for 2 channel or 3 channel multiplexing is as follows: 2CH: 5606 × 2 = 11212 <11769 3CH: 5606 × 3 = 16818> 11769. In this case, compress the data in the active area. The D1 signal within 2 channels is AT
Multiplex transmission is possible using the M1 line. At this time, the allocation to the active area is (11769 cells-5606 cells x 2CH) / 2CH = 278.5 = 279 cells per channel. Therefore, when converting the necessary compression ratio, the number of cells in the active area is 38 cells (244 + 243) lines = 18506 cells, so if the data in the active area is compressed to 279 cells / 18506 cells = 0.01507 = 15/1000 = 1 / 66.7 = 1/67 or more, D1 signals for 2 channels Can be multiplexed and transmitted through the ATM1 line.

The data of the horizontal blanking area HBLK and the vertical blanking area (19 × 2 lines) VBLK is transmitted in full bits with the 10-bit structure as it is.
In the ATM line, all signals are converted into cells and transmitted, and each cell has a byte (8 bits) structure. Therefore, signals other than video signals are converted from 10 bits to 8 bits.

This conversion process is performed using a memory. For example, as shown in FIG. 3, a memory having 10 bits in the horizontal direction and 8 bits in the vertical direction is prepared, and the 10-bit input is sequentially stored in the horizontal direction in bit units. After the input data is stored in all areas, This time, the data is read from the vertical direction. Then, the output data has an 8-bit structure. The (10-8) conversion can be performed by such a simple process.

(2) Example in which 625/50 system D1 signal is multiplexed into two channels In this case, although detailed description thereof is omitted, CPCS
By configuring the sublayer to have a minimum of 11 stages, data per one frame of the video signal can be transmitted, and the data amount is 14107 cells / frame. 4A, B
As can be seen from the figure, the number of cells in the data area is 681
Since it is 3, 6813 cells × 2CH = 13626 cells <14107 cells <6813 cells × 3CH = 20439 cells Therefore, in this case, by compressing the data in the active area, the D1 signals within 2 channels use the ATM1 line. Can be multiplexed. At this time, the allocation to the active area is (14107 cells−6813 cells × 2CH) /2CH=240.5=241 cells per channel. Therefore, when the required compression rate is converted, the number of cells in the active area is 38 cells × 288 lines × 2 = 21888 cells, so the data in the active area is 241 cells / 21888 cells = 0.0109 = 10.9 / 1000 = If compressed to 1 / 91.7 = 1/92 or more, two channels of D1 signals can be multiplexed and transmitted on the ATM1 line. The numerical values of the multiplexing process of (1) and (2) are summarized in FIG.

(3) Example of multiplexing 525/60 system D1 signal into three channels In order to multiplex two or more channels into the ATM1 line by the method described above, the data area (H-BLK, V-
Since the number of cells that can be transmitted exceeds the number of cells that can be transmitted only by the number of cells required for (BLK), the data area is also compressed. A horizontal blanking section is used as a data area to be compressed. The data signal inserted in the horizontal blanking interval is a normal audio signal, and the nature of the signal is known. Therefore, it is used as a compression ratio of 1 /
2 compression.

In this case, the number of cells in the horizontal blanking interval is half (3896/2 = 1948),
Since it is the same as the multiplexing processing of (1), its explanation is omitted and only the result is shown in FIG. As is apparent from FIG. 5, it can be seen that the horizontal blanking area is compressed to 1/2 and the video signal is also compressed accordingly, so that up to 3 channels can be multiplexed.

(4) Example of multiplexing 625/50 system D1 signal into three channels In this case, as shown in FIG. 5, the horizontal blanking area is compressed to 1/2 and the same procedure as in (4) is performed. By that
The D1 signal can be multiplexed on the TM1 line for up to 3 channels.

(5) Example of multiplexing 525/60 system D2 signal for 6 channels The D2 signal is a composite signal, and since the data amount is smaller than that of D1, it is possible to multiplex the number of channels by performing compression. It will be possible. FIG. 6A shows the frame structure of the D2 signal, and FIG. 6B shows the frame structure when this frame signal is converted into 8-byte 1 byte and then cellized in units of 48 bytes.

When the H-BLK data is compressed to 1/2, the required number of cells for the total (H-BLK + V-BLK) data area is 1948 cells / 2 + 912 cells = 1886 cells. The number of usable cells per ATM line is Since it is 11769, it becomes 1886 cells x 6CH <11769 <1886 cells x 7CH, and maximum 6 channels can be multiplexed. At this time, the number of cells allocated to the multiplexed active area is (11769 cells -1886 cells x 6CH) / 6CH = 75.5 = 76 cells The required compression ratio is 76 cells / 9740 cells = 0.0077 = 7.7 / 1000 = 1 / 129.8 = 1/130, and the horizontal blanking area per channel is By compressing the D2 signal to 1/2 and compressing the active area to 1/130 or more, the D2 signal can be multiplexed and transmitted on the maximum 6-channel ATM1 line. FIG. 8 is a summary of this content.

(6) Example in which 625/50 system D2 signal is multiplexed for four channels As is apparent from the frame structure shown in FIG. 7, the horizontal blanking area is compressed to 1/2 and the active area is also reduced. If the compression rate of 1 is set to 1/24 or more, multiplexing of up to 4 channels is possible. Details are shown in FIG.

The multiplexing examples (1) to (6) are all multiplexing examples obtained by calculating one cell as 48 bytes. In reality, a control signal for reproducing the received signal of at least about 1 byte is required. In other words, in order to reliably reproduce the received ATM line signal, it is necessary to distinguish the signal form such as D1 signal, D2 signal, 525/60 system, 625/50 system, the compression rate of the video signal and the compression rate of the audio signal. This is because it is necessary to insert various control signals (including identification signals) such as line numbers and image numbers.

These control signals are payload 4
Since it is preferable to insert it in 8 bytes, when the control signal is composed of 1 byte, the remaining number of bytes that can be used as user information is 47 bytes.

When one cell is made up of 47 bytes, the number of cells constituting one frame is slightly different from that shown in FIG. 1 or 4.
By the way, the number of cells in the vertical blanking interval in FIG. 1B is 4
When cells are formed by 7 bytes, the number becomes 46 cells, and the number of cells in the active area becomes 39 cells.

As a result, as shown in FIG. 9, 525/60
In the system D1 signal, the number of multiplexed channels is 2, and the compression ratio of the active area at that time is 1/79. Similarly, the number of multiplexed channels is 2 for the 625/50 system D1 signal.
Thus, the compression rate is 1/118. The same applies to the D2 signal, and the result is shown in FIG. 9, and the detailed description thereof is the same as that described so far, and therefore will be omitted.

The horizontal blanking area can be compressed even when the cells are formed into 47 bytes. An example thereof is shown in () in FIG. The same applies to signals of other signal forms although not shown.

In the above case, the control signal is inserted using one byte of the 48 bytes of the payload, but this control signal can be inserted in a part of the ATM cell header (5 bytes). This allows
By inserting the control signal in the payload as described above, it is possible to reduce the amount of signal transmission of the payload, and to suppress the increase in compression rate and the decrease in multiplexing.

In this case, compatibility with normal ATM line signals is lost, but in many cases, a large amount of video signals are transmitted and used in a closed environment in a broadcasting station or various studios. Under such a usage environment, a part of the ATM cell header is unnecessary, so that the control signal can be replaced there. As a result, it is possible to use the ATM line in a closed environment by changing the set value very little.

The number of multiplex channels and the compression ratio described above are examples. The digital video signals to be multiplexed should be multiplexed in the same signal form (for example, D1 signals or D2 signals), or in the state where different types of digital video signals (for example, D1 signal and D2 signal) are mixed. Is also possible.

Then, an AT for realizing the above-mentioned signal processing
An example of the M line signal processing device is shown in FIG. The same figure is shown in FIG.
The 525/60 system D1 signal shown in (4) is applied to a multiplexing example in which the horizontal blanking area is also compressed to 1/2.

Since this example is an example in which three channels are multiplexed and transmitted, three input terminals 12a,
12b and 12c are provided, each of which is a D1 signal (4:
2: 2 signals) D1a, D1b, D1c are supplied.

Digital video signals for three channels are supplied to the multiplexing means (multiplexer) 32 through the multiplexed signal processing means 20A, 20B and 20C having the same structure. Since the multiplexed signal processing means 20A to 20C have the same configuration, only 20A will be described.

The digital video signal D1a is supplied to the data separating means 22 and separated into the data of the active area and the other data (data of the data area). As is well known, a 4-byte TRS signal (Timing Reference Signal) is inserted in the D1 signal for synchronization, and a signal xyz is inserted in the last byte. In the embodiment, the active area and other data areas are separated by judging the xyz signal.

The data in the active area is compressed by the compression means 23.
And is compressed at a compression rate (1/70) as shown in FIG. The compressed data is 8 considering the cell processing.
The data is converted into bits and sequentially output to the buffer memory 28.

The data in the data area separated by the data separating means 22 is further divided into horizontal and vertical blanking intervals H.
It is separated into BLK, V.BLK data and supplied to the corresponding processing means 24, 26. The processing means 24 is means for bit-converting the signal in the vertical blanking interval from 10 bits to 8 bits. A concrete example of the bit converting means has been described above with reference to FIG. The processing means 26 is means for compressing the signal in the horizontal blanking interval, and as is clear from FIG. 5, the horizontal blanking data (data signal inserted in this interval) is compressed to 1/2. After that, it is converted into 8 bits and output.

In each case, the 8-bit active area data and the data area data are supplied to the buffer memory 28 and read out as cells in units of 48 bytes.

The multiplexed signal processing means 20A is subjected to compression and cell processing under the control of the control means 30 composed of a CPU. In the control, although not shown, corresponding signal processing is performed based on the line number, the cell number or the designated compression rate obtained from the digital video signal D1a.

The other two multiplexed signal processing means 20B, 2
The same process is performed in 0C, and the cell-compressed compressed digital video signals D1 output from each are output.
The a ', D1b' and D1c 'are multiplexed by the multiplexing means 32 into three channels. After that, a plurality of cell signals read in 48-byte units are CPCs configured as an ATM layer section.
It is supplied to the S conversion means 34, and a trailer is added and ATM cell conversion processing (53) is performed so that the AAL5 layer is formed.
Processing of a transmission header which is added at a rate of 1 every 26 ATM cells. The output is AT
The M line signal is supplied to the ATM line network 36. A main control unit 38 composed of a main CPU controls the control unit 30, the multiplexing unit 32, the CPCS conversion unit 34, and the like.

FIG. 11 shows A input from the ATM line network 36.
A specific example of the video signal conversion device 50 for inversely converting a TM line signal into a D1 signal of a plurality of channels will be shown. The ATM line signal is transmitted by the CPCS inverse conversion means 52 to the transmission data format A.
The transmission header is deleted from the TM line signal to restore the data for every 26 cells, the ATM header is further removed to make 48 bytes, and then the cell data of the CPCS sublayer is obtained.

The cell data is supplied to the demultiplexer 54 and the 3-channel compressed digital video signal D1 is supplied.
It is separated for each of a ', D1b', and D1c '. Thereafter, demultiplex signal processing means 60A, 60 having the same configuration
B, 60C and the original digital video signal D1
a, D1b, D1c.

A specific example of the demultiplex signal processing means 60A will be described. First, the buffer memory 5
At 6, the data is separated in cell units, and then the active area and the data area are separated. The data of the separated active area is used as the active area decoding means 6
In 2 the data decompression process is performed and the decompressed 8-bit length data is converted into 10 bits.

The signal of the separated horizontal blanking interval is also subjected to data expansion processing in the decoding means 64,
After that, it is converted to a 10-bit length. In the remaining vertical blanking interval signal, 8 bits are inversely converted into 10 bits by the bit conversion means 66. This reverse conversion process is the reverse of the process shown in FIG. 3, and reads 8-bit data input in the vertical direction from the horizontal direction and converts it into 10-bit data (full-bit data).

In each case, the video signal returned to 10 bits and the signal in the blanking interval are further supplied to the buffer memory 68 to be rearranged into the original frame signal so that the frame structure can be obtained, and then the prescribed value is set. It is output under the output conditions. This output digital video signal is D1
This is the signal D1a. Such demultiplex processing is performed under the intervention of the CPU 70 which is the control means.

Other demultiplex signal processing means 60
Similar demultiplexing processing and data conversion processing are performed in B and 60C, and D1 signals D1b and D1c for each framed channel are output. The conversion process to this video signal is controlled by the main CPU 72.

Regarding the D1 signal and the D2 signal of the 625/50 system, an ATM line signal multiplexed by the signal processing system as shown in FIG.
It can be easily understood that the original digital video signal can be reproduced for each channel from the TM line signal.

[0064]

As described above, according to the ATM line signal generating method of the present invention, a plurality of digital video signals D1 and D2 can be compressed and accommodated in one ATM line.

According to this, a plurality of digital video signals can be multiplexed on the ATM1 line and transmitted at the same time, so that a transmission system excellent in economic efficiency can be constructed. Especially in the case of a closed transmission system such as a broadcasting station or a studio, a part of the ATM header can be replaced with a control signal for the transmission signal, and the user payload can be used to the full capacity, so that a user who can accommodate one ATM line can be accommodated. The amount of information is large, efficient data transmission can be realized, and the efficiency of ATM line utilization can be improved. Further multiplexing is A
Since the TM1 line is used as a unit, the line can be efficiently used without waste of the line even when the lines are bundled and used in view of the hierarchy of the transmission line.

Therefore, the present invention is extremely suitable when applied to a transmission system for transmitting a so-called D1 type or D2 type digital video signal using an ATM line.

[Brief description of drawings]

FIG. 1 is a diagram showing a frame configuration example of a 525/60 system D1 signal according to the present invention and a frame configuration example when a cell is formed.

FIG. 2 is a diagram showing a frame configuration example of a 525/60 system D1 signal.

FIG. 3 is a diagram illustrating an example of bit conversion processing.

FIG. 4 is a diagram showing an example of a frame configuration of a 625/50 system D1 signal according to the present invention.

FIG. 5 is a diagram showing various data related to the D1 signal when performing cell multiplexing in units of 48 bytes and performing multiplexing processing.

FIG. 6 is a diagram showing a frame configuration example of a 525/60 system D2 signal according to the present invention.

FIG. 7 is a diagram showing a frame configuration example of a 625/60 system D2 signal according to the present invention.

FIG. 8 is a diagram showing various data related to a D2 signal when a cell is formed in units of 48 bytes and a multiplexing process is performed.

FIG. 9 is a diagram showing various data related to the D1 signal and the D2 signal when multiplexing is performed by converting cells into units of 47 bytes.

FIG. 10 is a system diagram showing an example of an ATM line signal processing device.

FIG. 11 is a system diagram showing an example of an ATM line signal inverse processing device.

FIG. 12 is a diagram showing a configuration example of ATM adaptation layer type 5.

[Explanation of symbols]

20A, 20B, 20C Multiplexed signal processing means 32 Multiplexing means 34 CPCS conversion means 60A, 60B, 60C Demultiplexed signal processing means

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Claims (7)

[Claims] 1. A digital video signal is transmitted through an ATM line A.
When transmitting using the TM adaptation layer protocol, the signal components other than the video signal component of the digital video signal are full-bit so that multiple digital video signals can be multiplexed and transmitted on the same ATM line. Each video is transmitted according to the number of multiplexed digital video signals so that the video signal component can be accommodated within the number of transmission cells which can be transmitted as it is and allocated to the remaining CPCS payload occupied by the full bit transmission. A signal is compressed, and the compressed video signal component and signal components other than the above video signal are converted into an ATM adaptation layer data format to form an ATM line signal. Method. 2. The AT according to claim 1, wherein compression processing is also applied to signal components other than the video signal.
M line signal generation method. 3. The ATM line signal generating method according to claim 1, wherein the signals other than the video signal to be compressed are signals in a horizontal blanking interval. 4. The ATM line signal generating method according to claim 1, wherein the plurality of digital video signals are signals of the same form and are signals of the form of component signals or composite signals. 5. The digital video signal according to claim 1, wherein the plurality of digital video signals are signals of different types, that is, a signal having a signal form of a component signal and a signal having a signal form of a composite signal. ATM line signal generation method. 6. The ATM line signal generating method according to claim 1, wherein a type 5 adaptation layer to which the smallest number of control signals are added is used as the ATM adaptation layer. 7. A compression means for compressing a plurality of video signal components of the digital video signals of the same signal type or different signal types at a predetermined ratio when transmitting the digital video signal using an ATM line. Bit conversion means for performing bit conversion for shortening the bit length of signal components other than video signal components so as to match the ATM line signal, and multiplexing for multiplexing a plurality of compressed and bit-converted digital video signals An ATM line signal processing device comprising: an ATM line signal converting unit for converting the multiplexed signal components into an ATM adaptation layer data format to form an ATM line signal.