JPH0821549B2 - High frequency CVD method - Google Patents
High frequency CVD methodInfo
- Publication number
- JPH0821549B2 JPH0821549B2 JP1019133A JP1913389A JPH0821549B2 JP H0821549 B2 JPH0821549 B2 JP H0821549B2 JP 1019133 A JP1019133 A JP 1019133A JP 1913389 A JP1913389 A JP 1913389A JP H0821549 B2 JPH0821549 B2 JP H0821549B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- substrate
- cvd method
- high frequency
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005229 chemical vapour deposition Methods 0.000 title claims description 11
- 239000000758 substrate Substances 0.000 claims description 31
- 239000004065 semiconductor Substances 0.000 claims description 22
- 238000010438 heat treatment Methods 0.000 claims description 11
- 238000006243 chemical reaction Methods 0.000 claims description 10
- 230000001678 irradiating effect Effects 0.000 claims 1
- 239000007789 gas Substances 0.000 description 16
- 239000010408 film Substances 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 239000011521 glass Substances 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000005979 thermal decomposition reaction Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、薄膜トランジスタ等を製造する際に用いら
れる各種の膜の化学気相成長方法（Chemical Vapour De
position）に関するものである。The present invention relates to a chemical vapor deposition method (Chemical Vapor Deposition) for various films used in manufacturing thin film transistors and the like.
position).
薄膜トランジスタ等の製造の際には、SiO2やシリコン
層などを堆積させて加工する工程が必須である。その場
合、CVD法が多用される。従来のCVD法は、生成膜の原料
となる反応ガスを電気炉などで熱分解したり（熱分解CV
D法）、低い気圧の反応ガス中に高周波電力を印加して
プラズマを生成する事により反応を起こさせ基板上に膜
を生成している（プラズマCVD法）。When manufacturing a thin film transistor or the like, a step of depositing and processing SiO 2 or a silicon layer is essential. In that case, the CVD method is often used. In the conventional CVD method, the reaction gas that is the raw material of the formed film is thermally decomposed in an electric furnace or the like (thermal decomposition CV
D method), a high-frequency power is applied to a reaction gas at a low atmospheric pressure to generate plasma, thereby causing a reaction to form a film on a substrate (plasma CVD method).
しかしながら、良質の生成膜を熱分解CVD法により堆
積させようとすると、1000度程度の高温まで基板全体を
加熱することが必要である。そのために、低耐熱性のガ
ラスなどを基板としたSOI（Silicon On Insulatior）な
どには良質の膜を堆積させることができない。プラズマ
CVD法を用いると、比較的低温で良質の膜を堆積できる
が、基板がプラズマに晒されるために、その表面が損傷
を受ける。However, in order to deposit a good quality film by the thermal decomposition CVD method, it is necessary to heat the entire substrate to a high temperature of about 1000 degrees. Therefore, it is not possible to deposit a good quality film on SOI (Silicon On Insulatior) or the like using a substrate of low heat resistance glass or the like. plasma
Although the CVD method can deposit a good quality film at a relatively low temperature, the surface of the substrate is damaged because it is exposed to plasma.
〔発明が解決しようとする課題〕 本発明は、以上述べた従来のCVD法の問題点を解決
し、低耐熱性絶縁基板の半導体層上に、選択的に熱分解
により生成した膜を、損傷を与えずに堆積させることが
可能な高周波CVD法を提供することを課題とする。[Problems to be Solved by the Invention] The present invention solves the problems of the conventional CVD method described above, and damages a film selectively generated by thermal decomposition on a semiconductor layer of a low heat resistant insulating substrate. An object of the present invention is to provide a high-frequency CVD method capable of depositing without giving.
上記した問題点を解決するため、本発明では、絶縁性
基板上に選択的に半導体層を設け、熱反応性ガス中に該
基板を設置し、該絶縁性基板の耐熱温度以下の温度に加
熱し、さらに、高周波数の半導体層のみに吸収される電
波を照射して該半導体層を選択的に加熱する事により、
該熱反応性ガスを該半導体層の表面上で選択的に熱化学
反応させ、堆積膜を生成する。In order to solve the above problems, in the present invention, a semiconductor layer is selectively provided on an insulating substrate, the substrate is placed in a heat-reactive gas, and the substrate is heated to a temperature not higher than the heat resistant temperature of the insulating substrate. In addition, by radiating a radio wave absorbed only in the high frequency semiconductor layer to selectively heat the semiconductor layer,
The thermally reactive gas is selectively thermochemically reacted on the surface of the semiconductor layer to form a deposited film.
第１図は本発明の主構成要素による原理を説明した模
式図で、１は絶縁性基板、２は半導体層、３は加熱部、
４は高周波電波、５は熱反応性ガスである。本発明は、
半導体のキャリア濃度が温度に対して指数関数的に増加
する性質、及び、高周波電波が選択的に低抵抗層中に吸
収される性質を利用する。まず、半導体層２を堆積させ
た絶縁性基板１を加熱部３により絶縁性基板の耐熱温度
以下で加熱し、半導体のキャリア濃度が温度に対して指
数関数的に増加する性質を利用して、半導体層２中に充
分なキャリアが存在する状態にする。この場合、もしも
半導体層中に室温で充分な量のキャリアが存在している
場合には加熱の必要さえもない。この状態で、熱反応性
ガス５を導入して、高周波電波４を照射する。絶縁性基
板１と半導体層２とでは高周波電波の吸収係数に大きな
差があるから、電波はほとんど半導体層２中で吸収さ
れ、半導体層２のみが選択的に加熱される。半導体のキ
ャリア濃度は温度に対して指数関数的に増加するから、
正帰還がかかって、さらに電波の吸収係数が増加し、加
熱される。その結果、半導体層２と接触している熱反応
性ガスが半導体層２の表面のみで熱分解するから、そこ
だけに生成膜を堆積させることができる。FIG. 1 is a schematic diagram for explaining the principle of the main constituent elements of the present invention. 1 is an insulating substrate, 2 is a semiconductor layer, 3 is a heating part,
Reference numeral 4 is a high frequency radio wave, and 5 is a heat-reactive gas. The present invention
The property that the carrier concentration of the semiconductor exponentially increases with temperature and the property that high-frequency radio waves are selectively absorbed in the low resistance layer are used. First, the insulating substrate 1 on which the semiconductor layer 2 is deposited is heated by the heating unit 3 below the heat resistant temperature of the insulating substrate, and the property that the carrier concentration of the semiconductor exponentially increases with respect to the temperature is used. Sufficient carriers are present in the semiconductor layer 2. In this case, heating is not even necessary if there is a sufficient amount of carriers in the semiconductor layer at room temperature. In this state, the heat reactive gas 5 is introduced and the high frequency radio wave 4 is irradiated. Since there is a large difference in absorption coefficient of high frequency radio waves between the insulating substrate 1 and the semiconductor layer 2, most of the radio waves are absorbed in the semiconductor layer 2 and only the semiconductor layer 2 is selectively heated. Since the semiconductor carrier concentration increases exponentially with temperature,
Positive feedback is applied, and the absorption coefficient of radio waves is further increased, and heating is performed. As a result, the thermally reactive gas in contact with the semiconductor layer 2 is thermally decomposed only on the surface of the semiconductor layer 2, so that the produced film can be deposited only there.
本発明の構成は、高周波電源を用いたプラズマCVD法
と類似している部分がある。しかしながら、プラズマCV
D法は低気圧のガスプラズマ中でしか反応を起こさせる
ことはできないのに対し、本発明によるCVD法は熱反応
性ガスの気圧に関して何の制限もない点が大きく異なっ
ている。そのため、プラズマによる損傷無しに良質の膜
を堆積することが可能である。The structure of the present invention has a part similar to the plasma CVD method using a high frequency power supply. However, plasma CV
The method D is capable of causing a reaction only in a low pressure gas plasma, while the CVD method according to the present invention is greatly different in that there is no limitation on the pressure of the thermally reactive gas. Therefore, it is possible to deposit a good quality film without damage by plasma.
〔実施例〕 第２図は、本発明の具体的な実施例を示した断面図
で、石英ガラス等でできた反応容器11の外側に、加熱部
３、および、高周波コイル９を設け、その高周波コイル
９に高周波電源10をつなぐ、反応容器11には、ガス導入
口12とガス排出口13を設ける。さらに、低耐熱性ガラス
基板６の上にCVD SiO2層７とシリコン層８を堆積させ
た基体を設置する。加熱部３によって、低耐熱性ガラス
基板６の耐熱温度まで基体を加熱する。その状態で熱反
応性ガス５を反応容器11内に導入し、さらに、高周波電
源10によって高周波コイル９の内部に高周波電波を発生
させ、基板上の全シリコン層が加熱され、その全面に生
成膜が堆積するように基板を走査する。[Embodiment] FIG. 2 is a cross-sectional view showing a concrete embodiment of the present invention, in which a heating part 3 and a high frequency coil 9 are provided outside a reaction vessel 11 made of quartz glass or the like. A high frequency power source 10 is connected to the high frequency coil 9, and a reaction vessel 11 is provided with a gas inlet 12 and a gas outlet 13. Further, a substrate on which the CVD SiO 2 layer 7 and the silicon layer 8 are deposited is placed on the low heat resistant glass substrate 6. The heating unit 3 heats the substrate to the heat resistant temperature of the low heat resistant glass substrate 6. In that state, the heat-reactive gas 5 is introduced into the reaction vessel 11, and the high-frequency power source 10 generates high-frequency radio waves inside the high-frequency coil 9 to heat all the silicon layers on the substrate and to form a film on the entire surface. The substrate is scanned so that
第３図は、本発明の別の実施例を示した断面図であ
る。インピーダンス整合器15を有する空胴共振器14内
に、石英ガラス等でできた反応容器11を設ける。反応容
器11には、ガス導入口12とガス排出口13を設ける。さら
に、導波路16と高周波電源10をつなぎ、第２図で説明し
た基体をその上に設置した状態で反応容器11の内部で走
査することが可能な加熱部３を設置する。低耐熱性ガラ
ス基板５の上にCVD SiO2層７とシリコン層８を堆積さ
せた基体を加熱部３上に設置する。以下、前述の実施例
と同様に、加熱部３によって、低耐熱性ガラス基板６の
耐熱温度まで基体を加熱する。その状態で熱反応性ガス
５を反応器11に導入し、さらに、高周波電源10によって
空胴共振器14の内部に高周波電波を発生させ、基板上の
全シリコン層が加熱され、その全面に生成膜が堆積する
ように基板を走査する。FIG. 3 is a sectional view showing another embodiment of the present invention. A reaction vessel 11 made of quartz glass or the like is provided in a cavity resonator 14 having an impedance matching device 15. The reaction vessel 11 is provided with a gas inlet 12 and a gas outlet 13. Further, the waveguide 16 and the high frequency power source 10 are connected to each other, and the heating unit 3 capable of scanning inside the reaction vessel 11 is installed with the substrate described in FIG. A substrate on which a CVD SiO 2 layer 7 and a silicon layer 8 are deposited on a low heat resistant glass substrate 5 is placed on the heating unit 3. Thereafter, as in the above-described embodiment, the heating unit 3 heats the base to the heat resistant temperature of the low heat resistant glass substrate 6. In that state, the heat-reactive gas 5 is introduced into the reactor 11, and high-frequency power is generated by the high-frequency power source 10 inside the cavity resonator 14 to heat the entire silicon layer on the substrate and generate it on the entire surface. The substrate is scanned so that the film is deposited.
本発明によれば、低価格で入手できる低耐熱性ガラス
基板を用いたSOI（Silicon On Insulator）上に高品質
のCVD膜を堆積できるから、高性能・大面積のSOIデバイ
スを低価格で製造することが可能となる。According to the present invention, a high quality CVD film can be deposited on an SOI (Silicon On Insulator) using a low heat resistant glass substrate that can be obtained at a low price, so a high performance and large area SOI device can be manufactured at a low price. It becomes possible to do.
第１図は本発明の原理を説明する模式図、第２図と第３
図は本発明の実施例を示す断面図である。 １……絶縁性基板、２……半導体層、３……加熱部、４
……高周波電波、５……熱反応性ガス、６……低耐熱性
ガラス基板、７……CVD SiO2膜、８……シリコン層、
９……高周波コイル、10……高周波電源、11……反応容
器、12……ガス導入口、13……ガス排出口、14……空胴
共振器、15……インピーダンス整合器、16……導波路。FIG. 1 is a schematic diagram for explaining the principle of the present invention, FIG. 2 and FIG.
FIG. 1 is a sectional view showing an embodiment of the present invention. 1 ... Insulating substrate, 2 ... Semiconductor layer, 3 ... Heating part, 4
...... High frequency radio wave, 5 ...... Heat reactive gas, 6 ...... Low heat resistant glass substrate, 7 ...... CVD SiO 2 film, 8 ...... Silicon layer,
9 ... High frequency coil, 10 ... High frequency power supply, 11 ... Reaction vessel, 12 ... Gas inlet, 13 ... Gas outlet, 14 ... Cavity resonator, 15 ... Impedance matching device, 16 ... Waveguide.
Claims (1)
熱反応性ガス中に該基板を設置し、該絶縁性基板の耐熱
温度以下の温度に加熱し、さらに、高周波数の半導体層
のみに吸収される電波を照射して該半導体層を選択的に
加熱することにより、該熱反応性ガスを該半導体層の表
面上で選択的に熱化学反応させ、堆積膜を生成すること
を特徴とする高周波CVD法。1. A semiconductor layer is selectively provided on an insulating substrate,
The substrate is placed in a heat-reactive gas, heated to a temperature not higher than the heat-resistant temperature of the insulating substrate, and the semiconductor layer is selectively irradiated by irradiating radio waves absorbed only by a high-frequency semiconductor layer. A high-frequency CVD method characterized in that by heating, the thermally reactive gas is selectively subjected to a thermochemical reaction on the surface of the semiconductor layer to form a deposited film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1019133A JPH0821549B2 (en) | 1989-01-27 | 1989-01-27 | High frequency CVD method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1019133A JPH0821549B2 (en) | 1989-01-27 | 1989-01-27 | High frequency CVD method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02199822A JPH02199822A (en) | 1990-08-08 |
| JPH0821549B2 true JPH0821549B2 (en) | 1996-03-04 |
Family
ID=11990967
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1019133A Expired - Lifetime JPH0821549B2 (en) | 1989-01-27 | 1989-01-27 | High frequency CVD method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0821549B2 (en) |
-
1989
- 1989-01-27 JP JP1019133A patent/JPH0821549B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02199822A (en) | 1990-08-08 |
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