JPH082184B2 - PWM inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention is a PWM control from a DC power supply by duty ratio control.
(Pulse width modulation) PWM inverter for obtaining rectangular wave, especially switch for alternately inverting and applying polarity of DC voltage by duty ratio control to both ends of main circuit consisting of series circuit of main winding and resistor A PWM inverter having means.

More specifically, the present invention relates to a PWM inverter in which on / off control of the switching means is realized by a saturable transformer using a saturable magnetic core.

(Prior Art) In a conventional switching power supply device that obtains a sine wave (AC) output or a stable DC output from a DC power supply by controlling the duty ratio of a switching element, the switching control of the switching element is conventionally performed by an integrated circuit or the like. A pulse width control circuit composed of an electronic circuit generates a pulse-width-modulated control signal with a constant period, and a semiconductor element or the like power-amplifies this control signal. The amplified control signal turns on / off the switch element. It is done by controlling (BDBedf
Ord et.al., 1964, John Wiley & Sons, Inc. “P
rinciples of Inverter Circuits "PP.310-313).

(Problems to be solved by the invention) Therefore, not only is the configuration of the pulse width control circuit and the switch element drive circuit complicated, but when the switching frequency is increased, the power loss of the switch element drive circuit increases, etc. There was a flaw.

In order to solve these problems, the present invention provides a PWM inverter that uses a saturable transformer including a saturable magnetic core in a pulse width control circuit, has an extremely simple circuit configuration, and has low power loss in a switch element and its drive circuit. The purpose is to

Another object of the present invention is to provide a semiconductor switch having a main circuit composed of a series circuit of a main winding and a resistor, and applying a DC voltage to the both ends of the main circuit by alternately inverting the polarity by duty ratio control. It is to provide a PWM inverter having means.

Still another object of the present invention is to provide a PWM inverter in which on / off control of the semiconductor switching means is performed by a saturable transformer using a saturable magnetic core.

(Embodiment) FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, half-bridge connected complementary FETs 10 and 11 are connected in series to two DC power supplies 1 and 2 connected in series. The connection point of both DC power supplies 1 and 2 is grounded to the ground potential. The sources and gates of both FETs 10 and 11 are commonly connected.

The saturable magnetic core 3 having a single closed magnetic circuit has a drive winding 3
0, main winding 31 and control winding 32 are provided, and drive winding 30
Is connected between the gate and source of FET10 and FET11, and between the source A of FET10 and FET11 and the ground (ground) A ', a main circuit consisting of a series circuit of a main winding 31 and a resistor 5 is connected. There is. A control circuit 7 is connected to the control winding 32 through an AC blocking element 6 such as a high resistance or a choke coil. The element 6 blocks alternating current having a frequency corresponding to the switching frequency of the FETs 10 and 11. The polarity of each winding is shown by a black dot. A load 4 is connected to a point A, which is a connection point of the FET source, via a reactor (not shown). FETs 10 and 11 as described below
Is alternately on / off controlled such that when one is on, the other is off.

During operation, as shown in FIG. 2a, the voltage V1 of the DC power supply 1 is applied to the main winding 31 through the resistor 5 during the time T0 to T1 when the FET 10 is on and the FET 11 is off (waveform b in FIG. 2). At this time, the magnetic flux in the magnetic core 3 due to the current flowing through the main winding 31
It increases as in FIG. 2c. Where the current in the control winding 32
Ic is assumed to be substantially zero. At this time, the drive winding 30
The ON state of the FET 10 is held by the voltage induced in the FET.

When the magnetic flux of the magnetic core 3 reaches the saturation value Φs at time T1, the inductance of the main winding 31 sharply decreases and the FET1
Due to the gate-source capacitance of 0 and the saturation inductance of the drive winding 30, the current of the drive winding 30 and the gate-source voltage of the FET 10 generate transient oscillation. Therefore, FE
A pulse current flows from the gate of T10 to the drive winding 30,
Since the electric charge stored in the gate-source capacitance of is rapidly released, the FET 10 is turned off.

When the FET 10 is turned off, the energy accumulated in the magnetic core 3 is given as a current to the gate-source capacitance of the FET 11 by the transient current flowing through the drive winding 30 at the time of turning off. As a result, the FET 11 turns off because its gate voltage becomes forward biased. When the FET 11 is turned on, the voltage V2 of the DC power supply 2 is applied to the main winding 31 through the resistor 5.

Similarly to the above, the magnetic flux in the magnetic core 3 decreases from the positive saturation value Φs according to the current flowing in the main winding 31, as shown in FIG. 2c. When the magnetic flux reaches the negative saturation value −Φs at time T2, the FET1 operates by the same mechanism as described above.
1 turns off and FET10 turns on. That is,
Commutation from FET11 to FET10 occurs. This commutation operation is then repeated at a predetermined cycle.

As mentioned previously, in the circuit of FIG.
The commutation from T to the other FET is performed by a transient oscillating current due to the series circuit of the saturation inductance of the magnetic core 3 and the capacitance between the gate and the source of each FET. In some cases, since the capacity is small, it may be difficult to perform commutation. In such cases,
Commutation is facilitated by adding a capacitor between the gate and source of the FET.

At this time, assuming that the voltages V1 and V2 of the positive power supply 1 and the negative power supply 2 are equal, the voltage applied to the winding 31 and the exciting current are different between when the FET 10 is on and when the FET 11 is on. Since the condition (1) is simply opposite in polarity, the magnetization speed (slope of the straight line shown in FIG. 2c) is also equal in value only by reversing the polarity. Therefore, the time when the FET 10 is on τ1 (the magnetic flux is negative saturation flux −Φs to positive saturation flux Φs
Time to reach FET) and the time when the FET 11 is on τ2 (on the contrary, the magnetic flux is from positive saturation flux Φs to negative saturation flux −Φs
2), the output waveforms of the main winding 31 and the resistor 5 at both ends of the series circuit become a rectangular wave in which the positive period and the negative period are congruent, as shown in FIG. 2B.

Next, when the control current Ic is applied from the control circuit 7 to the control winding 32 in the black circle direction (direction having the same polarity as the black circle of the main winding 31), when the FET 10 is on, the main winding 31 Since the magnetization direction (direction that changes the magnetic flux from the negative saturation magnetic flux −Φs to the positive saturation magnetic flux Φs direction) by the voltage and the excitation current given by the control current Ic is the same direction, the control current Ic is the same. Will promote the magnetization provided by the main winding 31. Therefore, the magnetic flux is a negative saturation flux −
Magnetization speed that changes from Φs to the direction of positive saturation flux Φs,
That is, the magnetization gradient is as shown in FIG.
The steepness is steeper than that when the control current is zero, and therefore the voltage of the main winding 31 is smaller than that when the control current is zero.
It will be higher by Vr. Therefore, the saturation flux with negative magnetic flux −Φs
The time τ1 for reaching the positive saturation magnetic flux Φs from is also short, as shown in FIG. 3c.

On the contrary, when the FET 11 is turned on, it depends on the magnetization direction (direction of changing the magnetic flux from the positive saturation magnetic flux Φs to the negative saturation magnetic flux −Φs direction) and the control current Ic by the voltage and the exciting current applied from the main winding 31. Since the magnetization direction is opposite, the control current Ic hinders the magnetization applied from the main winding 31. Therefore, the magnetization speed that changes the magnetic flux from the positive saturation magnetic flux Φs to the negative saturation magnetic flux −Φs direction, that is,
As shown in FIG. 3b, the gradient of the magnetization becomes gentler than the gradient when the control current shown in FIG. 2c is zero. Therefore, the voltage of the main winding 31 also becomes zero when the control current is zero. Compared to
Vr is lowered. Therefore, the time τ2 for the magnetic flux to reach the negative saturation magnetic flux −Φs from the positive saturation magnetic flux Φs also becomes long as shown in FIG. 3c.

As described above, when the control current Ic is supplied to the embodiment circuit of FIG. 1 from the direction of the black circle of the control winding 32, the time τ1 for which the FET 10 is on decreases and the time τ2 for which the FET 11 is on increases. So, FET10 is on time τ1 and FET11 is on time τ2
And the ratio, that is, the duty ratio, is controlled by the control current Ic. Further, as will be easily understood, when the direction of the control current Ic is reversed, the time τ1 for which the FET 10 is on increases and the on time τ2 for the FET 11 decreases. Thus, depending on the polarity of the control current Ic, the duty ratio can be controlled around 50% either in the increasing direction or in the decreasing direction. Also, as is clear, the control current Ic
From 50Hz to 60Hz, oscillation frequency of this circuit 100kHz
If the frequency of the alternating current is sufficiently lower than that of AC, the duty ratio is controlled accordingly. Therefore, if the control current Ic is changed in a sine wave shape, a sine wave output voltage can be obtained.

As described above, in this embodiment, when the control current Ic is applied from the control winding 32, the main winding 31 is magnetized by the main winding due to the magnetizing force determined according to the magnitude of the control current Ic. A half cycle that promotes and a half cycle that prevents magnetization by the main winding occur, and a difference occurs between the time τ1 when the FET 11 is on and the time τ2 when the FET 10 is on, and the duty ratio is controlled.

More accurate sine wave (AC) by the circuit of the first embodiment
In order to obtain the output, the control circuit 7 detects and amplifies the deviation of the output voltage from the reference voltage of the sine wave, and controls the current Ic to be given to the control winding 32 by the amplified signal. A rectangular wave output voltage whose pulse width is modulated can be obtained, and this can be smoothed by a smoothing circuit including a reactor and a capacitor.

FIG. 4 is a circuit diagram showing another embodiment of the present invention.
In FIG. 1, in order to simplify the explanation, as FET10 and FET11, complementary FETs connected in a half bridge are used.
We have described an example in which a drive winding connected between the gate and source of these FETs is used in common for both FETs.

On the other hand, in FIG. 4, four FETs 10 to 13 are used in a full bridge connection. The drive windings of each FET are independently wound around the magnetic core 3 as shown by reference numerals 30 and 33 to 35 in the figure, and are individually connected between the gate and the emitter of each FET. In Figure 4, a pair of FETs on opposite sides of the bridge, FET 10.13 and FET
11, 12 are alternately and simultaneously controlled to be turned on and off. Other configurations and operations are the same as those of the embodiment shown in FIG.
It is obvious that the present invention can be easily applied to a push-pull circuit or the like.

FIG. 5 shows still another embodiment in which the present invention is applied to a stabilized DC power supply device. Reference numerals 8 and 9 denote elements (a pair of resistors or capacitors) for dividing the voltage of the DC power source 1. When the FET10 is on, the black dot side of the main winding 31
That is, the positive voltage of the power source 1 is applied to the point A, and the voltage obtained by dividing the voltage of the power source 1 by the voltage dividing elements 8 and 9 (voltage at the point A ′) is applied to the other terminal through the resistor 5.
In other words, the voltage dividing element 8 is connected to the series circuit of the main winding 31 and the resistor 5.
The voltage across both ends of is applied.

Since the flywheel diode 15 is conducting when the FET 10 is off, the point A on the black dot side of the winding 31 has 0 potential, and the other terminal A ′ has the power supply 1 as described above.
The voltage divided by the voltage dividing elements 8 and 9 is applied through the resistor 5. Therefore, the main winding 31 and the resistor 5
The voltage across the voltage dividing element 9 is applied to the main circuit composed of the series circuit of. Therefore, the same rectangular wave voltage as that shown in FIG. 2B is applied to the main winding 31 through the resistor 5. As is apparent, the flywheel diode 15 of FIG. 5 functions as a kind of semiconductor switch.

When a control current is applied to the control winding 32 from the control circuit 7, the on / off time ratio of the FET 10 changes due to the same reason as described above with reference to FIG. The PWM rectangular wave is shown in Fig. 3d. When this rectangular wave is averaged by the smoothing circuit including the reactor 13 and the capacitor 14, an output voltage proportional to the control current is obtained across the capacitor 14.

Therefore, if the control circuit 7 detects and amplifies the deviation of the output voltage with respect to the reference (DC or AC) voltage and adjusts the current to be applied to the control winding 32 based on the amplified signal, it is stabilized (DC or AC). ) Output voltage is capacitor 14
Obtained at both ends of.

In order to make the explanation easy to understand, the present invention has been described above with reference to a buck type DC-to-DC convert power supply device.
er or stabilized DC power source), but other buck-boost type DC stabilized power supplies (buck
-Boost type DC-to-DC converter), boost type DC stabilized power supply (boost type DC-to-DC converter),
Forward type DC-t
Those skilled in the art will understand that it can be easily applied to an o-DC converter) or the like.

As is clear from the above description, by using the power supply device using the saturable magnetic core and the semiconductor switch according to the present invention, it is possible to realize a power supply device by switching, which has been complicated in the past, with a simple device. As the semiconductor switch, a transistor, a gate turn-off thyristor, etc. can be used in addition to the above-mentioned FET.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. Second
FIG. 3 and FIG. 3 are waveform time charts for explaining the operation of the PWM inverter of FIG. 4 and 5 are circuit diagrams showing other embodiments of the present invention. 1-2: DC power supply, 3 ... saturable magnetic core, 4 ... load,
5 ... Resistance, 6 ... AC component blocking element, 7 ... Control circuit, 10-11 ... FET, 30 ... Drive winding, 31 ... Main winding, 3
2 ... Control winding

Claims (7)

[Claims] 1. A saturable magnetic core having a main winding, a control winding, and at least one drive winding wound in one closed magnetic circuit, and a saturable magnetic core connected in series with the main winding and having first and second ends at both ends. A resistor forming a main circuit which is used as two output terminals, one terminal of each of which is connected to the first output terminal, and another terminal of each of which is connected to a DC power supply terminal of one polarity and an opposite polarity, and A pair of switch elements having a high impedance control terminal with respect to the terminals and a control circuit means for supplying a control current to the control winding are provided, and both ends of each drive winding have one terminal of each switch element and its control. A PWM inverter characterized in that the pair of switch elements are alternately opened and closed in response to the saturation of the saturable magnetic core, each of which is connected to a terminal. 2. The PWM inverter according to claim 1, wherein the pair of switch elements are semiconductor switch elements. 3. The PWM inverter according to claim 1, wherein the output waveform generated at both ends of the main circuit is taken out through a smoothing circuit. 4. The PWM inverter according to claim 1, wherein the control current is a direct current having a constant value. 5. The PWM inverter according to claim 1, wherein the control current is a sine wave alternating current. 6. A first current path composed of first and second switch terminal-equipped switch elements connected in series in a forward direction with respect to a DC power supply terminal, and connected in series in a forward direction with respect to the DC power supply terminal. Done third
And a second current path formed of a switch element with a fourth control terminal, a connection point of the first and second switch elements, and a connection point of the third and fourth switch elements as first and second output terminals. , A main circuit consisting of a series circuit of a main winding and a resistor connected between them, one terminal of each of the first to fourth switch elements, and a control terminal of high impedance with respect to this terminal. A connected drive winding, a saturable magnetic core in which the main winding and the drive winding are wound in one closed magnetic path, a control winding wound in the saturable magnetic core, and the control winding A PWM inverter having control circuit means for supplying a control current, wherein each pair is alternately controlled to be opened and closed with the first and third switch elements and the second and fourth switch elements as a pair. 7. A pair of direct current power supply terminals connected in series, a semiconductor switch element with a high-impedance control terminal in the forward direction and a diode in the reverse direction, and a series circuit of a main winding and a resistor. A main circuit connected between an intermediate potential point of the DC power supply terminal and a connection point between the switch element and a diode, and a saturable magnetic core having one closed magnetic path around which a main winding of the main circuit is wound, A drive winding wound around one closed magnetic circuit of the saturable magnetic core and having both ends thereof connected to one terminal of the switch element and a control terminal having high impedance with respect to the one terminal; A control winding wound around two closed magnetic paths, and a control circuit means for supplying a control current to the control winding. In response to saturation of the saturable magnetic core, a saturation inductance of the drive winding and the switch. element The transient oscillation current by the capacitance between the control terminal and the first terminal, the switching element and the diode is alternately turned on, PWM inverter, characterized in that the off control.