JPH0823052A - Substrate for thick film hybrid IC with lead terminal - Google Patents

Substrate for thick film hybrid IC with lead terminal

Info

Publication number
JPH0823052A
JPH0823052A JP6154848A JP15484894A JPH0823052A JP H0823052 A JPH0823052 A JP H0823052A JP 6154848 A JP6154848 A JP 6154848A JP 15484894 A JP15484894 A JP 15484894A JP H0823052 A JPH0823052 A JP H0823052A
Authority
JP
Japan
Prior art keywords
substrate
thick film
ceramic substrate
film circuit
heat dissipation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6154848A
Other languages
Japanese (ja)
Inventor
Toshiyuki Nagase
敏之 長瀬
Yoshio Kanda
義雄 神田
Akifumi Hatsuka
昌文 初鹿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP6154848A priority Critical patent/JPH0823052A/en
Publication of JPH0823052A publication Critical patent/JPH0823052A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

(57)【要約】 【目的】 厚膜抵抗体を形成しても厚膜回路が酸化せ
ず、リード端子を接着でき、かつ高周波用回路基板に利
用できる。放熱性に優れる。 【構成】 ハイブリッドＩＣ用基板１０は、第１放熱用
セラミック基板１１の表面に厚膜抵抗体１２ａを含むＡ
ｕ系，Ａｇ系又はＣｕ系金属からなる厚膜回路１２が形
成され、かつこのセラミック基板１１の表面端部に厚膜
回路１２に電気的に接続するためのアルミニウムからな
るリード端子１３がＡｌ−Ｓｉ系ろう材を介して接着さ
れる。 (57) [Summary] [Purpose] Even when a thick film resistor is formed, the thick film circuit does not oxidize, lead terminals can be bonded, and it can be used for a high frequency circuit board. Excellent heat dissipation. [Constitution] The hybrid IC substrate 10 includes a thick film resistor 12a on the surface of a first heat dissipation ceramic substrate 11.
A thick film circuit 12 made of a u-based, Ag-based or Cu-based metal is formed, and a lead terminal 13 made of aluminum for electrically connecting to the thick film circuit 12 is electrically connected to the end of the surface of the ceramic substrate 11. Bonded through a Si-based brazing material.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、半導体チップが実装さ
れるハイブリッドＩＣ用基板に関する。更に詳しくはア
ルミニウムリード端子付きの厚膜ハイブリッドＩＣ用基
板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid IC substrate on which a semiconductor chip is mounted. More specifically, the present invention relates to a thick film hybrid IC substrate with aluminum lead terminals.

【０００２】[0002]

【従来の技術】従来、基板表面にタングステン回路を形
成したＡｌ2Ｏ3基板の端部にＣｕ又はコバール（Kova
r）からなるリード端子をＡｇ−Ｃｕ系ろう材で接着し
たハイブリッドＩＣ用基板が知られている。このハイブ
リッドＩＣ用基板はアルミナグリーンシートの表面にタ
ングステンペーストを印刷して回路を形成し、これを水
素と窒素を混合した還元性雰囲気で１６００℃前後の高
温で同時焼成した後、リード端子をやはり還元性雰囲気
で８５０℃の温度でＡｇ−Ｃｕ系ろう材を溶融して基板
端部に接着することにより作られる。 2. Description of the Related Art Conventionally, Cu or Kovar (Kova) is formed at the end of an Al 2 O 3 substrate having a tungsten circuit formed on the surface of the substrate.
There is known a hybrid IC substrate in which a lead terminal composed of r) is adhered with an Ag-Cu brazing material. This hybrid IC substrate was printed with a tungsten paste on the surface of an alumina green sheet to form a circuit, which was then co-fired at a high temperature of around 1600 ° C. in a reducing atmosphere containing a mixture of hydrogen and nitrogen. It is made by melting an Ag—Cu based brazing material at a temperature of 850 ° C. in a reducing atmosphere and adhering it to the edge of the substrate.

【０００３】[0003]

【発明が解決しようとする課題】しかし、上記リード端
子付きハイブリッドＩＣ用基板では、その回路の所定の
箇所に後からＲｕＯ2系厚膜抵抗体ペーストを塗布し
て、大気中、８５０℃の温度で焼成し、厚膜抵抗体を形
成しようとしても、焼成時にタングステンが酸化してし
まうため、実質的に厚膜抵抗体を形成することができな
い不具合があった。また、上記ハイブリッドＩＣ用基板
では、回路を構成するタングステンの抵抗値が他の厚膜
回路を構成するＡｕ系，Ａｇ系又はＣｕ系金属の抵抗値
と比べて高く、高周波用の回路基板として用いることが
できない欠点があった。更に上記ハイブリッドＩＣ用基
板は、電子機器の小型化、高性能化によって単位体積当
りの発熱量が増大した場合にその放熱性が十分でない問
題点があった。However, in the above-mentioned substrate for hybrid IC with lead terminals, the RuO 2 type thick film resistor paste is later applied to a predetermined portion of the circuit and the temperature of 850 ° C. is set in the atmosphere. Even if an attempt is made to form a thick film resistor by firing in, the tungsten is oxidized during firing, so that the thick film resistor cannot be formed substantially. Further, in the above hybrid IC substrate, the resistance value of tungsten forming the circuit is higher than the resistance value of Au-based, Ag-based or Cu-based metal forming the other thick film circuits, and is used as a high frequency circuit board. There was a drawback that could not be done. Further, the above-mentioned hybrid IC substrate has a problem that the heat radiation performance is not sufficient when the heat generation amount per unit volume is increased due to the miniaturization and high performance of electronic devices.

【０００４】本発明の目的は、厚膜抵抗体を形成しても
厚膜回路が酸化せず、かつ高周波用に利用可能なリード
端子付き厚膜ハイブリッドＩＣ用基板を提供することに
ある。本発明の別の目的は、放熱性に優れたリード端子
付き厚膜ハイブリッドＩＣ用基板を提供することにあ
る。An object of the present invention is to provide a substrate for a thick film hybrid IC with a lead terminal, which does not oxidize a thick film circuit even if a thick film resistor is formed, and which can be used for high frequencies. Another object of the present invention is to provide a thick film hybrid IC substrate with lead terminals, which is excellent in heat dissipation.

【０００５】[0005]

【課題を解決するための手段】上記目的を達成するため
に、図１に示すように、本発明の第１のハイブリッドＩ
Ｃ用基板１０は、第１放熱用セラミック基板１１の表面
に厚膜抵抗体１２ａを含むＡｕ系，Ａｇ系又はＣｕ系金
属からなる厚膜回路１２が形成され、かつこのセラミッ
ク基板１１の表面端部に厚膜回路１２に電気的に接続す
るためのアルミニウムからなるリード端子１３がＡｌ−
Ｓｉ系ろう材を介して接着されたものである。In order to achieve the above object, as shown in FIG. 1, a first hybrid I of the present invention is provided.
In the C substrate 10, a thick film circuit 12 made of Au-based, Ag-based or Cu-based metal including a thick film resistor 12a is formed on the surface of the first heat dissipation ceramic substrate 11, and a surface end of the ceramic substrate 11 is formed. The lead terminal 13 made of aluminum for electrically connecting to the thick film circuit 12 is connected to the Al-
It is adhered via a Si-based brazing material.

【０００６】図２に示すように、本発明の第２のハイブ
リッドＩＣ用基板２０は、第１放熱用セラミック基板１
１とアルミニウム板２１と第２放熱用セラミック基板２
２とがそれぞれＡｌ−Ｓｉ系ろう材を介してこの順に積
層接着され、第１放熱用セラミック基板１１の表面に厚
膜抵抗体１２ａを含むＡｕ系，Ａｇ系又はＣｕ系金属か
らなる厚膜回路１２が形成され、第１放熱用セラミック
基板１１の表面端部に厚膜回路１２に電気的に接続する
ためのアルミニウムからなるリード端子１３がＡｌ−Ｓ
ｉ系ろう材を介して接着されたものである。As shown in FIG. 2, the second hybrid IC substrate 20 of the present invention is the first heat dissipating ceramic substrate 1.
1, aluminum plate 21, and second heat dissipation ceramic substrate 2
2 and 2 are laminated and adhered in this order through an Al-Si brazing material, and a thick film circuit made of Au-based, Ag-based or Cu-based metal including a thick film resistor 12a on the surface of the first heat dissipation ceramic substrate 11. 12 is formed, and the lead terminal 13 made of aluminum for electrically connecting to the thick film circuit 12 is formed on the surface end portion of the first heat dissipation ceramic substrate 11 by Al-S.
It is adhered via an i-based brazing material.

【０００７】また図３に示すように、本発明の第３のハ
イブリッドＩＣ用基板３０は、第２のハイブリッドＩＣ
用基板２０の第２放熱用セラミック基板２２の裏面に放
熱フィン３１が接着されたものである。As shown in FIG. 3, the third hybrid IC substrate 30 of the present invention is a second hybrid IC substrate.
The heat radiation fins 31 are bonded to the back surface of the second heat radiation ceramic substrate 22 of the heat treatment substrate 20.

【０００８】更に図４及び図５に示すように、本発明の
第４のハイブリッドＩＣ用基板４０は、第１放熱用セラ
ミック基板１１の表面中央部に厚膜抵抗体１２ａを含む
Ａｕ系，Ａｇ系又はＣｕ系金属からなる厚膜回路１２が
形成され、この放熱用セラミック基板１１の表面端部に
厚膜回路１２に電気的に接続するためのアルミニウムか
らなるリード端子１３がＡｌ−Ｓｉ系ろう材を介して接
着され、厚膜回路１２及びリード端子１３に電気的に絶
縁するように放熱用セラミック基板１１の表面周縁部に
アルミニウムからなる枠板３２がＡｌ−Ｓｉ系ろう材を
介して接着され、放熱用セラミック基板１１の裏面全体
にアルミニウム板２１がＡｌ−Ｓｉ系ろう材を介して接
着されたものである。Further, as shown in FIGS. 4 and 5, the fourth hybrid IC substrate 40 of the present invention is an Au-based, Ag-based device having a thick film resistor 12a at the center of the surface of the first heat dissipation ceramic substrate 11. A thick-film circuit 12 made of a Cu-based or Cu-based metal is formed, and a lead terminal 13 made of aluminum for electrically connecting to the thick-film circuit 12 is formed on the surface end portion of the heat-dissipating ceramic substrate 11 by an Al-Si solder. A frame plate 32 made of aluminum is bonded to the thick film circuit 12 and the lead terminals 13 so as to be electrically insulated from the thick film circuit 12 and the lead terminals 13 via a Al-Si type brazing material. The aluminum plate 21 is adhered to the entire back surface of the heat dissipation ceramic substrate 11 via an Al—Si brazing material.

【０００９】なお、図１〜図５に示した上記第１放熱用
セラミック基板１１又は第２放熱用セラミック基板２２
としては、Ａｌ2Ｏ3基板、ＡｌＮ基板又はＳｉＣ基板を
用いることができる。図２及び図３に示すように第１放
熱用セラミック基板とともに第２放熱用セラミック基板
が用いられる場合には、両基板に同一組成の基板を用い
ることができることは勿論、組成の違うもの同士を用い
ることも可能である。図６に示すように、放熱用セラミ
ック基板４１がＡｌＮ基板の場合には、基板に化学安定
性を付与するために基板４１を酸化処理して基板表面に
Ａｌ2Ｏ3層４２を形成した後、ＳｉＯ2層４３を被覆し
ておくことが必要である。Ａｌ2Ｏ3層とＳｉＯ2層の形
成を要するのは、ＡｌＮ基板に厚膜を直接形成すると、
厚膜形成後、大気中で焼成したときに厚膜中に含まれて
いるガラスとＡｌＮ（窒化アルミニウム）が反応してＮ
2やＮＯのガスを発生し、厚膜に気泡を生じる不具合を
解消するためである。The first heat dissipation ceramic substrate 11 or the second heat dissipation ceramic substrate 22 shown in FIGS.
As the material, an Al 2 O 3 substrate, an AlN substrate, or a SiC substrate can be used. When the second heat-dissipating ceramic substrate is used together with the first heat-dissipating ceramic substrate as shown in FIGS. 2 and 3, it is of course possible to use substrates having the same composition for both substrates, and of course, substrates having different compositions may be used. It is also possible to use. As shown in FIG. 6, when the heat dissipation ceramic substrate 41 is an AlN substrate, after the substrate 41 is subjected to an oxidation treatment to form an Al 2 O 3 layer 42 on the substrate surface in order to impart chemical stability to the substrate. , It is necessary to cover the SiO 2 layer 43. It is necessary to form the Al 2 O 3 layer and the SiO 2 layer because when a thick film is directly formed on the AlN substrate,
After forming the thick film, the glass contained in the thick film reacts with AlN (aluminum nitride) when fired in the atmosphere, so that N
This is to solve the problem of generating bubbles in the thick film by generating 2 or NO gas.

【００１０】また、第１又は第２放熱用セラミック基板
の厚さが０．１〜１．０ｍｍであって、アルミニウム板
の厚さが０．１〜１．０ｍｍであって、アルミニウム板
の厚さが第１又は第２放熱用セラミック基板の厚さの１
０〜１００％であることが好ましい。セラミック基板が
０．１ｍｍ未満であると、絶縁特性及び機械的強度に劣
り、アルミニウム板がセラミック基板より相対的に厚く
なると、接着後の応力緩和時のクラック、割れが生じや
すくなる。アルミニウム板の厚さが０．１ｍｍ未満であ
るか、或いはセラミック基板の１０％未満になると、ハ
イブリッドＩＣ用基板としての放熱性が十分でない。The first or second ceramic substrate for heat dissipation has a thickness of 0.1 to 1.0 mm, the aluminum plate has a thickness of 0.1 to 1.0 mm, and the aluminum plate has a thickness of 0.1 to 1.0 mm. Is the thickness of the first or second ceramic substrate for heat dissipation, which is 1
It is preferably 0 to 100%. When the thickness of the ceramic substrate is less than 0.1 mm, the insulating property and mechanical strength are poor, and when the thickness of the aluminum plate is relatively thicker than that of the ceramic substrate, cracks and cracks tend to occur during stress relaxation after bonding. When the thickness of the aluminum plate is less than 0.1 mm or less than 10% of the ceramic substrate, the heat dissipation property as a hybrid IC substrate is insufficient.

【００１１】[0011]

【作用】図１に示すように、Ａｕ又はＡｇ導体で厚膜回
路を形成する場合には、Ａｕ又はＡｇペーストを放熱性
セラミック基板１１の表面に印刷し大気中８５０℃で焼
成した後、ＲｕＯ2系厚膜抵抗体ペーストを印刷し大気
中８５０℃で焼成することにより、基板表面に厚膜回路
１２とこの回路に厚膜抵抗体１２ａとをそれぞれ形成す
る。Ｃｕ導体で厚膜回路を形成する場合には、ＲｕＯ2
系厚膜抵抗体ペーストを印刷し大気中８５０℃で焼成し
た後、Ｃｕペーストを印刷しＮ2雰囲気中、８５０℃で
焼成する。次いで真空中６３０℃でＡｌ−Ｓｉ系ろう材
を介してアルミニウムのリード端子１３を基板の表面端
部に接着する。リード端子１３の接着温度が厚膜回路１
２及び厚膜抵抗体１２ａを形成するときの温度よりも低
いため、リード端子接着時に厚膜回路及び厚膜抵抗体を
熱変質させない。また本発明のＡｕ，Ａｇ又はＣｕの厚
膜導体は従来のＷの厚膜導体に比べて抵抗値が小さく、
高周波用の回路基板に利用できる。図２〜図５に示すよ
うに、厚膜回路１２を形成した放熱性セラミック基板１
１の裏面にアルミニウム板２１又はアルミニウム板２
１，放熱フィン３１を接着することにより、放熱性が高
まる。As shown in FIG. 1, when a thick film circuit is formed of an Au or Ag conductor, Au or Ag paste is printed on the surface of the heat-dissipating ceramic substrate 11 and baked at 850 ° C. in the atmosphere, and then RuO. A thick film circuit 12 and a thick film resistor 12a are formed on the surface of the substrate by printing a 2 series thick film resistor paste and baking it at 850 ° C. in the atmosphere. When forming a thick film circuit with Cu conductor, RuO 2
A thick film resistor paste is printed and fired at 850 ° C. in the atmosphere, and then a Cu paste is printed and fired at 850 ° C. in an N 2 atmosphere. Next, the lead terminals 13 made of aluminum are bonded to the surface end portions of the substrate at 630 [deg.] C. in vacuum via the Al-Si brazing material. The adhesion temperature of the lead terminal 13 is the thick film circuit 1
2 and the temperature when forming the thick film resistor 12a are lower than that of the thick film circuit and the thick film resistor when the lead terminals are bonded. The Au, Ag or Cu thick film conductor of the present invention has a smaller resistance value than the conventional W thick film conductor,
It can be used for high frequency circuit boards. As shown in FIGS. 2 to 5, a heat-dissipating ceramic substrate 1 having a thick film circuit 12 formed thereon.
Aluminum plate 21 or aluminum plate 2 on the back surface of 1
1, By adhering the radiation fins 31 to each other, the radiation performance is improved.

【００１２】[0012]

【実施例】次に本発明の実施例を図面に基づいて説明す
る。 ＜実施例１＞Ａｌ2Ｏ3が９６％純度の厚さ０．８１５ｍ
ｍのＡｌ2Ｏ3基板の表面にＡｕペーストをスクリーン印
刷し１５０℃で乾燥した後、大気中で連続ベルト炉を用
いて８５０℃で１０分間焼成した。次いでＲｕＯ2系厚
膜抵抗体ペーストを印刷して１５０℃で乾燥し、再び、
大気中、８５０℃で１０分間焼成し厚膜回路基板を得
た。次に基板の厚膜回路が形成されていない表面端部
と、アルミニウムからなる複数の厚さ０．４ｍｍのリー
ド端子との間に厚さ３０μｍのＡｌ−７．５％Ｓｉ箔
（重量％、以下同じ）をそれぞれ挟んでこれらを重ね、
これらに２ｋｇｆ／ｃｍ2の荷重を加えて真空炉中で６
３０℃、３０分間加熱して、リード端子を基板の表面端
部に接着した。Embodiments of the present invention will now be described with reference to the drawings. <Example 1> Al 2 O 3 having a purity of 96% and a thickness of 0.815 m
After the Au paste was screen-printed on the surface of the Al 2 O 3 substrate of m and dried at 150 ° C., it was baked at 850 ° C. for 10 minutes in the atmosphere using a continuous belt furnace. Next, a RuO 2 type thick film resistor paste is printed, dried at 150 ° C., and again,
A thick film circuit board was obtained by baking at 850 ° C. for 10 minutes in the air. Next, a 30 μm-thick Al-7.5% Si foil (weight%, between the surface end of the substrate where the thick film circuit is not formed and the plurality of lead terminals made of aluminum and having a thickness of 0.4 mm) The same shall apply hereafter)
A load of 2 kgf / cm 2 is applied to these, and 6 in a vacuum furnace
The lead terminals were bonded to the surface end portions of the substrate by heating at 30 ° C. for 30 minutes.

【００１３】図１に示すように、これによりＡｌ2Ｏ3基
板１１の表面に厚膜抵抗体１２ａを有する厚膜回路１２
が形成され、基板１１の表面端部に複数のリード端子１
３が接着されたハイブリッドＩＣ用基板１０が得られ
た。この基板１０の厚膜回路１２に更に半導体チップ１
４をＡｌ−Ｓｉはんだを用いて４２０℃でダイボンディ
ングした後、３００℃でＡｕワイヤボンディングを行
い、続いてチップコンデンサ１５をはんだ付けすること
により実装した。このハイブリッドＩＣ用基板１０はリ
ード端子１３の接着温度（６３０℃）が厚膜回路１２及
び厚膜抵抗体１２ａを形成するときの温度（８５０℃）
よりも低いため、リード端子接着時に厚膜回路及び厚膜
抵抗体を熱変質させず、またＡｕの厚膜導体は比抵抗が
小さく、高周波用の回路基板に利用できる。As shown in FIG. 1, a thick film circuit 12 having a thick film resistor 12a on the surface of the Al 2 O 3 substrate 11 is thereby formed.
Are formed, and a plurality of lead terminals 1 are formed on the surface end of the substrate 11.
A hybrid IC substrate 10 to which 3 was adhered was obtained. The semiconductor chip 1 is further formed on the thick film circuit 12 of the substrate 10.
4 was die-bonded at 420 ° C. using Al—Si solder, followed by Au wire bonding at 300 ° C., and then the chip capacitor 15 was soldered for mounting. In this hybrid IC substrate 10, the adhesion temperature (630 ° C.) of the lead terminal 13 is the temperature (850 ° C.) when the thick film circuit 12 and the thick film resistor 12a are formed.
Since it is lower than the above, the thick film circuit and the thick film resistor are not thermally deteriorated at the time of adhering the lead terminal, and the thick film conductor of Au has a small specific resistance and can be used for a circuit board for high frequency.

【００１４】＜実施例２＞Ａｌ2Ｏ3が９６％純度の厚さ
０．３８ｍｍのＡｌ2Ｏ3基板の表面に実施例１と同様に
Ａｕペーストを印刷乾燥して焼成し、かつＲｕＯ2系厚
膜抵抗体ペーストを印刷乾燥して焼成することにより、
厚膜回路基板を得た。次にこの基板と、この基板と同形
同大の厚さ０．１５ｍｍの純アルミニウム板と、このア
ルミニウム板と同形同大のＡｌ2Ｏ3が９６％純度の厚さ
０．３８ｍｍのＡｌ2Ｏ3基板の間に、これらと同形同大
の厚さ３０μｍのＡｌ−７．５％Ｓｉ箔をそれぞれ挟ん
でこれらを重ね、これらに２ｋｇｆ／ｃｍ2の荷重を加
えて真空炉中で６３０℃、３０分間加熱して３枚の板を
積層接着した。この接着されかつ厚膜回路を形成した側
のＡｌ2Ｏ3基板の表面端部と、アルミニウムからなる複
数の厚さ０．４ｍｍのリード端子との間に厚さ３０μｍ
のＡｌ−７．５％Ｓｉ箔をそれぞれ挟んでこれらを重
ね、これらに２ｋｇｆ／ｃｍ2の荷重を加えて真空炉中
で６３０℃、３０分間加熱して、リード端子を基板の厚
膜回路の形成していない表面端部に接着した。[0014] <Example 2> Al 2 O 3 is baked by printing and drying the Au paste in the same manner as in Example 1 Al 2 O 3 surface of the substrate thickness 0.38mm 96% pure, and RuO 2 By printing, drying and firing the thick film resistor paste,
A thick film circuit board was obtained. Next, this substrate, a pure aluminum plate having the same shape and the same size as the substrate and a thickness of 0.15 mm, and an Al 2 O 3 having the same shape and the same size as the aluminum plate and having a purity of 96% and an Al thickness of 0.38 mm. The Al-7.5% Si foils having the same shape and the same size and a thickness of 30 μm are sandwiched between 2 O 3 substrates, and these are stacked, and a load of 2 kgf / cm 2 is applied to these foils in a vacuum furnace. The plates were laminated and adhered by heating at 630 ° C. for 30 minutes. A thickness of 30 μm is provided between the surface end of the Al 2 O 3 substrate on the side where the thick film circuit is adhered and a plurality of lead terminals made of aluminum and having a thickness of 0.4 mm.
Al-7.5% Si foils are sandwiched between them, and these are stacked, and a load of 2 kgf / cm 2 is applied to these foils and heated in a vacuum furnace at 630 ° C. for 30 minutes to connect the lead terminals to the thick film circuit of the substrate. It adhered to the edge of the surface which was not formed.

【００１５】図２に示すように、これによりＡｌ2Ｏ3基
板１１とＡｌ2Ｏ3基板２２の間に高熱伝導層としてのア
ルミニウム板２１が接着され、基板１１の表面に厚膜抵
抗体１２ａを有する厚膜回路１２が形成され、かつ基板
１１の表面端部に複数のリード端子１３が接着されたハ
イブリッドＩＣ用基板２０が得られた。ここで、Ａｌ2
Ｏ3基板２２はアルミニウム板２１を接着したことによ
って生じるＡｌ2Ｏ3基板１１の反りを防止し、応力的に
釣り合わせるために接着される。このハイブリッドＩＣ
用基板２０の厚膜回路１２に更に実施例１と同様にして
半導体チップ１４及びチップコンデンサ１５を実装し
た。このハイブリッドＩＣ用基板２０は実施例１の特長
を備える他、実施例１と比較して基板表面に実装した半
導体チップ１４等の発熱をアルミニウム板２１を介して
放散させることができた。As shown in FIG. 2, as a result, the aluminum plate 21 as a high thermal conductive layer is bonded between the Al 2 O 3 substrate 11 and the Al 2 O 3 substrate 22, and the thick film resistor 12a is formed on the surface of the substrate 11. Thus, the hybrid IC substrate 20 was obtained in which the thick film circuit 12 having the above was formed and the plurality of lead terminals 13 were adhered to the surface end portions of the substrate 11. Where Al 2
The O 3 substrate 22 is bonded to prevent warpage of the Al 2 O 3 substrate 11 caused by bonding the aluminum plate 21 and to balance the stress. This hybrid IC
Further, the semiconductor chip 14 and the chip capacitor 15 were mounted on the thick film circuit 12 of the substrate 20 in the same manner as in Example 1. This hybrid IC substrate 20 has the features of the first embodiment, and in comparison with the first embodiment, the heat generated by the semiconductor chip 14 mounted on the substrate surface can be dissipated through the aluminum plate 21.

【００１６】＜実施例３＞Ａｌ2Ｏ3が９６％純度の厚さ
０．３８ｍｍのＡｌ2Ｏ3基板の表面に実施例１と同様に
Ａｕペーストを印刷乾燥して焼成し、かつＲｕＯ2系厚
膜抵抗体ペーストを印刷乾燥して焼成することにより、
厚膜回路基板を得た。次にこの基板と、この基板と同形
同大の厚さ０．１５ｍｍの純アルミニウム板と、このア
ルミニウム板と同形同大のＡｌ2Ｏ3が９６％純度の厚さ
０．３８ｍｍのＡｌ2Ｏ3基板の間に、これらと同形同大
の厚さ３０μｍのＡｌ−７．５％Ｓｉ箔をそれぞれ挟ん
でこれらを重ねた。このとき、この厚膜回路を形成して
いない側のＡｌ2Ｏ3基板には、内径０．８ｍｍのスルー
ホールをレーザ加工などにより形成し、この中にＡｌワ
イヤを挿入しておいた。実施例２と同様にして３枚の板
を積層接着した後、厚膜回路を形成した側のＡｌ2Ｏ3基
板の表面端部にアルミニウムからなる複数の厚さ０．４
ｍｍのリード端子を実施例２と同様に接着した。接着さ
れかつ厚膜回路を形成していない側のＡｌ2Ｏ3基板と放
熱フィンの間に厚さ６０μｍのＡｌ−７．５％Ｓｉ箔を
挟み、２０ｇ／ｃｍ2の荷重を加えて真空炉中で６３０
℃、３０分間加熱してスルーホールに挿入したＡｌワイ
ヤと放熱フィンを接着した。即ちアルミニウム板にサー
マルビア（thermal via hole）を介して放熱フィンが接
続された。<Example 3> On the surface of an Al 2 O 3 substrate having a purity of Al 2 O 3 of 96% and a thickness of 0.38 mm, an Au paste was printed, dried and fired in the same manner as in Example 1, and RuO 2 was added. By printing, drying and firing the thick film resistor paste,
A thick film circuit board was obtained. Next, this substrate, a pure aluminum plate having the same shape and the same size as the substrate and a thickness of 0.15 mm, and an Al 2 O 3 having the same shape and the same size as the aluminum plate and having a purity of 96% and an Al thickness of 0.38 mm. These were stacked by sandwiching an Al-7.5% Si foil having the same shape and size and a thickness of 30 μm between 2 O 3 substrates. At this time, a through hole having an inner diameter of 0.8 mm was formed by laser processing or the like in the Al 2 O 3 substrate on the side where the thick film circuit was not formed, and the Al wire was inserted therein. After laminating and adhering three plates in the same manner as in Example 2, a plurality of thicknesses 0.4 made of aluminum were formed on the surface end of the Al 2 O 3 substrate on the side where the thick film circuit was formed.
mm lead terminals were bonded in the same manner as in Example 2. A 60 μm thick Al-7.5% Si foil was sandwiched between the Al 2 O 3 substrate that was adhered and on which the thick film circuit was not formed and the radiation fin, and a load of 20 g / cm 2 was applied to the vacuum furnace. In 630
The heat dissipation fin was bonded to the Al wire inserted into the through hole by heating at 30 ° C. for 30 minutes. That is, the radiating fins were connected to the aluminum plate via thermal via holes.

【００１７】図３に示すように、これによりＡｌ2Ｏ3基
板１１とＡｌ2Ｏ3基板２２の間に高熱伝導層としてのア
ルミニウム板２１が接着され、基板１１の表面に厚膜抵
抗体１２ａを有する厚膜回路１２が形成され、サーマル
ビア２２ａで基板２２に放熱フィン３１が接着され、か
つ基板１１の表面端部に複数のリード端子１３が接着さ
れたハイブリッドＩＣ用基板３０が得られた。この基板
３０の厚膜回路１２に更に実施例１と同様にして半導体
チップ１４及びチップコンデンサ１５を実装した。アル
ミニウム板２１に伝導された熱はサーマルビア２２ａを
介して放熱フィン３１から効率良く放散させることがで
きた。As shown in FIG. 3, as a result, the aluminum plate 21 as a high thermal conductive layer is bonded between the Al 2 O 3 substrate 11 and the Al 2 O 3 substrate 22, and the thick film resistor 12a is formed on the surface of the substrate 11. A thick-film circuit 12 having the following is formed, and a heat dissipation fin 31 is adhered to the substrate 22 by a thermal via 22a, and a plurality of lead terminals 13 are adhered to the surface end portion of the substrate 11 to obtain a hybrid IC substrate 30. . Further, the semiconductor chip 14 and the chip capacitor 15 were mounted on the thick film circuit 12 of the substrate 30 in the same manner as in Example 1. The heat conducted to the aluminum plate 21 could be efficiently dissipated from the radiation fin 31 via the thermal via 22a.

【００１８】＜実施例４＞Ａｌ2Ｏ3が９６％純度の厚さ
０．６３５ｍｍのＡｌ2Ｏ3基板の表面にＡｕペーストを
スクリーン印刷し１５０℃で乾燥した後、更にこのＡｌ
2Ｏ3基板に形成したスルーホール内にＡｕペーストを充
填し１５０℃で乾燥した。その後大気中で連続ベルト炉
を用いて８５０℃で１０分間焼成した。次いでＲｕＯ2
系厚膜抵抗体ペーストを印刷して１５０℃で乾燥し、再
び、大気中、８５０℃で１０分間焼成し厚膜回路基板を
得た。次にこの基板と、この基板と同形同大の厚さ０．
２ｍｍの純アルミニウム板の間に厚さ３０μｍのＡｌ−
７．５％Ｓｉ箔を挟んでこれらを重ね、これらに２ｋｇ
ｆ／ｃｍ2の荷重を加えて真空炉中で６３０℃、３０分
間加熱して２枚の板を接着した。このＡｌ2Ｏ3基板の表
面端部とアルミニウムからなる複数の厚さ０．４μｍの
リード端子との間に厚さ３０μｍのＡｌ−７．５％Ｓｉ
箔を挟んでこれらを重ね、更にリード端子を設けないＡ
ｌ2Ｏ3基板の表面端部に厚さ０．４μｍの純アルミニウ
ムの枠板を配し、基板の表面端部と枠板との間に厚さ３
０μｍのＡｌ−７．５％Ｓｉ箔を挟んでこれらを重ね、
リード端子、枠板及び表面端部に２ｋｇｆ／ｃｍ2の荷
重を加えて真空炉中で６３０℃、３０分間加熱して、リ
ード端子及び枠板を基板の表面端部に接着した。[0018] After drying the Au paste by screen printing to 0.99 ° C. to <Example 4> Al 2 O 3 96% thickness Al 2 O 3 surface of the substrate of 0.635mm pure, even the Al
The Au paste was filled in the through holes formed in the 2 O 3 substrate and dried at 150 ° C. Then, it was fired at 850 ° C. for 10 minutes in the atmosphere using a continuous belt furnace. Then RuO 2
The system thick film resistor paste was printed, dried at 150 ° C., and again baked in the atmosphere at 850 ° C. for 10 minutes to obtain a thick film circuit board. Next, this substrate and a thickness of 0.
30 mm thick Al- between 2 mm pure aluminum plates
These are stacked with a 7.5% Si foil sandwiched between them and 2 kg
A load of f / cm 2 was applied and heated at 630 ° C. for 30 minutes in a vacuum furnace to bond the two plates. Al-7.5% Si having a thickness of 30 μm is provided between a surface end portion of the Al 2 O 3 substrate and a plurality of lead terminals made of aluminum and having a thickness of 0.4 μm.
These are stacked with the foil sandwiched and no lead terminals are provided.
A 0.4 μm thick pure aluminum frame plate is arranged on the front end of the l 2 O 3 substrate, and a thickness of 3 μm is provided between the front end of the substrate and the frame plate.
These are stacked with a 0 μm Al-7.5% Si foil interposed therebetween,
A load of 2 kgf / cm 2 was applied to the lead terminal, the frame plate and the surface end portion, and heated at 630 ° C. for 30 minutes in a vacuum furnace to bond the lead terminal and the frame plate to the surface end portion of the substrate.

【００１９】図４及び図５に示すように、これによりＡ
ｌ2Ｏ3基板１１の裏面に高熱伝導層及びグランド層とし
てのアルミニウム板２１が接着され、基板１１の表面に
厚膜抵抗体１２ａを有する厚膜回路１２が形成され、か
つ基板１１の表面端部に複数のリード端子１３と枠板３
２が接着されたハイブリッドＩＣ用基板４０が得られ
た。ここで枠板３２はＡｌ2Ｏ3基板１１のアルミニウム
板２１を接着したことによって生じる基板の反りを防止
し、応力的に釣り合わせるために接着される。この基板
４０の厚膜回路１２に更に実施例１と同様にして半導体
チップ１４及びチップコンデンサ１５を実装した。図５
に示すように半導体チップ１４直下の基板１１にはＡｕ
が充填されたスルーホール１１ａが設けられ、半導体チ
ップ１４のアース回路１２ｂはこのスルーホール１１ａ
を介してアルミニウム板２１に電気的に接続された。As shown in FIG. 4 and FIG.
An aluminum plate 21 as a high thermal conductive layer and a ground layer is adhered to the back surface of the l 2 O 3 substrate 11, a thick film circuit 12 having a thick film resistor 12a is formed on the surface of the substrate 11, and a front end of the substrate 11 is formed. A plurality of lead terminals 13 and a frame plate 3
A hybrid IC substrate 40 to which 2 was adhered was obtained. Here, the frame plate 32 is bonded to prevent warpage of the substrate caused by bonding the aluminum plate 21 of the Al 2 O 3 substrate 11 and to balance the stress. Further, the semiconductor chip 14 and the chip capacitor 15 were mounted on the thick film circuit 12 of the substrate 40 in the same manner as in Example 1. Figure 5
As shown in FIG.
Is provided with a through hole 11a, and the ground circuit 12b of the semiconductor chip 14 has the through hole 11a.
It was electrically connected to the aluminum plate 21 via.

【００２０】＜実施例５＞厚さ０．６３５ｍｍのＡｌＮ
基板を酸素雰囲気中で１３００℃、１時間熱処理し、基
板の表裏両面に酸化層であるＡｌ2Ｏ3層を形成した。次
いで厚膜回路が形成されるＡｌＮ基板の表面部分及び裏
面全体にＳｉＯ2ゾルを塗布した後、３００℃で１時間
乾燥させ、続いて９００℃で１時間焼成することによ
り、ＡｌＮ基板の表面部分及び裏面全体にＳｉＯ2層を
形成した。表面部分のＳｉＯ2層の上に実施例１と同様
にＡｕペーストを印刷乾燥して焼成し、かつＲｕＯ2系
厚膜抵抗体ペーストを印刷乾燥して焼成することによ
り、厚膜回路基板を得た。次にこの基板のＳｉＯ2層の
形成していない表面端部と、アルミニウムからなる複数
の厚さ０．４ｍｍのリード端子との間にそれぞれ厚さ３
０μｍのＡｌ−７．５％Ｓｉ箔を挟んでこれらを重ね、
これらに２ｋｇｆ／ｃｍ2の荷重を加えて真空炉中で６
３０℃、３０分間加熱して、リード端子を基板の表面端
部に接着した。Example 5 AlN having a thickness of 0.635 mm
The substrate was heat-treated in an oxygen atmosphere at 1300 ° C. for 1 hour to form an Al 2 O 3 layer as an oxide layer on both front and back surfaces of the substrate. Then, the SiO 2 sol is applied to the entire front surface and back surface of the AlN substrate on which the thick film circuit is formed, dried at 300 ° C. for 1 hour, and then baked at 900 ° C. for 1 hour to obtain the surface portion of the AlN substrate. And a SiO 2 layer was formed on the entire back surface. A thick film circuit board is obtained by printing and drying an Au paste on the SiO 2 layer on the surface portion in the same manner as in Example 1 and by printing, drying and firing a RuO 2 -based thick film resistor paste. It was Next, a thickness of 3 mm is provided between each end of the surface of the substrate on which the SiO 2 layer is not formed and a plurality of lead terminals made of aluminum and having a thickness of 0.4 mm.
These are stacked with a 0 μm Al-7.5% Si foil interposed therebetween,
A load of 2 kgf / cm 2 is applied to these, and 6 in a vacuum furnace
The lead terminals were bonded to the surface end portions of the substrate by heating at 30 ° C. for 30 minutes.

【００２１】図６に示すように、これによりＡｌＮ基板
４１の表面に酸化層４２を介してＳｉＯ2層４３が形成
され、その基板表面に厚膜抵抗体１２ａを有する厚膜回
路１２が形成され、かつ基板４１の表面端部に複数のリ
ード端子１３が接着されたハイブリッドＩＣ用基板５０
が得られた。この基板５０の厚膜回路１２に更に実施例
１と同様にして半導体チップ１４及びチップコンデンサ
１５を実装した。このハイブリッドＩＣ用基板５０は熱
伝導率が１００〜１８０Ｗ／ｍ・ＫのＡｌＮを回路形成
用基板に用いるため、熱伝導率が２０Ｗ／ｍ・Ｋ程度の
Ａｌ2Ｏ3を回路形成用基板に用いた実施例１のものよ
り、放熱性に優れる。As shown in FIG. 6, a SiO 2 layer 43 is thereby formed on the surface of the AlN substrate 41 through the oxide layer 42, and the thick film circuit 12 having the thick film resistor 12a is formed on the substrate surface. Also, a hybrid IC substrate 50 in which a plurality of lead terminals 13 are adhered to the front end of the substrate 41
was gotten. Further, the semiconductor chip 14 and the chip capacitor 15 were mounted on the thick film circuit 12 of the substrate 50 in the same manner as in Example 1. Since this hybrid IC substrate 50 uses AlN having a thermal conductivity of 100 to 180 W / m · K as a circuit forming substrate, Al 2 O 3 having a thermal conductivity of about 20 W / m · K is used as a circuit forming substrate. The heat dissipation is superior to that of Example 1 used.

【００２２】なお、上記実施例２〜実施例４ではＡｌ2
Ｏ3基板とアルミニウム板とを接着した後に、アルミニ
ウムのリード端子を接着したが、これらの接着は同時に
行ってもよい。また、放熱性セラミック基板はＡｌ2Ｏ3
基板及びＡｌＮ基板に限らず、ＳｉＣ基板でもよい。実
施例５のようにＡｌＮ基板を第２、第３及び第４のハイ
ブリッドＩＣ用基板に用いることもできる。この場合に
は、ＡｌＮ基板の表面熱酸化処理と回路形成面にＳｉＯ
2層はそれぞれ必要であるが、そのアルミニウム板に接
着する面にはＳｉＯ2層は不要である。また、Ａｌ−Ｓ
ｉ系ろう材として、Ａｌ−７．５％Ｓｉ箔を例示した
が、これ以外にＡｌ−１３％Ｓｉ、Ａｌ−９．５％Ｓｉ
−１．０％Ｍｇ、Ａｌ−７．５％Ｓｉ−１０％Ｇｅ等か
らなる箔を用いることもできる。更に、厚膜回路をＡｕ
ペーストをスクリーン印刷してＡｕ系金属により形成し
たが、Ａｇペースト、Ａｇ−Ｐｄペースト又はＣｕペー
ストをスクリーン印刷してＡｇ系又はＣｕ系金属により
形成してもよい。In the above-mentioned Examples 2 to 4, Al 2
After the O 3 substrate and the aluminum plate are adhered, the aluminum lead terminals are adhered, but these may be adhered at the same time. In addition, the heat dissipation ceramic substrate is made of Al 2 O 3
Not limited to the substrate and the AlN substrate, a SiC substrate may be used. The AlN substrate may be used as the second, third and fourth hybrid IC substrates as in the fifth embodiment. In this case, the surface of the AlN substrate is thermally oxidized and the surface on which the circuit is formed is made of SiO 2.
Two layers are required respectively, but the SiO 2 layer is not required on the surface to be bonded to the aluminum plate. Also, Al-S
As the i-based brazing material, Al-7.5% Si foil is exemplified, but other than this, Al-13% Si and Al-9.5% Si are also used.
A foil made of -1.0% Mg, Al-7.5% Si-10% Ge, etc. can also be used. Furthermore, the thick film circuit is Au
Although the paste is screen-printed and formed of the Au-based metal, the paste may be screen-printed with an Ag paste, Ag-Pd paste, or Cu paste to be formed of the Ag-based or Cu-based metal.

【００２３】[0023]

【発明の効果】以上述べたように、従来のタングステン
の厚膜回路が形成されるハイブリッドＩＣ用基板と比べ
て、本発明のハイブリッドＩＣ用基板はＡｕ又はＡｇペ
ーストをセラミック基板表面に印刷乾燥した後、厚膜抵
抗体ペーストを塗布乾燥して同時焼成しても、或いは厚
膜抵抗体ペーストを基板表面に塗布乾燥し焼成した後、
Ｃｕペーストを印刷乾燥しＮ2雰囲気中で焼成しても、
厚膜回路が酸化せず、しかもリード端子の接着温度が厚
膜回路及び厚膜抵抗体を形成するときの温度よりも低い
ため、リード端子接着時に厚膜回路及び厚膜抵抗体が熱
変質することがない。またＡｕ，Ａｇ又はＣｕの厚膜導
体はＷの厚膜導体に比べて抵抗値が小さく、高周波用の
回路基板に利用可能な利点もある。更に厚膜回路を形成
したＡｌ2Ｏ3基板の裏面にアルミニウム板又はアルミニ
ウム板，放熱フィンを接着すれば、Ａｌ2Ｏ3基板に実装
された電子部品の熱をより効率的に放散し、放熱性の高
い基板が得られる。As described above, the hybrid IC substrate of the present invention has Au or Ag paste printed and dried on the surface of the ceramic substrate, as compared with the conventional hybrid IC substrate on which a thick film circuit of tungsten is formed. After that, even if the thick film resistor paste is applied and dried and simultaneously fired, or after the thick film resistor paste is applied and dried on the substrate surface and fired,
Even if the Cu paste is printed and dried and baked in an N 2 atmosphere,
The thick film circuit is not oxidized, and the bonding temperature of the lead terminal is lower than the temperature when forming the thick film circuit and the thick film resistor, so that the thick film circuit and the thick film resistor are thermally deteriorated when the lead terminal is bonded. Never. Further, the thick film conductor of Au, Ag or Cu has a smaller resistance value than the thick film conductor of W, and has an advantage that it can be used for a circuit board for high frequency. Furthermore, if an aluminum plate or aluminum plate and heat radiation fins are attached to the back surface of the Al 2 O 3 substrate on which the thick film circuit is formed, the heat of the electronic components mounted on the Al 2 O 3 substrate can be dissipated more efficiently and the heat radiation A highly flexible substrate can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１のリード端子付き厚膜ハイブリッ
ドＩＣ用基板の断面図。FIG. 1 is a cross-sectional view of a first thick film hybrid IC substrate with lead terminals according to the present invention.

【図２】本発明の第２のリード端子付き厚膜ハイブリッ
ドＩＣ用基板の断面図。FIG. 2 is a cross-sectional view of a second thick film hybrid IC substrate with lead terminals according to the present invention.

【図３】本発明の第３のリード端子付き厚膜ハイブリッ
ドＩＣ用基板の断面図。FIG. 3 is a cross-sectional view of a third thick film hybrid IC substrate with lead terminals according to the present invention.

【図４】本発明の第４のリード端子付き厚膜ハイブリッ
ドＩＣ用基板の平面図。FIG. 4 is a plan view of a thick film hybrid IC substrate with lead terminals according to a fourth embodiment of the present invention.

【図５】図４のＡ−Ａ線断面図。5 is a cross-sectional view taken along the line AA of FIG.

【図６】本発明の別の第１のリード端子付き厚膜ハイブ
リッドＩＣ用基板の断面図。FIG. 6 is a cross-sectional view of another first thick film hybrid IC substrate with lead terminals of the present invention.

【符号の説明】[Explanation of symbols]

１０，２０，３０，４０，５０ ハイブリッドＩＣ用基
板 １１ 第１放熱用セラミック基板（Ａｌ2Ｏ3基板） １１ａ スルーホール １２ 厚膜回路 １２ａ 厚膜抵抗体 １２ｂ アース回路 １３ リード端子 ２１ アルミニウム板 ２２ 第２放熱用セラミック基板（Ａｌ2Ｏ3基板） ２２ａ サーマルビア ３１ 放熱フィン ３２ 枠板 ４１ 第１放熱用セラミック基板（ＡｌＮ基板） ４２ 酸化層（Ａｌ2Ｏ3層） ４３ ＳｉＯ2層10, 20, 30, 40, 50 Hybrid IC substrate 11 First heat dissipation ceramic substrate (Al 2 O 3 substrate) 11a Through hole 12 Thick film circuit 12a Thick film resistor 12b Earth circuit 13 Lead terminal 21 Aluminum plate 22 Second 2 Heat Dissipation Ceramic Substrate (Al 2 O 3 Substrate) 22a Thermal Via 31 Heat Dissipation Fin 32 Frame Plate 41 First Heat Dissipation Ceramic Substrate (AlN Substrate) 42 Oxide Layer (Al 2 O 3 Layer) 43 SiO 2 Layer

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０５Ｋ 1/03 Ｌ 7511−4Ｅ 1/05 Ｚ Continuation of front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H05K 1/03 L 7511-4E 1/05 Z

Claims (7)

【特許請求の範囲】[Claims] 【請求項１】 第１放熱用セラミック基板(11,41)の表
面に厚膜抵抗体(12a)を含むＡｕ系，Ａｇ系又はＣｕ系
金属からなる厚膜回路(12)が形成され、かつ前記基板(1
1,41)の表面端部に前記厚膜回路(12)に電気的に接続す
るためのアルミニウムからなるリード端子(13)がＡｌ−
Ｓｉ系ろう材を介して接着されたリード端子付き厚膜ハ
イブリッドＩＣ用基板。1. A thick film circuit (12) made of Au-based, Ag-based or Cu-based metal including a thick film resistor (12a) is formed on the surface of a first heat dissipation ceramic substrate (11, 41), and The substrate (1
A lead terminal (13) made of aluminum for electrically connecting to the thick film circuit (12) is provided at the end of the surface of
A thick film hybrid IC substrate with lead terminals adhered via a Si-based brazing material. 【請求項２】 第１放熱用セラミック基板(11,41)とア
ルミニウム板(21)と第２放熱用セラミック基板(22)とが
それぞれＡｌ−Ｓｉ系ろう材を介してこの順に積層接着
され、 前記第１放熱用セラミック基板(11,41)の表面に厚膜抵
抗体(12a)を含むＡｕ系，Ａｇ系又はＣｕ系金属からな
る厚膜回路(12)が形成され、前記第１放熱用セラミック
基板(11,41)の表面端部に前記厚膜回路(12)に電気的に
接続するためのアルミニウムからなるリード端子(13)が
Ａｌ−Ｓｉ系ろう材を介して接着されたリード端子付き
厚膜ハイブリッドＩＣ用基板。2. A first heat-dissipating ceramic substrate (11, 41), an aluminum plate (21), and a second heat-dissipating ceramic substrate (22) are laminated and adhered in this order via an Al--Si brazing material, respectively. A thick film circuit (12) made of Au-based, Ag-based or Cu-based metal including a thick film resistor (12a) is formed on the surface of the first heat radiation ceramic substrate (11, 41), A lead terminal (13) made of aluminum for electrically connecting to the thick film circuit (12) is adhered to an end of the surface of the ceramic substrate (11, 41) through an Al-Si brazing material. Substrate for thick film hybrid IC. 【請求項３】 第１放熱用セラミック基板(11,41)とア
ルミニウム板(21)と第２放熱用セラミック基板(22)とが
それぞれＡｌ−Ｓｉ系ろう材を介してこの順に積層接着
され、 前記第１放熱用セラミック基板(11,41)の表面に厚膜抵
抗体(12a)を含むＡｕ系，Ａｇ系又はＣｕ系金属からな
る厚膜回路(12)が形成され、前記第１放熱用セラミック
基板(11,41)の表面端部に前記厚膜回路(12)に電気的に
接続するためのアルミニウムからなるリード端子(13)が
Ａｌ−Ｓｉ系ろう材を介して接着され、かつ前記第２放
熱用セラミック基板(22)の裏面に放熱フィン(31)が接着
されたリード端子付き厚膜ハイブリッドＩＣ用基板。3. A first heat-dissipating ceramic substrate (11, 41), an aluminum plate (21), and a second heat-dissipating ceramic substrate (22) are laminated and adhered in this order through an Al-Si brazing material, respectively. A thick film circuit (12) made of Au-based, Ag-based or Cu-based metal including a thick film resistor (12a) is formed on the surface of the first heat radiation ceramic substrate (11, 41), A lead terminal (13) made of aluminum for electrically connecting to the thick film circuit (12) is adhered to a surface end of the ceramic substrate (11, 41) through an Al-Si brazing material, and A thick film hybrid IC substrate with lead terminals, in which a heat radiation fin (31) is bonded to the back surface of the second heat radiation ceramic substrate (22). 【請求項４】 第１放熱用セラミック基板(11,41)の表
面中央部に厚膜抵抗体(12a)を含むＡｕ系，Ａｇ系又は
Ｃｕ系金属からなる厚膜回路(12)が形成され、前記放熱
用セラミック基板(11,41)の表面端部に前記厚膜回路(1
2)に電気的に接続するためのアルミニウムからなるリー
ド端子(13)がＡｌ−Ｓｉ系ろう材を介して接着され、前
記厚膜回路(12)及びリード端子(13)に電気的に絶縁する
ように前記放熱用セラミック基板(11,41)の表面周縁部
にアルミニウムからなる枠板(32)がＡｌ−Ｓｉ系ろう材
を介して接着され、前記放熱用セラミック基板(11,41)
の裏面全体にアルミニウム板(21)がＡｌ−Ｓｉ系ろう材
を介して接着されたリード端子付き厚膜ハイブリッドＩ
Ｃ用基板。4. A thick film circuit (12) made of Au-based, Ag-based or Cu-based metal including a thick film resistor (12a) is formed in the central portion of the surface of the first heat dissipation ceramic substrate (11, 41). , The thick film circuit (1) at the surface end of the heat dissipation ceramic substrate (11, 41).
A lead terminal (13) made of aluminum for electrically connecting to 2) is adhered via an Al-Si brazing material to electrically insulate the thick film circuit (12) and the lead terminal (13). As described above, the frame plate (32) made of aluminum is adhered to the peripheral edge portion of the surface of the heat dissipation ceramic substrate (11, 41) through an Al-Si brazing material, and the heat dissipation ceramic substrate (11, 41).
A thick film hybrid I with lead terminals in which an aluminum plate (21) is adhered to the entire back surface of the substrate through an Al-Si brazing material.
Substrate for C. 【請求項５】 第１放熱用セラミック基板(11,41)の表
面中央部に形成された厚膜回路(12)のうちのアース回路
(12b)とアルミニウム板(21)とを電気的に接続するスル
ーホール(11a)が前記放熱用セラミック基板(11,41)に形
成された請求項４記載のリード端子付き厚膜ハイブリッ
ドＩＣ用基板。5. The earth circuit of the thick film circuit (12) formed in the central portion of the surface of the first heat dissipation ceramic substrate (11, 41).
The thick film hybrid IC substrate with lead terminals according to claim 4, wherein a through hole (11a) for electrically connecting the (12b) and the aluminum plate (21) is formed in the heat dissipation ceramic substrate (11, 41). . 【請求項６】 第１放熱用セラミック基板(11,41)がＡ
ｌ2Ｏ3基板、ＳｉＣ基板又は基板を酸化処理後基板表面
がＳｉＯ2層で被覆されたＡｌＮ基板である請求項１な
いし５いずれか記載のリード端子付き厚膜ハイブリッド
ＩＣ用基板。6. The first heat dissipating ceramic substrate (11, 41) is A
The substrate for a thick film hybrid IC with a lead terminal according to any one of claims 1 to 5, which is an l 2 O 3 substrate, a SiC substrate or an AlN substrate whose substrate surface is covered with a SiO 2 layer after the substrate is subjected to an oxidation treatment. 【請求項７】 第１及び第２放熱用セラミック基板(11,
41,21)がそれぞれＡｌ2Ｏ3基板、ＳｉＣ基板又は基板を
酸化処理後基板表面がＳｉＯ2層で被覆されたＡｌＮ基
板である請求項２又は３記載のリード端子付き厚膜ハイ
ブリッドＩＣ用基板。7. The first and second heat dissipation ceramic substrates (11,
The thick film hybrid IC substrate with lead terminals according to claim 2 or 3, wherein (41, 21) is an Al 2 O 3 substrate, a SiC substrate, or an AlN substrate whose substrate surface is covered with a SiO 2 layer after the substrate is oxidized. .
JP6154848A 1994-07-06 1994-07-06 Substrate for thick film hybrid IC with lead terminal Withdrawn JPH0823052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6154848A JPH0823052A (en) 1994-07-06 1994-07-06 Substrate for thick film hybrid IC with lead terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6154848A JPH0823052A (en) 1994-07-06 1994-07-06 Substrate for thick film hybrid IC with lead terminal

Publications (1)

Publication Number Publication Date
JPH0823052A true JPH0823052A (en) 1996-01-23

Family

ID=15593227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6154848A Withdrawn JPH0823052A (en) 1994-07-06 1994-07-06 Substrate for thick film hybrid IC with lead terminal

Country Status (1)

Country Link
JP (1) JPH0823052A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246077A (en) * 2008-03-31 2009-10-22 Sumitomo Metal Electronics Devices Inc Ceramic package
JP2013080936A (en) * 2012-11-22 2013-05-02 Tohoku Univ Silicon carbide substrate, semiconductor device and wiring board
JP2014187812A (en) * 2013-03-22 2014-10-02 Toshiba Lighting & Technology Corp Power supply circuit and lighting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246077A (en) * 2008-03-31 2009-10-22 Sumitomo Metal Electronics Devices Inc Ceramic package
JP2013080936A (en) * 2012-11-22 2013-05-02 Tohoku Univ Silicon carbide substrate, semiconductor device and wiring board
JP2014187812A (en) * 2013-03-22 2014-10-02 Toshiba Lighting & Technology Corp Power supply circuit and lighting device

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