JPH08250902A - Semiconductor phase shifter - Google Patents

Abstract

(57) [Abstract] [Purpose] Outline of setting phase accuracy has little frequency dependence
The object is to obtain a small semiconductor phase shifter capable of shifting the phase by 80 degrees. [Composition] An input / output microstrip line pattern is connected to each of a drain electrode and a source electrode of an FET having an electric length of about ¼ wavelength, a drain electrode, a source electrode, and a gate electrode, and the gate bias voltage cuts off the FET. It is configured to switch the phase by performing a passing switch operation. [Effect] There is an effect that a small and wide-band phase shifter capable of shifting the pass phase of a microwave signal by approximately 180 degrees can be obtained by causing the FET to perform a switching operation of blocking and passing by the gate bias voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention uses a field effect transistor (hereinafter referred to as FET) formed on a semiconductor substrate of silicon, gallium arsenide (hereinafter referred to as GaAs) or the like as a switch, and is a semiconductor for shifting a phase of a microwave signal. It relates to a phase shifter.

[0002]

2. Description of the Related Art FIG. 12 is a structural diagram of a conventional line switching type semiconductor phase shifter, in which 1 is a semiconductor substrate, 2 is a metal for ground, 3 is a first input / output microstrip line pattern, 4 is a second input / output microstrip line pattern, 46 is a drain electrode, 47 is a source electrode, 48 is a gate electrode, 49 is a FET, 50 is a gate electrode connection pattern, 51 is a bias resistor, 52 is a bias pad, 53 is a bias circuit, 54 is a reference phase microstrip line pattern, and 55 is a set phase microstrip line pattern. A gate bias voltage is applied to the gate electrode 48 of the FET 49 from the bias circuit 53 to switch the FET 49, and the drain voltage and the source voltage of the FET 49 at that time are set to have the same DC potential. 47 is normally grounded and used, but the bias circuit for that is not shown.

Next, the operation will be described. Now, assuming that the drain voltage and the source voltage have the same DC potential, for example, 0 V,
By switching the gate voltage between 0 V and the pinch-off voltage, the drain electrode 46 and the source electrode 47 of the FET 49 are
During that period, a microwave signal operates as a switch for passing and blocking. Therefore, when the first FET 49a and the third FET 49c are cut off and the second FET 49b and the fourth FET 49d are made to pass, the microwave signal input from the first input / output microstrip line pattern 3 is used for the reference phase. It propagates on the microstrip line pattern 54 side and outputs it to the second input / output microstrip line pattern 4. Next, when the first FET 49a and the third FET 49c are passed and the second FET 49b and the fourth FET 49d are cut off, the microwave signal input from the first input / output microstrip line pattern 3 is set to the set phase. It propagates on the side of the microstrip line pattern 55 for input and outputs to the second input / output microstrip line pattern 4.
In this way, by switching the propagation path of the microwave signal, the microwave signal can be phase-shifted by the difference in electrical length of the path.

[0004]

The conventional line switching type semiconductor phase shifter is constructed as described above and is based on the above-mentioned operation principle. Therefore, the larger the set phase, the more set the phase shifts. There is a problem that the phase error becomes large and the set phase microstrip line pattern 55 shown in FIG.

The present invention has been made in order to solve the above problems, and an object thereof is to obtain a semiconductor phase shifter which is small in size, has little frequency dependence of set phase accuracy, and can shift a phase by approximately 180 degrees. To do.

[0006]

A semiconductor phase shifter according to a first embodiment of the present invention comprises a first input / output microstrip line pattern and a second input / output microstrip line pattern formed on an upper surface of a semiconductor substrate. And an FET having a drain electrode, a source electrode, and a gate electrode having an electrical length of about ¼ wavelength, and one end of the drain electrode is connected to the first input / output microstrip line pattern. The one end of the source electrode is connected to the second input / output microstrip line pattern.

The semiconductor phase shifter according to the second embodiment of the present invention is the same as the semiconductor phase shifter according to the first embodiment, except that the FET has a plurality of drains, sources and gate electrodes each having an electrical length of about 1/4 wavelength. And the other ends of the plurality of drain electrodes are connected by an air bridge, and the other ends of the plurality of source electrodes are connected by an air bridge.

The semiconductor phase shifter according to the third embodiment of the present invention is the same as the FET of the first embodiment, except that a bias circuit is provided at both ends of the gate electrode so that a bias voltage can be applied from both ends of the gate electrode. is there.

A semiconductor phase shifter according to a fourth embodiment of the present invention is the same as the FET of the first embodiment, except that the gate electrode is divided in the gate axis direction and the divided gate electrodes are connected by a gate electrode connection pattern. is there.

The semiconductor phase shifter according to the fifth embodiment of the present invention is the same as the FET of the first embodiment, except that the gate electrode is divided in the gate axis direction, a bias circuit is provided for each divided gate electrode, and the divided gate is provided. A bias voltage can be applied to each electrode.

A semiconductor phase shifter according to a sixth embodiment of the present invention is the FET of the first embodiment, in which the drain electrode, the source electrode and the gate electrode are bent and arranged.

A semiconductor phase shifter according to a seventh embodiment of the present invention is the same as the semiconductor phase shifters of the first to sixth embodiments.
A DC cut capacitor is provided between one end of the drain electrode of the ET and the first input / output microstrip line pattern, and between the one end of the source electrode of the FET and the second input / output microstrip line pattern. To DC
A cut capacitor is provided, a positive potential voltage is applied to the drain electrode and the source electrode, and the gate voltage of the gate electrode can be controlled by the positive potential voltage.

The semiconductor phase shifter according to the eighth embodiment of the present invention has a resistor loaded in parallel with both or one of the first and second input / output microstrip line patterns, and the other end of the resistor. Is connected to the drain electrode of an FET whose source electrode is grounded.

[0014]

According to the first embodiment of the present invention, the electrical length between the first input / output microstrip line pattern and the second input / output microstrip line pattern formed on the upper surface of the semiconductor substrate is approximately equal. 1/4 wavelength drain electrode,
An FET having a source electrode and a gate electrode is provided, and the F
By switching off the ET and passing it,
The phase of the microwave signal input from the first input / output microstrip line pattern and output to the second input / output microstrip line pattern can be shifted by approximately 180 degrees.

Further, according to the second embodiment of the present invention, in the semiconductor phase shifter of the first embodiment, an FET including a plurality of drains, sources and gate electrodes each having an electric length of about ¼ wavelength is used. By connecting the other ends of the plurality of drain electrodes with an air bridge and connecting the other ends of the plurality of source electrodes with an air bridge, it is possible to achieve low loss and wide band.

Further, according to the third embodiment of the present invention, in the FET of the first embodiment, a bias circuit is provided at both ends of the gate electrode so that a bias voltage can be applied from both ends of the gate electrode. Even if the voltage becomes large, a uniform voltage can be applied to the gate electrode and stable operation can be performed.

According to the fourth embodiment of the present invention, in the FET of the first embodiment, the gate electrode is divided in the direction of the gate axis, and the divided gate electrodes are connected by the gate electrode connection pattern to make a large gate width. It becomes easy to form the gate electrode.

According to a fifth embodiment of the present invention, in the FET of the first embodiment, the gate electrode is divided in the gate axis direction, a bias circuit is provided for each divided gate electrode, and the divided gate electrodes are respectively formed. By making it possible to apply a bias voltage to the gate electrode, it becomes easy to form a gate electrode having a large gate width, and a uniform voltage can be applied to the gate electrode.

Further, according to a sixth embodiment of the present invention, in the FET of the first embodiment, the drain electrode, the source electrode and the gate electrode are bent and arranged, whereby the size of the semiconductor phase shifter according to the present invention is increased. It can be shortened in the input / output direction.

Further, according to the seventh embodiment of the present invention, in the semiconductor phase shifter of the first to sixth embodiments, between the one end of the drain electrode of the FET and the first microstrip line pattern for input / output. A DC cut capacitor is provided, and a DC cut capacitor is provided between one end of the source electrode of the FET and the second input / output microstrip line pattern to apply a positive potential voltage to the drain electrode and the source electrode. The gate voltage of the gate electrode can be controlled by a positive potential voltage.

According to the eighth embodiment of the present invention, a resistor is loaded in parallel with both or one of the first and second input / output microstrip line patterns, and the source electrode is provided at the other end of the resistor. A loss can be compensated by connecting a drain electrode of a grounded FET to electrically switch the resistor through a switching operation for passing or shutting off the FET.

[0022]

【Example】

Example 1. 1 is a structural diagram of a semiconductor phase shifter showing a first embodiment of the present invention. In the figure, 5 is a drain electrode, 6 is a source electrode, 7 is a gate electrode, 8 is an FET, 9 is a gate electrode connection pattern, and 10 is a gate electrode connection pattern. Is a bias resistor, 11 is a bias pad, and 12 is a bias circuit. In FIG. 1, a gate bias voltage is applied from the bias circuit 12 to the gate electrode 7 of the FET 8 to switch the FET 8, and at that time the drain voltage and the source voltage of the FET 8 have the same DC potential. Source electrode 6
Is normally grounded and used, but a bias circuit therefor is not shown.

Next, the operation will be described. Now, assuming that the drain voltage and the source voltage have the same DC potential, for example, 0 V, the drain electrode 5 and the source electrode 6 of the FET 8 are switched by switching the gate voltage between 0 V and the pinch-off voltage.
During this period, microwave signals pass through and switch off. Therefore, when the FET 8 is in the passing state, the FET 8 equivalently operates as a line of about 1/4 wavelength. On the other hand, FET8
In the cut-off state, the FET 8 equivalently operates as a coupled line of about 1/4 wavelength. Since the electrical length difference between the quarter wavelength line and the quarter wavelength coupled line is approximately 180 degrees, F
A first input / output microstrip line pattern 3 is formed by switching operation of passing and blocking ET8.
It is possible to shift the phase of the microwave signal, which is further input and output to the second input / output microstrip line pattern 4, by approximately 180 degrees.

Embodiment 2 FIG. Second Embodiment FIG. 2 is a structural diagram of a semiconductor phase shifter showing a second embodiment of the present invention. In the figure, 13 is a drain electrode, 14 is a source electrode, 15 is a gate electrode, 16
Is an FET, 17 is an air bridge for connecting the tips of the drain electrodes 13a and 13b, and 18 is a source electrode 1
An air bridge for connecting the tips of 4a and 14b, and an air bridge 19 for connecting the drain electrode 13b and the first input / output microstrip line pattern. Compared with the structural example shown in FIG. Since the FET 16 is composed of a plurality of drain electrodes 13 and source electrodes 14, when the FET 16 is in the passing state, the drain electrode 1
3, the conduction resistance between the source electrode 14 and the source electrode 14 is reduced, and the passage loss can be reduced. Further, when the FET 16 is in the cutoff state, the drain electrode 13 and the source electrode 14 are more closely coupled, so that the band can be made wider than that of the structure of FIG.

Example 3. Third Embodiment FIG. 3 is a structural diagram of a semiconductor phase shifter showing a third embodiment of the invention. In the structure of FIG. 3, the gate electrode 7
Bias circuits 12a and 12b are provided at both ends of the gate electrode 7, and a bias voltage can be applied from both ends of the gate electrode 7 to apply a uniform voltage to the gate electrode 7. Therefore, even if the FET 8 becomes large, a uniform and stable operation can be performed. .

Example 4. Fourth Embodiment FIG. 4 is a structural diagram of a semiconductor phase shifter showing a fourth embodiment of the present invention, in which reference numeral 20 is a gate electrode connection pattern for connecting gate electrodes 7a, 7b, 7c divided in the width direction. When it is necessary to form a large FET with a low operating frequency in the structure of FIG. 1, it is necessary to form a large gate width, but it is difficult to form it uniformly because the gate length is usually as short as 1 μm. In this embodiment, since the gate electrode is divided within the range in which it can be uniformly formed in the width direction and then connected, a FET having a uniform and large gate width can be formed.

Example 5. FIG. 5 is a structural diagram of a semiconductor phase shifter showing Embodiment 5 of the present invention, in which reference numeral 21 is an air bridge for connecting the divided source electrodes 6a, 6b, 6c. Large F with low operating frequency
When it is necessary to form an ET, it is necessary to form a large gate width, but it is usually difficult to form it uniformly because the gate length is short, around 1 μm, and a uniform voltage must be applied to the gate electrode. Will also be difficult. In the present embodiment, since the gate electrode is divided in a range capable of being formed uniformly in the width direction and a bias circuit is provided for each gate electrode to apply a bias voltage, a large gate width for uniform and stable operation is provided. Can be configured.

Example 6. 6 and 7 are structural views of a semiconductor phase shifter showing a sixth embodiment of the present invention. 6 and 7
In the structure shown in FIG. 1, the drain electrode 5, the source electrode 6, and the gate electrode 7 are bent to form the FET 8, and the size of the semiconductor phase shifter according to the present invention can be shortened in the input / output direction.

Example 7. 8 is a structural diagram of a semiconductor phase shifter showing a seventh embodiment of the present invention. In the figure, 22 is an upper electrode of a parallel plate capacitor, 23 is a dielectric, 24 is a base electrode of a parallel plate capacitor, and 25 is a parallel electrode. Plate capacitor, 26 is a bias resistor, 27 is a bias pad, 2
Reference numeral 8 is a bias circuit including a bias resistor 26 and a bias pad 27.

Next, the operation will be described. When a positive potential voltage AV (A> | pinch-off voltage | of FET8 |) is applied to the bias pad 28 now, the drain electrode 5 and the source electrode 6 of the FET 8 become positive potential, so that the gate voltage is switched between AV and 0V. A microwave signal passes between the drain electrode 5 and the source electrode 6 of the above, and performs a switch operation of blocking. That is, since the gate voltage can be controlled with a positive potential, for example, TTL control is possible, and the size including the external drive circuit can be reduced.

Example 8. 9 is a structural diagram of a semiconductor phase shifter showing an eighth embodiment of the present invention, in which 29 is a drain electrode, 30 is a source electrode, 31 is a gate electrode, and 32 is
Is a FET, 33 is a resistor, 34 is a ground pattern, 35
Is a via hole for establishing electrical connection between the ground pattern 34 and the ground metal 2, 36 is a gate electrode connection pattern, 37 is a bias resistor, 38 is a bias pad, 3
A bias circuit 9 is composed of a bias resistor 37 and a bias pad 38.

10 and 11 show the FET 32 and the resistor 3
10 is an equivalent circuit diagram for explaining the operation of the circuit section composed of 3; FIG. 10 shows the drain electrode 29 and the source electrode 30 of the FET 32.
Is an equivalent circuit diagram in the passing state, and FIG. 11 is an equivalent circuit diagram in which the drain electrode 29 and the source electrode 30 of the FET 32 are in the cutoff state. In the figure, 40 and 41 are input / output terminals,
42 is a resistor corresponding to the resistor 33 of FIG. 9, 43 is FET3
2 the resistance between the drain electrode 29 and the source electrode 30 when the drain electrode 29 and the source electrode 30 are in the passing state, 44 is the ground, and 45 is the drain electrode 29 when the drain electrode 29 and the source electrode 30 of the FET 32 are in the cutoff state. A capacitor formed with the source electrode 30.

Next, the operation will be described. As shown in FIG. 10, when the FET 32 is in the passing state, the input / output terminal 40
And 41 are grounded by resistors 42 and 43, and the microwave signal input from the input / output terminal 40 is attenuated by the resistors 42 and 43 by a predetermined amount and output from the input / output terminal 41. On the other hand, as shown in FIG. 11, when the FET 32 is in the cutoff state, the input / output terminal 4
A circuit between 0 and 41 is grounded by a resistor 42 and a capacitor 45. Now, for example, if the gate width of the FET 32 is reduced and the capacitance of the capacitor 45 is reduced to the extent that it does not contribute to electrical characteristics in the used frequency band, the resistor 42 becomes electrically ineffective, and the microwave signal input from the input / output terminal 40 is caused by the resistor 42. It is output from the input / output terminal 41 without being attenuated. As described above, the circuit including the resistor 33 and the FET 32 shown in FIG. 9 operates as an attenuator when the FET 32 is in the passing state.

On the other hand, if the FET 8 is switched from the passing state to the blocking state, a phase difference of about 180 degrees can be realized.
When 8 is in the passing state, the microwave signal passing through is attenuated by the resistance between the drain electrode 5 and the source electrode 6. That is, when the FET 8 is switched from the passing state to the blocking state, the passing loss varies. Therefore, the attenuation amount by the resistors 42 and 43 shown in FIG. 10 is the same as the attenuation amount of the FET 8 in the passing state. Thus, it is possible to compensate for loss variation at the time of phase switching.

[0035]

According to the first embodiment of the present invention, an electrical length is provided between the first input / output microstrip line pattern and the second input / output microstrip line pattern formed on the upper surface of the semiconductor substrate. Provides an FET having a drain electrode, a source electrode, and a gate electrode of about 1/4 wavelength,
The phase of the microwave signal input from the first input / output microstrip line pattern and output to the second input / output microstrip line pattern is approximately 1 by switching the FET so that the FET is switched between passing and passing.
There is an effect that a small-sized wideband phase shifter capable of shifting the phase by 80 degrees can be obtained.

According to the second embodiment of the present invention, each of the semiconductor phase shifters in the first embodiment has an electric length of about 1/4.
F consisting of multiple drain, source, and gate electrodes of different wavelengths
By using ET, the other ends of the plurality of drain electrodes are connected to each other by an air bridge, and the other ends of the plurality of source electrodes are connected to each other by an air bridge, whereby low loss and wide band can be achieved. There is.

According to the third embodiment of the present invention, by providing a bias circuit at both ends of the gate electrode of the FET of the first embodiment so that a bias voltage can be applied from both ends of the gate electrode, the size of the FET is increased. Also, there is an effect that a uniform voltage can be applied to the gate electrode and stable operation can be performed.

According to the fourth embodiment of the present invention, the gate electrode of the FET of the first embodiment is divided in the direction of the gate axis, and the divided gate electrodes are connected by a gate electrode connection pattern to form a gate electrode having a large gate width. Has an effect of being easily formed.

According to the fifth embodiment of the present invention, the gate electrode of the FET of the first embodiment is divided in the gate axis direction, a bias circuit is provided for each divided gate electrode, and a bias voltage is applied to each divided gate electrode. By making it possible to apply the voltage, it is possible to easily form a gate electrode having a large gate width, and it is possible to apply a uniform voltage to the gate electrode.

According to the sixth embodiment of the present invention, by arranging the drain electrode, the source electrode and the gate electrode of the FET of the first embodiment in a bent state, the size of the semiconductor phase shifter according to the present invention can be adjusted in the input / output direction. There is an effect that can be shortened by.

According to Embodiment 7 of the present invention, Embodiments 1 to
In the semiconductor phase shifter of 6, a DC cut capacitor is provided between one end of the drain electrode of the FET and the first input / output microstrip line pattern, and one end of the source electrode of the FET and the second input / output. By providing a DC cut capacitor between the microstrip line pattern for application and applying a positive potential voltage to the drain electrode and the source electrode, the gate voltage of the gate electrode can be controlled by the positive potential voltage.

According to the eighth embodiment of the present invention, the first,
A switch is provided by loading a resistor in parallel with either or both of the second input / output microstrip line patterns, and connecting the drain electrode of the FET whose source electrode is grounded to the other end of the resistor to pass or cut off the FET. There is an effect that loss compensation can be achieved by operating the resistor and electrically making the resistor valid and invalid.

[Brief description of drawings]

FIG. 1 is a structural diagram of a semiconductor phase shifter according to a first embodiment of the present invention.

FIG. 2 is a structural diagram of a semiconductor phase shifter according to a second embodiment of the present invention.

FIG. 3 is a structural diagram of a semiconductor phase shifter according to a third embodiment of the present invention.

FIG. 4 is a structural diagram of a semiconductor phase shifter according to a fourth embodiment of the present invention.

FIG. 5 is a structural diagram of a semiconductor phase shifter according to a fifth embodiment of the present invention.

FIG. 6 is a structural diagram of a semiconductor phase shifter according to a sixth embodiment of the present invention.

FIG. 7 is another structural diagram of a semiconductor phase shifter according to Embodiment 6 of the present invention.

FIG. 8 is a structural diagram of a semiconductor phase shifter according to a seventh embodiment of the present invention.

FIG. 9 is a structural diagram of a semiconductor phase shifter according to Example 8 of the present invention.

FIG. 10 is an equivalent circuit diagram for explaining the operation of the semiconductor phase shifter according to the eighth embodiment of the present invention.

FIG. 11 is an equivalent circuit diagram for explaining the operation of the semiconductor phase shifter according to the eighth embodiment of the present invention.

FIG. 12 is a structural diagram of a conventional line switching type semiconductor phase shifter.

[Explanation of symbols]

1 semiconductor substrate, 2 ground metal, 3 first input / output microstrip line pattern, 4 2nd input / output microstrip line pattern, 5 drain electrode, 6 source electrode, 7 gate electrode, 8 FET, 9
Gate electrode connection pattern, 10 Bias resistor, 1
1 bias pad, 12 bias circuit, 13 drain electrode, 14 source electrode, 15 gate electrode, 16
FET, 17 air bridge, 18 air bridge,
19 air bridge, 20 gate electrode connection pattern,
21 air bridge, 22 upper electrode, 23 dielectric,
24 base electrode, 25 parallel plate capacitor, 26 bias resistor, 27 bias pad, 28 bias circuit, 29 drain electrode, 30 source electrode, 31
Gate electrode, 32 FET, 33 resistor, 34 ground pattern, 35 via hole, 36 gate electrode connection pattern, 37 bias resistor, 38 bias pad, 39 bias circuit, 40 input / output terminal, 41 input / output terminal, 42 resistor, 43 Resistance, 44 ground,
45 capacitor, 46 drain electrode, 47 source electrode, 48 gate electrode, 49 FET, 50 gate electrode connection pattern, 51 bias resistor, 52 bias pad, 53 bias circuit, 54 reference phase microstrip line pattern, 55 setting phase Microstrip line pattern.

Claims (8)

[Claims] 1. A semiconductor substrate, a ground metal provided on the back surface of the semiconductor substrate, first and second input / output microstrip line patterns formed on the upper surface of the semiconductor substrate, and an electrical length of about 1 / 4 wavelength drain electrode,
A field effect transistor having a source electrode and a gate electrode, one end of the drain electrode is connected to the first input / output microstrip line pattern, and one end of the source electrode is connected to the second input / output microstrip line pattern. A semiconductor phase shifter characterized by being connected to a strip line pattern. 2. The semiconductor phase shifter comprises a field effect transistor comprising a plurality of drains, sources and gate electrodes each having an electric length of about ¼ wavelength, and the other ends of the plurality of drain electrodes are connected to each other. The semiconductor phase shifter according to claim 1, wherein the semiconductor phase shifters are connected by an air bridge, and the other ends of the plurality of source electrodes are connected by an air bridge. 3. The semiconductor phase shifter according to claim 1, wherein as the field effect transistor, a bias circuit is provided at both ends of the gate electrode so that a bias voltage can be applied from both ends of the gate electrode. 4. The semiconductor phase shifter according to claim 1, wherein in the field effect transistor, a gate electrode is divided in a gate axis direction and the divided gate electrodes are connected by a gate electrode connection pattern. . 5. The field effect transistor is characterized in that a gate electrode is divided in a gate axis direction, a bias circuit is provided for each divided gate electrode, and a bias voltage can be applied to each divided gate electrode. The semiconductor phase shifter according to claim 1. 6. The semiconductor phase shifter according to claim 1, wherein the field effect transistor has a drain electrode, a source electrode, and a gate electrode bent and arranged. 7. The semiconductor phase shifter is provided with a DC cut capacitor between one end of the drain electrode of the field effect transistor and the first input / output microstrip line pattern, and the source of the field effect transistor. A DC cut capacitor is provided between one end of the electrode and the second input / output microstrip line pattern, a positive potential voltage is applied to the drain electrode and the source electrode, and the gate voltage of the gate electrode is set to a positive potential. 7. The semiconductor phase shifter according to claim 1, wherein the semiconductor phase shifter can be controlled by a voltage. 8. The semiconductor phase shifter includes the first and second semiconductor phase shifters.
And a drain electrode of a field effect transistor whose source electrode is grounded is connected to the other end of the resistor in parallel with either or both of the input / output microstrip line patterns. Item 7. The semiconductor phase shifter according to any one of items 1 to 7.