JPH083105Y2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a fixed imaging device.

[Prior Art] FIG. 3 is a schematic view of a fixed image pickup device capable of photoelectric conversion operation by an interlace system and a non-interlace system.

This fixed image pickup device is composed of a plurality of photoelectric conversion elements 10 for accumulating charges corresponding to light intensity, a vertical register 11 and a horizontal register 12 for reading out the charges accumulated in the photoelectric conversion elements and outputting them as time series signal charges. Has been done. As a method for driving the fixed image sensor, there are a 2: 1 interlace method (hereinafter, referred to as an interlace method) in which one frame (one screen) is composed of two fields, and a non-interlace method in which one frame is composed of one field.

FIGS. 4A and 4B are timing charts of vertical transfer pulses for operating the solid-state imaging device for operating in the interlaced mode. Interlace system is the third
As shown in the figure, the odd-numbered photoelectric conversion element rows 10 _ODD are used in correspondence with the odd fields and the even-numbered photoelectric conversion element rows 10 _EVEN are used in correspondence with the even fields, respectively. 1/30 for odd and even fields
The charge is accumulated according to the charge accumulation time of 2 seconds. The signal charge accumulated in the odd field and the even field is read by the vertical register 11 and the horizontal register 12 every time the vertical transfer pulses V _OC1a and V _EC1a are output.

Further, FIGS. 4C and 4D are timing charts of vertical transfer pulses for operating the fixed image pickup device for operating in the non-interlaced mode. As shown in FIG. 3, the non-interlaced method uses only the photoelectric conversion element array 10 _{ODD of} odd fields, for example. The odd-numbered field accumulates charges with a charge accumulation time of 1/60 seconds.

[Problems to be Solved by the Invention] By the way, in the non-interlaced method, when an image is read using all photoelectric conversion elements, it takes time to form an image of one frame, so that a fast-moving object is captured. Can't do it. Therefore, the number of photoelectric conversion elements per frame is halved as compared with the interlaced system in order to secure the reading speed even if the screen precision is sacrificed.

However, as shown in FIG. 4 (c), the charge accumulation time of each photoelectric conversion element in the non-interlaced system is half that in the interlaced system. Therefore, the non-interlaced method has a problem that the sensitivity is lower than that of the interlaced method.

The present invention has been made to solve the above problems, and provides a fixed image pickup device which can obtain the same sensitivity as the interlace system having a long charge storage time even in the non-interlace system having a short charge storage time. The purpose is to

[Means for Solving the Problems] A solid-state imaging device according to the present invention has a plurality of photoelectric conversion elements arranged two-dimensionally, and each photoelectric conversion element in an odd field or each photoelectric conversion element in an even field is respectively provided. In a solid-state imaging device that reads out the signal charge of either one of the accumulated signal charges in a predetermined cycle to generate an image signal, in the field cycle, an odd field vertical transfer pulse Vc, an even field vertical transfer pulse
A first signal output circuit for outputting a pulse Vs1b for reading out the signal charge of the photoelectric conversion element at a cycle of Vdb and half the frame cycle, and an odd field by analog-adding the odd field vertical transfer pulse Vc and the pulse Vs1b A first analog adder for outputting to each photoelectric conversion element, a second signal output circuit for outputting a pulse Vs3 synchronized with the pulse Vs1b, a digital addition of the pulse Vs3 and the even field vertical transfer pulse Vdb, and an even number A digital adder for outputting as a field vertical transfer pulse Va, and a second analog adder for adding the even field vertical transfer pulse Va and the pulse Vs1b and outputting the result to each photoelectric conversion element of an even field, 1st and 2nd
By the output of the analog adder, the signal charges accumulated in each photoelectric conversion element in the odd field and each photoelectric conversion element in the even field adjacent immediately below the photoelectric conversion element in the vertical direction are added and output. It was done like this.

[Operation] In the solid-state imaging device having the above configuration, during the field cycle, the first signal output circuit outputs the odd field vertical transfer pulse Vc and the pulse Vs1b having a half cycle of the frame cycle to the first analog adder, and The pulse Vs1b is output to the second analog adder, and the even field vertical transfer pulse Vdb is output to the digital adder. On the other hand, the second signal output circuit outputs the pulse Vs3 synchronized with the pulse Vs1b to the digital adder, and the digital adder digitally adds the pulse Vs3 from the second signal output circuit and the even field vertical transfer pulse Vdb. , Even field vertical transfer pulse Va
Is output to the second analog adder. The first analog adder is an odd field vertical transfer pulse Vc and the pulse Vs1b.
Is added to each photoelectric conversion element in the odd field, and the second analog adder adds the even field vertical transfer pulse Va and the pulse Vs1b to output to each photoelectric conversion element in the even field. Of the photoelectric conversion elements and the photoelectric conversion elements of even-numbered fields adjacent immediately below the respective photoelectric conversion elements in the vertical direction are added and output.

[Embodiment] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a solid-state imaging device according to an embodiment of the present invention. In FIG. 1, reference numeral 1 is a fixed image pickup device in which a plurality of photoelectric conversion elements are arranged vertically and horizontally, 2 is a signal output circuit for outputting a signal for driving the fixed image pickup device, and 3 is a signal output by the signal output circuit 2. Analog adder for analog synthesis, 4 is a signal output circuit, 5 is a digital adder, 6
Is a 2-input 1-output selection circuit, and 7 is an analog adder for synthesizing the signals output from the signal output circuit 2 and the selection circuit 6 in an analog manner.

The signal output circuit 2 is a vertical transfer pulse of an odd field.
V _C , vertical transfer pulse V _S1a or V _{S1b in} odd field with a period of 1/30 second or 1/60 second, vertical transfer pulse V _{da in} even field, vertical transfer pulse V _S1a half cycle shifted 1/30
The vertical transfer pulse V _S2 of the even field of second is output.

Further, the signal output circuit 4 outputs the vertical transfer pulse V _S3 of the even field generated from the vertical synchronizing signal VD.

Next, the operation of the solid-state imaging device according to the embodiment of the present invention will be described with reference to the timing chart of FIG. First, a case where the interlace method is used will be described. When operating by the interlace system, the signal output circuit 2 outputs the vertical transfer pulse V _{C of} the odd field and the vertical transfer of the even field as shown in FIGS. 2 (a), (b), (d) and (e). Pulse V _da , period 1/3
The vertical transfer pulse V _{S1a for} the odd field of 0 seconds and the vertical transfer pulse V _S2 for the even field are output.

The analog adder 3 adds the vertical transfer pulse V _C and the vertical transfer pulse V _S1a in an analog manner, and outputs an odd field composite signal V _OC1a as shown in FIG. 2 (f).

On the other hand, the selection circuit 6 outputs the output signal of the signal output circuit 2, that is, the vertical transfer pulse V _da to the analog adder 7 in the interlaced mode. The analog adder 7 adds the vertical transfer pulse V _da and the vertical transfer pulse V _S2 in an analog manner,
As shown in FIG. 2 (g), the composite signal V of the even field
_{Outputs EC1a} .

The solid-state image pickup device 1 operates by an interlace method with an odd field composite signal V _OC1a and an even field composite signal V _EC1a . The solid-state imaging device 1 outputs the signal charges of the photoelectric conversion elements forming the even fields and the signal charges of the photoelectric conversion elements forming the odd fields in time series.

Next, a case of operating by the non-interlaced method will be described. When operating according to the non-interlaced method, the signal output circuit 2 is operated by the signal output circuit 2 shown in FIGS.
As shown in (h), vertical transfer pulse of odd field
V _C , vertical transfer pulse for even field V _db , period 1/60
The second vertical synchronizing signal V _S1b is output. Also, the signal output circuit 4
Outputs a vertical transfer pulse V _S3 generated from the vertical synchronizing signal VD, as shown in FIG. 2 (j).

The analog adder 3 adds the vertical transfer pulse V _C and the vertical transfer pulse V _S1b in an analog manner and outputs an odd field composite signal V _OC1b as shown in FIG. 2 (i).

Further, the digital adder 5 digitally adds the vertical transfer pulses V _db and V _S3 and outputs _a composite signal V _a as shown in FIG. 2 (k).

On the other hand, the selection circuit 6 outputs the output signal of the digital adder 5, that is, the composite signal V _a, to the analog adder 7 in the non-interlaced mode.

The analog adder 7 outputs the composite signal V _a and the vertical transfer pulse V a.
_S1b is added in an analog manner, and an even field composite signal V _EC1b is output as shown in FIG. 2 (i).

The solid-state imaging device 1 operates by interlace scheme by the composite signal V _EC1b like composite signal V _OC1B and even fields of the odd field.

The solid-state imaging device 1 that operates with the composite signal V _OC1b and the composite signal V _{EC1b and the} like outputs a signal charge that is a _sum of the signal charges of the photoelectric conversion devices that operate in synchronization. Therefore, the charge storage time of each photoelectric conversion element is
1/60 second of the interlaced charge storage time
It is half of 1/30 seconds, but since it outputs the combined charge of the two photoelectric conversion elements, it is possible to obtain a solid-state imaging device with higher sensitivity than the conventional non-interlaced type. Become.

[Advantage of Device] As described above, according to the present invention, by operating the even field and the odd field in synchronization,
The signal charges are accumulated in the photoelectric conversion elements of the even field and the odd field, respectively, and the signal charges of the photoelectric conversion elements of the even field that operate simultaneously and the signal charges accumulated in the photoelectric conversion elements of the odd field are respectively By additionally outputting, a signal charge that is twice the signal charge of the conventional non-interlaced system can be obtained, so that there is an effect that a solid-state imaging device having high sensitivity can be obtained.

[Brief description of drawings]

1 is a block diagram of a solid-state image pickup device according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the solid-state image pickup device shown in FIG. 1, and FIG. 3 is a schematic diagram of a solid-state image pickup element. FIG. 4 is a timing chart showing the operation of the conventional solid-state imaging device. 1 ... Fixed image pickup device, 2, 4 ... Signal output circuit, 3, 7
…… Analog adder, 5 …… Digital adder, 6 …… Selection circuit.

Claims (1)

[Scope of utility model registration request] 1. A signal of one field of a plurality of photoelectric conversion elements arranged two-dimensionally, each of which is a signal charge accumulated in each photoelectric conversion element of an odd field or each photoelectric conversion element of an even field. In a solid-state imaging device that reads out electric charges at a predetermined cycle to generate an image signal, an odd field vertical transfer pulse is generated during a field cycle.
Vc, an even field vertical transfer pulse Vdb, and a first signal output circuit for outputting a pulse Vs1b for reading out the signal charge of the photoelectric conversion element at a cycle of half the frame cycle, and the odd field vertical transfer pulse Vc and the pulse Vs
A first analog adder for analog-adding 1b to each photoelectric conversion element in an odd field, a second signal output circuit for outputting a pulse Vs3 synchronized with the pulse Vs1b, the pulse Vs3 and the even field vertical transfer Pulse V
Digital addition of db and even field vertical transfer pulse Va
And a digital adder for outputting as the even field vertical transfer pulse Va and the pulse Vs
A second analog adder for adding 1b and outputting to each photoelectric conversion element of an even field, wherein each photoelectric conversion element of an odd field and each photoelectric conversion element thereof are output by the outputs of the first and second analog adders. A solid-state image pickup device, comprising: adding and outputting signal charges accumulated in each photoelectric conversion element of an even field which is adjacent immediately below the conversion element in a vertical direction.