JPH08314755A - Trace information recording method - Google Patents

Abstract

(57) [Summary] [Purpose] To obtain a trace information recording method capable of designating a large number of addresses as target addresses. [Arrangement] An address selecting memory 11 having an entry 12 corresponding to each address of a program area is prepared, and it is shown in each of these entries whether or not the address associated therewith is a recording target. When information is set and the information on the system bus 3 during program execution is recorded in each execution cycle, the address corresponding to the entry in which the information indicating the recording target is set is on the system bus. Only when it appears in the trace memory 6 as the trace information on the system bus.
It is intended to be recorded in.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an emulator or the like used for developing a program for a microcomputer, without delaying the execution time of the program, an address bus and a data bus during execution of the program, and other control information. The present invention relates to a trace information recording method for recording such as trace information for each execution cycle.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a system configuration of an emulator to which the present invention and a conventional trace information recording method are applied. In the figure, 1 is a target microcomputer (hereinafter referred to as target MCU), and 2 is an emulation memory in which a program executed by the target MCU 1 is stored. Reference numeral 3 is a system bus including an address bus, data bus and other control signals of the target MCU 1, and reference numeral 4 is a bus control circuit for controlling the system bus 3. Reference numeral 5 is a monitor circuit for controlling the entire emulator, 6 is a trace memory for storing trace information to be recorded on the system bus 3, and 7 is an event for judging a storage condition of the trace information to be recorded in the trace memory 6. It is a detection circuit.

FIG. 3 is a block diagram showing the internal structure of the event detection circuit 7 in FIG. 2 for explaining the conventional trace information recording method. In the figure, 5 is a monitor circuit, 6 is a trace memory, and 7 is an event detection circuit, which are the same as those denoted by the same reference numerals in FIG. Further, inside the event detection circuit 7, 8a and 8b are address comparison circuits for comparing an address held in advance with an address output onto the system bus 3, and 9a and 9b are data held in advance and the system. A data comparison circuit for comparing with the data output on the bus 3, and 10 is an event detection control circuit for controlling the address comparison circuits 8a, 8b and the data comparison circuits 9a, 9b to judge the establishment of an event. Is.

Next, the operation will be described. In the emulator system configured as shown in FIG. 2, the recording operation of the trace information by the real-time trace function is performed during the program execution of the target MCU1. That is, the target MCU 1 sequentially reads out the programs stored in the emulation memory 2 and executes them. At that time, the address, data, and information such as control signals are output onto the system bus 3 connecting the target MCU 1 and the emulation memory 2.
In the real-time trace function, the information output on the system bus 3 is recorded in the trace memory 6 as trace information for each execution cycle.

The monitor circuit 5, which controls the emulator as a whole, obtains the information output on the system bus 3 via the bus control circuit 4. At this time, the information on the system bus 3 is simultaneously passed to the event detection circuit 7. The event detection circuit 7 analyzes the received information on the system bus 3 and determines for each execution cycle whether it is the trace information to be recorded. The information on the determination conditions in the event detection circuit 7 is sent from the monitor circuit 5 to the event detection circuit 7 in advance before the target MCU 1 starts executing the program. When the event detection circuit 7 confirms that the cycle is a recording target, the information on the system bus 3 is passed to the trace memory 6 and recorded as trace information.

Next, the internal operation of the event detection circuit 7 will be described with reference to FIG. Before the execution of the target MCU 1 is started, the monitor circuit 5 passes some address information and data information, and further combination information thereof to the event detection circuit 7 in advance as a trace information storage condition. The event detection circuit 7 includes several address comparison circuits (two of 8a and 8b in the illustrated example) and several data comparison circuits (two of 9a and 9b in the illustrated example).
And the information of the address and data passed from the monitor circuit 5, respectively. When the target MCU 1 starts executing the program, the address comparison circuits 8a and 8b and the data comparison circuits 9a and 9a, respectively.
By b, the address and data information output on the system bus 3 is compared with the held address and data information. In the event detection control circuit 10, the address comparison circuits 8a and 8b, the data comparison circuit 9a,
It is confirmed whether the condition 9b is satisfied, and whether or not the condition of the combination information passed from the monitor circuit 5 is satisfied is determined.

By doing so, it becomes possible to record the trace information in the trace memory 6 only for the execution cycle satisfying the specific condition, and thereby the memory capacity of the trace memory 6 can be saved. it can.

When it is attempted to record the information of the execution cycles of a plurality of specific addresses by using the event detection circuit 7 as described above, the address information to be recorded is divided into different address comparison circuits 8a and 8a, respectively. 8b ...
To one of the address comparison circuits 8a (8b, ...
When the condition (...) Is satisfied, the information is recorded in the trace memory 6.

As a document in which a technique related to such a conventional trace information recording method is described, for example, JP-A-63-298452 or JP-A-62-1 is available.
21556 and the like.

[0010]

Since the conventional trace information recording method is configured as described above, it is intended to record only the information in the execution cycle of a plurality of specific addresses in the trace memory 6 by the real-time trace function. In this case, it is necessary to set different addresses for the respective address comparison circuits 8a and 8b of the event detection circuit 7, and when it is desired to record only the addresses corresponding to the beginning of each line of the source program of the high-level language program,
The number of addresses to be recorded becomes enormous, and the address comparison circuits 8a and 8b must be prepared for each of them, which makes it difficult to realize such an emulator. there were.

The present invention has been made to solve the above problems, and when only the cycle of a specific address is to be recorded, a large number of addresses can be designated as the target address. The purpose is to obtain a possible trace information recording method.

[0012]

A trace information recording method according to the present invention has a one-to-one correspondence with each address in a program area.
The memory for address selection having the corresponding entry is prepared, and information indicating whether or not the address associated with each is to be recorded is set in each of these entries, and the system bus during program execution is set. When the above information is recorded for each execution cycle, the entry corresponding to the address appearing on the system bus of the address selection memory holds information indicating that the address is a recording target. Only, the information on the system bus is recorded in the trace memory as trace information.

[0013]

In the memory for address selection according to the present invention, each entry has a one-to-one correspondence with each address in the address space of the target MCU, and indicates whether or not the corresponding address is the memory value. The corresponding value can be easily accessed by holding the logical value and using the program address value of the target MCU. The event detection circuit outputs the address value in the cycle in which the address is output on the system bus. A large number of addresses are specified as target addresses by referring to the address selection memory by using it and determining from the logical value of the corresponding entry whether the information on the system bus at that time is to be recorded. A trace information recording method that can be realized is realized.

[0014]

【Example】

Example 1. An embodiment of the present invention will be described below with reference to the drawings. 1 is a block diagram showing an internal configuration of an event detection circuit for explaining a trace information recording method according to a first embodiment of the present invention. In the figure, 5 is a monitor circuit, 6 is a trace memory, 7 is an event detection circuit, 10
Is an event detection control circuit, and these are the same as or equivalent to those of the conventional one denoted by the same reference numeral in FIG. 3, and therefore detailed description thereof will be omitted. Reference numeral 11 is an address selection memory having an entry that corresponds to each address in the program area on a one-to-one basis. Reference numeral 12 is the entry of the address selecting memory 11, and information indicating whether or not the address associated with each of the entries is a recording target is set.

Next, the operation will be described. Monitor circuit 5
First, before the execution of the target MCU 1 is started, the information of the address to be recorded in advance is sent to the event detection circuit 7. In the event detection circuit 7, the event detection control circuit 10 receives the address information from the monitor circuit 5. In the event detection control circuit 10, according to the received address information of the recording target, the entry 12 associated with the recording target address of the address selecting memory 11 has a logical value indicating that the recording target is, for example, “1”. ", And other entries 1
A logical value indicating that it is not a recording target, for example, “0” is set in 2.

Next, during execution of the target MCU 1, the monitor circuit 5 obtains the information output on the system bus 3 via the bus control circuit 4 and controls the emulator as a whole. At this time, the information on the system bus 3 is also passed to the event detection circuit 7 at the same time. In the event detection circuit 7, the event detection control circuit 10 receives the information on the system bus 3, and it is determined in each execution cycle whether or not it is the trace information to be recorded. That is, the event detection control circuit 10 takes in the address information when the address is output on the system bus 3, and refers to the corresponding entry 12 of the address selection memory 11 using the address information. As a result, if a logical value “1” indicating that the data is to be recorded is set in the entry 12, the contents of the system bus 3 in the execution cycle at that time are passed to the trace memory 6 and are traced as trace information. It is recorded in the memory 6. On the other hand, if the entry 12 is set to the logical value “0” indicating that it is not a recording target, the contents of the system bus 3 in the execution cycle at that time are not passed to the trace memory 6 and they are used as trace information. It will not be recorded.

[0017]

As described above, according to the present invention, an address selecting memory having an entry having a one-to-one correspondence with each address of the program area is prepared, and the address corresponding to each entry is a recording target. Information indicating whether or not is set, and the information on the system bus is traced only when the address corresponding to the entry for which the information indicating that it is a recording target is set appears on the system bus. Since it is configured to be recorded in the memory, it is possible to specify a large number of addresses as the target addresses, for example, in the program area such as the beginning of the source program of the high-level language program or the address corresponding to the jump destination of the branch statement Trace information recording method that can record the history of access to scattered addresses for a long time There is an effect obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an internal configuration of an event detection circuit for explaining a trace information recording method according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a system configuration of an emulator to which the present invention and a conventional trace information recording method are applied.

FIG. 3 is a block diagram showing an internal configuration of an event detection circuit for explaining a conventional trace information recording method.

[Explanation of symbols]

3 system bus, 4 bus control circuit, 6 trace memory, 11 address selection memory, 12 entries.

Claims (1)

[Claims] 1. A trace information recording method for recording information such as addresses and data on a system bus at the time of program execution as trace information in a trace memory for each execution cycle, in each of areas where the program is stored. Information indicating whether or not an address selection memory having an entry that corresponds to an address on a one-to-one basis is prepared and whether or not the address associated with each entry of the address selection memory is a recording target Is set, and the information on the system bus is changed to the trace memory only when the address corresponding to the entry in which the information indicating the recording target of the address selection memory is set appears on the system bus. A method for recording trace information, which is characterized in that