JPH0851153A - Semiconductor device having multilayer wiring - Google Patents

Abstract

PURPOSE:To inhibit increase in cost while forming wiring having high reliability by preventing the generation of residue at the time of the etchback of a buried metallic layer for a plug even when the flatness is inferior for an inter-layer insulating film. CONSTITUTION:An inter-layer insulating film 6 is formed from the upper section of a lower layer wiring 4, a through-hole 8 is formed, an adhesive layer 10 is shaped, and an Al-Si-Cu film is formed onto the adhesive layer 10 as a low melting-point metallic material layer 20. The formed Al-Si-Cu film is annealed for one min at 600 deg.C in a vacuum, and made to reflow, thus improving the flatness of a surface. A tungsten film 12 for buying the through-hole is shaped, and the tungsten film 12 is left only in the through-hole through etchback. Since the flatness inferior section of the inter-layer insulating film 5 is flattened by the reflow of the low melting-point metallic material layer 20 at that time, no residue remains in the recessed section of the surface of the inter-layer insulating film at the time of the etchback of the tungsten 12. A metallic layer for upper layer wiring is formed, and the upper layer wiring is formed through patterning.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a multi-layer wiring structure, and more particularly to a wiring structure in which a metal material called a plug for connecting a lower conductive layer and an upper conductive layer is buried in a contact hole or a through hole. And a method for manufacturing the same.

[0002]

2. Description of the Related Art As a material for a multilayer wiring having a plug,
Tungsten formed by a blanket tungsten process or a selective tungsten process, TiN formed by a CVD method, or the like is widely used as a buried metal for a plug. The material of the wiring provided on the embedded metal of the plug is a TiN film or Ti as an adhesion layer.
An aluminum-based metal film is laminated on the W film formed, for example, Al-Si-Cu / TiN, Al-Si-C.
u / TiW or the like is used, and an Al-Si-Cu single layer film is also widely used.

Of the conventional methods, a method of forming a lower layer wiring and an upper layer wiring is shown in FIG. Here, as an example, a blanket tungsten is used as the embedded metal for the plug and an Al-Si-Cu / TiN laminated structure is used as the wiring metal. (A) A lower layer wiring 4 made of a material such as Al-Si-Cu or Al-Cu is formed on the base 2, and an interlayer insulating film 6 is formed thereon. Through holes for connecting the upper wiring and the lower wiring are formed in the interlayer insulating film 6 by lithography and etching, and then the TiN film 10 is formed as an adhesion layer of tungsten. From there, a blanket tungsten film 12 to be embedded as a plug is formed.

(B) The tungsten film 12 is etched back in order to leave the embedded metal for the plug only in the through hole. At this time, if the interlayer insulating film 6 has poor flatness, the tungsten 12a remains as a residue in the recesses other than the through holes. (C) After that, the metal film 14 for the upper layer wiring is formed of, for example, Al—Si—Cu or Al—Cu, and patterned by lithography and etching to form the upper layer wiring. The etching of the wiring metal film is usually performed using chlorine gas, but since tungsten is not etched by chlorine, the tungsten residue 12a remains even after the upper wiring is patterned, which causes a short circuit between the wirings.

Therefore, in the method of forming the plug by using the etch back process, the flatness of the interlayer insulating film 6 is important. However, as the miniaturization of the LSI process progresses, obtaining sufficient flatness of the interlayer insulating film becomes a factor of complicating the process and increasing the cost.

[0006]

In the conventional wiring structure,
As shown in FIG. 1C, the tungsten 12 is in contact with the TiN film 10 at the plug portion. It cannot be said that tungsten has excellent adhesion to TiN. Further, tungsten tends to grow with a large grain size on TiN. In the manufacturing method, as described in the description of FIG. 1, when the interlayer insulating film has poor flatness, the tungsten residue 12a is generated.

Therefore, according to the present invention, even when the flatness of the interlayer insulating film is poor, the residue 12a is not generated during the etching back of the embedded metal layer for the plug to suppress the cost increase and to form the wiring with high reliability. The purpose is to be able to.

[0008]

In the multilayer wiring of the semiconductor device of the present invention, the low melting point metal material layer is provided under the metal material embedded as the plug. Focusing on the upper layer wiring, it has a laminated structure in which a metal material layer having a low melting point is provided as a lower layer in a portion other than the plug portion, and a metal material layer for mainly passing a current is formed thereon. An adhesion layer is preferably formed between the low melting point metal material layer and the insulating film. In a preferred example, the main component of the low melting point metal material layer is aluminum.

The manufacturing method of the present invention includes the following steps (A) to (E) to form a multilayer wiring. (A) a step of forming an insulating film on a lower electrode or wiring and forming a contact hole or a through hole in the insulating film, (B) a step of forming an adhesion layer on the insulating film, (C) the adhesion A step of forming a low-melting metal material layer on the layer and performing heat treatment in an inert atmosphere or in a vacuum to reflow the low-melting metal material layer; (D) forming a plug on the reflowed low-melting metal material layer For forming an embedded metal film for etching and leaving the metal film only in the plug formation portion by etching back, (E) After that, a metal film for upper layer wiring is formed, and the metal film is patterned to form an upper layer wiring. Forming step.

[0010]

In the present invention, the low melting point metal material layer is provided under the metal material embedded as the plug, and the low melting point metal material layer is a material mainly containing aluminum in a preferred example. Tungsten is generally used as the material of the plug, and an adhesion layer such as a Ti film, a TiN film, or a TiW film is provided to improve the adhesion between the tungsten as a plug and the insulating film in a contact hole or a through hole. However, in this case, since a low melting point metal material layer made of a material containing aluminum as a main component is further present between the tungsten and the adhesion layer in the present invention, the tungsten is directly contacted with the adhesion layer such as TiN. The interposition of the low melting point metal material layer improves the adhesiveness rather than the contact. When tungsten is formed on a film containing aluminum as a main component, the grain size is smaller than that formed directly on a TiN film or the like, and good characteristics are obtained as a plug.

In the manufacturing method of the present invention, the low melting point metal material layer is reflowed even when the flatness of the insulating film is not good, so that the tungsten film for the plug is formed on the surface of which the flatness is improved by the reflow. Therefore, when the tungsten film is etched back, the tungsten film does not remain in the portions other than the contact holes and the through holes.

[0012]

Embodiment FIG. 2 shows an embodiment. FIG.
The same reference numerals are used for the same portions for comparison with. The lower layer wiring 4 is formed on the underlayer 2, and SiO 2 is formed on the lower layer wiring 4.
An interlayer insulating film 6 such as ₂ is formed, and a Ti film, a TiN film, or a TiW film 10 as an adhesion layer is formed in the through hole to a thickness of about 200Å, and the low melting point metal material layer 20 is formed thereon. Al-Si-Cu film, Al-Si as
A film or an Al-Cu film is formed with a thickness of about 1000Å. In the through hole, the plug tungsten 12 is embedded through the adhesion layer 10 and the low melting point metal material layer 20. On the tungsten 12, an upper wiring 14 mainly for passing a current is formed of an Al-Si-Cu film, Al.
-Si film or Al-Cu film.

Upper layer wirings are formed on the interlayer insulating film 6 in portions other than the through holes as well, but the structure is such that the low melting point metal material layer is formed via the adhesion layer 10 formed on the interlayer insulating film 6. 20 and a metal material layer 14 for upper wiring are laminated to form a laminated structure. The surface of the interlayer insulating film 6 does not have good flatness, and even if a recess is present, no tungsten residue is present in the recess.

Next, an embodiment of a method of manufacturing the wiring having the structure shown in FIG. 2 will be described with reference to FIGS. 3 and 4. (A) As the underlayer 2, a SiO ₂ film 2b formed on a (100) silicon substrate 2a by a plasma CVD method to a thickness of about 5000Å is used. In order to form a lower metal wiring, an Al—Si—Cu film is deposited on the SiO ₂ film 2b to a thickness of about 1 μm by a sputtering method and patterned for wiring by lithography and etching.

Next, a SiO ₂ film is formed as an interlayer insulating film 6 on the lower wiring 4 to a thickness of about 1 μm. Through holes 8 are formed in the interlayer insulating film 6 by lithography and etching.
Then, a Ti film is deposited as the adhesion layer 10 to a thickness of about 200Å by the sputtering method. An Al-Si-Cu film as the low-melting point metal material layer 20 is formed thereon with a thickness of about 100.
Form to a thickness of 0Å. A DC magnetron sputtering method is used as a method for forming the Al-Si-Cu film, and the film forming conditions are a film forming temperature of 200 ° C. and an Ar gas pressure of 3 mTor.
r, DC power 2KW.

(B) The formed Al-Si-Cu film was annealed in vacuum at 600 ° C. for 1 minute and reflowed to improve the surface flatness. (C) Blanket tungsten film 1 as a metal material layer for filling a through hole on the Al-Si-Cu film
Form 2 to a thickness of approximately 7,000Å. The formation conditions are: gas pressure 80 Torr, WF ₆ flow rate 5 SCCM, N ₂ flow rate 30 SCC.
The flow rate of M and H _{2 was 20} SCCM, and the substrate temperature was 450 ° C.

(D) Next, the burying tungsten film 12
Is etched back using a mixed gas of SF ₆ gas and Ar. The etching conditions are gas pressure of 200 mTorr,
SF ₆ flow rate 100 SCCM, Ar flow rate 100 SCCM,
RF power was 300 W and etching time was 2 minutes. As a result, the tungsten film 12 remains only in the through holes.
At this time, since the portion of the interlayer insulating film 6 having poor flatness is flattened by the reflow of the Al—Si—Cu film that is the low-melting-point metal material layer 20, the concave portion of the surface of the interlayer insulating film is etched when the tungsten 12 is etched back. No residue will remain on the.

(E) Next, an Al-Si-Cu film is formed as the upper wiring metal layer 14 to a thickness of about 5000 Å. (F) The upper wiring metal layer 14, the low melting point metal material layer 20, and the adhesion layer 10 are patterned by lithography and etching to form an upper wiring.

FIGS. 5A and 5B show other embodiments, respectively. In the manufacturing method of FIGS. 3 and 4, the adhesion layer 10 is provided below the low melting point metal material layer 20, but when the low melting point metal material layer 20 itself is a material having good adhesion to the interlayer insulating film 6. In addition, the adhesion layer 10 can be omitted. FIG. 5A shows a wiring portion formed by omitting the adhesion layer 10 in such a case.
As compared with FIG. 2, the adhesion layer 10 is omitted.

In the embodiment shown in FIG. 5B, the low melting point metal material layer 20 is further etched after the buried metal tungsten film 12 is etched back in the step (D) in the manufacturing method shown in FIGS. The low melting point metal material layer 20 is not left on the interlayer insulating film 6. As a result, as shown in FIG. 5B, the low-melting-point metal material layer 20 is not included as the wiring metal, and the low-melting-point metal material layer 20 remains only under the buried metal 12 of the plug.

FIG. 6 shows a wiring pattern for measuring the reliability of the wiring in the present invention. With the structure of the embodiment shown in FIG. 2, the lower layer wiring 4 and the upper layer wiring 14 are formed.
And patterned into various lines / spaces, which is referred to as Example 1. 14a and 14b are measuring pads. Example 2 is one in which the wiring pattern of FIG. 6 is formed in the structure of FIG. In forming the wiring shown in FIG. 5B, the Al—Si—Cu film of the low melting point metal material layer 20 is etched with chlorine gas after the tungsten film 12 is etched back. The etching condition at that time is a gas pressure of 1 Torr. , Cl ₂ flow rate 20SCCM, Ar flow rate 50SCC
M, RF power 300 W, etching time 30 seconds.

As a comparative example of the present invention, a wiring is formed by directly forming a blanket tungsten film on the adhesion layer 10 without going through the process of forming the low melting point metal material layer 20 and the annealing process in Example 1, that is, A comparative example is one in which the measurement wiring pattern of FIG. 6 is formed by the manufacturing method of FIG. In each of Example 1, Example 2, and Comparative Example, the line width and the space width of the lower layer wiring 4 were set to the same value and changed in the range of 0.5 to 5.0 μm. The line width and space width of the upper layer wiring 14 are each 1
It was kept constant at μm. The results are summarized in Table 1.

[0023]

[Table 1]

In the comparative example, the line / space is 1 to 3 μm.
A short circuit occurred at. Microscopic observation of the sample confirmed that this short circuit was caused by the residue of tungsten. In Examples 1 and 2, such a short circuit did not occur in the line / space of 0.5 to 5.0 μm. Although the present invention is applied to the connection by the through hole in the embodiments, it can be similarly applied to the contact hole.

[0025]

According to the present invention, the adhesion between the tungsten embedded as a plug in the contact hole and the through hole and the insulating film is improved, and the residue due to the etch back of the metal material layer embedded as the plug is eliminated, so that the upper wiring It is possible to realize a highly reliable multi-layer wiring by eliminating the short circuit.

[Brief description of drawings]

FIG. 1 is a process cross-sectional view showing a method of forming a multilayer wiring by a conventional method.

FIG. 2 is a sectional view showing an example.

FIG. 3 is a process sectional view showing a first half of a process showing the method for manufacturing the embodiment of FIG. 2;

FIG. 4 is a process sectional view showing a latter half of a process showing the method for manufacturing the embodiment of FIG.

5A and 5B are cross-sectional views showing another embodiment.

FIG. 6 is a plan view showing a test pattern for checking the reliability of wiring.

[Explanation of symbols]

 2 Underlayer 4 Lower layer wiring 6 Interlayer insulating film 8 Through hole 10 Adhesion layer 12 Plug tungsten 14 Upper layer wiring 20 Low melting point metal material layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/3205

Claims (5)

[Claims] 1. An upper layer wiring is formed on a lower layer electrode or wiring via an insulating film, and a metal material is provided in a contact hole or a through hole formed in the insulating film between the lower layer electrode or wiring and the upper layer wiring. In a semiconductor device having a multi-layer wiring connected via a plug having embedded therein, a low melting point metal material layer is provided under a metal material embedded as a plug. 2. The upper layer wiring has a laminated structure in which the low melting point metal material layer is provided as a lower layer in a portion other than the plug portion, and a metal material layer for mainly passing a current is formed thereon. 1. The semiconductor device according to 1. 3. The semiconductor device according to claim 1, wherein an adhesion layer is formed between the low melting point metal material layer and the insulating film. 4. The semiconductor device according to claim 1, wherein the main component of the low melting point metal material layer is aluminum. 5. A method of manufacturing a semiconductor device, which comprises forming a multilayer wiring including the following steps (A) to (E). (A) a step of forming an insulating film on a lower electrode or wiring and forming a contact hole or a through hole in the insulating film, (B) a step of forming an adhesion layer on the insulating film, (C) the adhesion A step of forming a low-melting metal material layer on the layer and performing heat treatment in an inert atmosphere or in a vacuum to reflow the low-melting metal material layer; (D) forming a plug on the reflowed low-melting metal material layer For forming an embedded metal film for etching and leaving the metal film only in the plug formation portion by etching back, (E) After that, a metal film for upper layer wiring is formed, and the metal film is patterned to form an upper layer wiring. Forming step.