JPH0855973A - Method of manufacturing solid-state image sensor - Google Patents

Method of manufacturing solid-state image sensor

Info

Publication number
JPH0855973A
JPH0855973A JP6211941A JP21194194A JPH0855973A JP H0855973 A JPH0855973 A JP H0855973A JP 6211941 A JP6211941 A JP 6211941A JP 21194194 A JP21194194 A JP 21194194A JP H0855973 A JPH0855973 A JP H0855973A
Authority
JP
Japan
Prior art keywords
state image
solid
heat treatment
image sensor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6211941A
Other languages
Japanese (ja)
Inventor
Ritsuo Takizawa
律夫 滝澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP6211941A priority Critical patent/JPH0855973A/en
Publication of JPH0855973A publication Critical patent/JPH0855973A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

(57)【要約】 【目的】 特性を変化させることなく、白傷欠陥や暗電
流の少ない固体撮像素子を製造する。 【構成】 電荷転送部のゲート電極を形成する前に、1
000℃以上の温度の熱処理をエピタキシャル基板に施
す。この結果、電荷転送部のゲート電極を形成している
半導体層の結晶粒径の変化や拡散領域を形成している不
純物の再分布等が少ないにも拘らず、エピタキシャル基
板の素子活性領域における金属不純物量が低減すると共
に微小欠陥が消滅する。
(57) [Abstract] [Purpose] To manufacture a solid-state image sensor with few white defects and dark current without changing the characteristics. [Structure] Before forming a gate electrode of a charge transfer portion, 1
The epitaxial substrate is subjected to heat treatment at a temperature of 000 ° C. or higher. As a result, the metal in the element active region of the epitaxial substrate is reduced despite a small change in the crystal grain size of the semiconductor layer forming the gate electrode of the charge transfer portion and a small redistribution of impurities forming the diffusion region. The amount of impurities is reduced and the minute defects disappear.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、エピタキシャル基板に
固体撮像素子を形成する固体撮像素子の製造方法に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a solid-state image pickup device for forming a solid-state image pickup device on an epitaxial substrate.

【0002】[0002]

【従来の技術】エピタキシャル基板では下地の基板とは
異なる抵抗率を有する素子活性層を形成することができ
るので素子設計の自由度が広がる等の観点から、固体撮
像素子もエピタキシャル基板に形成される場合が多い。
そして、エピタキシャル基板のエピタキシャル層の殆ど
は、CVD法で形成されている。
2. Description of the Related Art Since an element active layer having a resistivity different from that of an underlying substrate can be formed on an epitaxial substrate, a solid-state image pickup element is also formed on the epitaxial substrate from the viewpoint of increasing the degree of freedom in element design. In many cases.
Most of the epitaxial layers of the epitaxial substrate are formed by the CVD method.

【0003】[0003]

【発明が解決しようとする課題】ところが、エピタキシ
ャル基板に形成した固体撮像素子では、白傷欠陥や暗電
流が多い。これらの原因として、エピタキシャル層の形
成中にCVD装置及び原材料ガスから混入する金属不純
物や、エピタキシャル層中の微小欠陥等が考えられてい
る。
However, the solid-state image pickup device formed on the epitaxial substrate has many white defects and dark current. It is considered that the causes of these are metal impurities mixed from the CVD apparatus and the raw material gas during the formation of the epitaxial layer, and minute defects in the epitaxial layer.

【0004】このため、これらに対する対策として、C
VD装置、配管及び原材料ガス等の清浄化やエピタキシ
ャル基板に対するゲッタリングの強化等が従来から施さ
れてきた。しかし、これらの対策でも、固体撮像素子の
白傷欠陥や暗電流を十分には改善することができなかっ
た。
Therefore, as a countermeasure against these, C
Conventionally, cleaning of VD equipment, piping, raw material gas, etc. and strengthening of gettering for an epitaxial substrate have been performed. However, even with these measures, the white defect and the dark current of the solid-state image sensor cannot be sufficiently improved.

【0005】[0005]

【課題を解決するための手段】請求項1の固体撮像素子
の製造方法は、エピタキシャル基板12に固体撮像素子
を形成する固体撮像素子の製造方法において、電荷転送
部のゲート電極23を形成する前に、1000℃以上の
温度の熱処理を前記エピタキシャル基板12に施すこと
を特徴としている。
According to a first aspect of the present invention, there is provided a method of manufacturing a solid-state image pickup device, wherein a solid-state image pickup device is formed on an epitaxial substrate 12 before forming a gate electrode 23 of a charge transfer portion. In addition, heat treatment at a temperature of 1000 ° C. or higher is applied to the epitaxial substrate 12.

【0006】請求項2の固体撮像素子の製造方法は、請
求項1の固体撮像素子の製造方法において、前記熱処理
を5時間以上施すことを特徴としている。
A method of manufacturing a solid-state image sensor according to a second aspect is the method of manufacturing a solid-state image sensor according to the first aspect, characterized in that the heat treatment is performed for 5 hours or more.

【0007】請求項3の固体撮像素子の製造方法は、請
求項1の固体撮像素子の製造方法において、前記温度が
1100℃以上であることを特徴としている。
The method for manufacturing a solid-state image sensor according to a third aspect is the method for manufacturing a solid-state image sensor according to the first aspect, characterized in that the temperature is 1100 ° C. or higher.

【0008】請求項4の固体撮像素子の製造方法は、請
求項1の固体撮像素子の製造方法において、N2 雰囲気
中で前記熱処理を施すことを特徴としている。
According to a fourth aspect of the present invention, there is provided a method of manufacturing a solid-state image sensor according to the first aspect, wherein the heat treatment is performed in an N 2 atmosphere.

【0009】[0009]

【作用】本発明による固体撮像素子の製造方法では、エ
ピタキシャル層11中、エピタキシャル層11と下地の
基板との界面、及び下地の基板中の金属不純物が熱処理
で再分布して、素子活性領域における金属不純物量が低
減する。また、エピタキシャル層11中、及びエピタキ
シャル層11と下地の基板との界面における微小欠陥が
熱処理で消滅する。
In the method of manufacturing a solid-state image pickup device according to the present invention, in the epitaxial layer 11, the interface between the epitaxial layer 11 and the underlying substrate and the metal impurities in the underlying substrate are redistributed by heat treatment, and the element active region The amount of metal impurities is reduced. In addition, minute defects in the epitaxial layer 11 and at the interface between the epitaxial layer 11 and the underlying substrate disappear by heat treatment.

【0010】一方、エピタキシャル基板12に対する熱
処理は、電荷転送部のゲート電極23を形成する前に行
っているので、ゲート電極23を形成している半導体層
の結晶粒径の変化や拡散領域を形成している不純物の再
分布等が少ない。
On the other hand, since the heat treatment on the epitaxial substrate 12 is performed before the gate electrode 23 of the charge transfer portion is formed, the crystal grain size change of the semiconductor layer forming the gate electrode 23 and the diffusion region are formed. There is little redistribution of impurities.

【0011】[0011]

【実施例】以下、CCD撮像素子の製造に適用した本発
明の一実施例を、図1〜3を参照しながら説明する。本
実施例では、CZ法で製造し直径が4インチ、面方位が
<100>、抵抗率が10Ωcm程度であるN型のSi
基板をまず準備する。そして、SiHCl3 +H2 ガス
を用いる還元反応方式のCVD法によって、図2(a)
に示す様に、抵抗率が10〜20Ωcm程度で、厚さが
10μmであるN型のエピタキシャル層11をSi基板
上に形成して、Siエピタキシャル基板12を形成す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention applied to the manufacture of a CCD image pickup device will be described below with reference to FIGS. In this embodiment, N-type Si manufactured by the CZ method and having a diameter of 4 inches, a plane orientation of <100>, and a resistivity of about 10 Ωcm.
First, the substrate is prepared. Then, by a reduction reaction type CVD method using SiHCl 3 + H 2 gas, as shown in FIG.
As shown in, the N-type epitaxial layer 11 having a resistivity of about 10 to 20 Ωcm and a thickness of 10 μm is formed on the Si substrate to form the Si epitaxial substrate 12.

【0012】その後、厚さ100nmのSiO2 膜(図
示せず)をエピタキシャル層11の表面に形成してか
ら、N2 雰囲気中における1100℃の温度の熱処理を
10時間に亙って行う。SiO2 膜は、この熱処理時に
エピタキシャル層11の表面が荒れるのを防止するため
であるので、熱処理後に除去する。
After that, a SiO 2 film (not shown) having a thickness of 100 nm is formed on the surface of the epitaxial layer 11, and a heat treatment at a temperature of 1100 ° C. in an N 2 atmosphere is performed for 10 hours. The SiO 2 film is for preventing the surface of the epitaxial layer 11 from being roughened during this heat treatment, and is therefore removed after the heat treatment.

【0013】次に、図2(b)に示す様に、エピタキシ
ャル層11にP型ウェル領域13を形成し、このP型ウ
ェル領域13の表面にSiO2 膜14を形成する。そし
て、N型及びP型の不純物をP型ウェル領域13内に選
択的にイオン注入して、垂直レジスタ用のN型拡散領域
15、このN型拡散領域15下のP+ 型ウェル領域1
6、及びチャネルストッパとしてのP+ 型拡散領域17
を夫々形成する。
Next, as shown in FIG. 2B, a P-type well region 13 is formed in the epitaxial layer 11, and a SiO 2 film 14 is formed on the surface of the P-type well region 13. Then, N-type and P-type impurities are selectively ion-implanted into the P-type well region 13 to form an N-type diffusion region 15 for the vertical register, and the P + -type well region 1 below the N-type diffusion region 15.
6, and P + type diffusion region 17 as a channel stopper
Are formed respectively.

【0014】次に、図2(c)に示す様に、Si3 4
膜21とSiO2 膜22とをSiO2 膜14上の全面に
順次に積層させ、後に受光部となる部分のSiO2 膜2
2とSi3 4 膜21とを選択的にエッチングする。こ
の様にして形成したSiO2膜14、Si3 4 膜21
及びSiO2 膜22の3層膜がゲート絶縁膜を構成す
る。その後、転送電極としての多結晶Si層23をSi
2 膜22上に形成する。
Next, as shown in FIG. 2C, Si 3 N 4 is used.
The film 21 and the SiO 2 film 22 are sequentially laminated on the entire surface of the SiO 2 film 14, and the part of the SiO 2 film 2 to be a light receiving portion later is formed.
2 and the Si 3 N 4 film 21 are selectively etched. The SiO 2 film 14 and the Si 3 N 4 film 21 thus formed
And the three-layer film of the SiO 2 film 22 constitutes a gate insulating film. After that, the polycrystalline Si layer 23 as a transfer electrode is replaced with Si.
It is formed on the O 2 film 22.

【0015】次に、図3(a)に示す様に、多結晶Si
層23をマスクにしてP型ウェル領域13の深さ0.4
μm程度の位置にPhosをイオン注入し、N2 雰囲気
中における熱処理を行って、N型拡散領域24を形成す
る。このN型拡散領域24とP型ウェル領域13とのP
N接合によるフォトダイオードによって、受光部25が
形成される。
Next, as shown in FIG. 3A, polycrystalline Si
Using the layer 23 as a mask, the depth of the P-type well region 13 is 0.4.
Phos is ion-implanted at a position of about μm and heat treatment is performed in an N 2 atmosphere to form the N-type diffusion region 24. P between the N-type diffusion region 24 and the P-type well region 13
The light receiving portion 25 is formed by a photodiode having an N junction.

【0016】次に、図3(b)に示す様に、多結晶Si
層23をマスクにして受光部25の表面にBをイオン注
入し、N2 雰囲気中における熱処理を行って、正電荷蓄
積領域としてのP++型拡散領域26を形成する。そし
て、図3(c)に示す様に、PSG膜27等の層間絶縁
膜を全面に形成し、遮光膜としてのAl膜28を形成
し、更に表面保護膜(図示せず)等を形成して、このC
CD撮像素子を完成させる。
Next, as shown in FIG. 3B, polycrystalline Si
B is ion-implanted into the surface of the light receiving portion 25 using the layer 23 as a mask, and heat treatment is performed in an N 2 atmosphere to form a P ++ type diffusion region 26 as a positive charge storage region. Then, as shown in FIG. 3C, an inter-layer insulating film such as the PSG film 27 is formed on the entire surface, an Al film 28 as a light-shielding film is formed, and a surface protective film (not shown) is further formed. And this C
Complete the CD image sensor.

【0017】以上の実施例では、図2(a)の工程で1
100℃の温度の熱処理を10時間に亙って行ったが、
図1は、本実施例の他に、熱処理時間を5時間にした場
合と熱処理温度を1000℃及び950℃にした場合と
におけるCCD撮像素子の白傷欠陥数を示している。
In the above embodiment, the process of FIG.
Heat treatment at a temperature of 100 ° C. was performed for 10 hours,
FIG. 1 shows the number of white defects in the CCD image pickup device when the heat treatment time was 5 hours and when the heat treatment temperatures were 1000 ° C. and 950 ° C., in addition to the present embodiment.

【0018】この図1から明らかな様に、1100℃の
温度であれば5時間以上の熱処理で白傷欠陥が40%以
上減少している。また、1000℃の温度の熱処理でも
効果があるが、1100℃以上の温度の方が好ましい。
更に、例えばAr雰囲気中で熱処理を行うと、この熱処
理前に形成したSiO2 膜の不完全な箇所にボイドが形
成される可能性があるので、この熱処理はN2 雰囲気中
で行うことが望ましい。
As is apparent from FIG. 1, at a temperature of 1100 ° C., the number of white defects is reduced by 40% or more by the heat treatment for 5 hours or more. Although heat treatment at a temperature of 1000 ° C. is effective, a temperature of 1100 ° C. or higher is preferable.
Further, for example, when heat treatment is performed in an Ar atmosphere, voids may be formed in an incomplete portion of the SiO 2 film formed before this heat treatment. Therefore, it is desirable to perform this heat treatment in an N 2 atmosphere. .

【0019】なお、以上の実施例ではN型のSi基板上
にN型のエピタキシャル層11をを形成したが、どの様
な導電型の組み合わせのCCD撮像素子でも、上述の熱
処理によって白傷欠陥を減少させる効果を得ることがで
きる。
Although the N-type epitaxial layer 11 is formed on the N-type Si substrate in the above-mentioned embodiments, white-scratch defects are generated by the above-mentioned heat treatment in the CCD image pickup device of any combination of conductivity types. The effect of reducing can be obtained.

【0020】[0020]

【発明の効果】本発明による固体撮像素子の製造方法で
は、電荷転送部のゲート電極を形成している半導体層の
結晶粒径の変化や拡散領域を形成している不純物の再分
布等が少ないにも拘らず、エピタキシャル基板の素子活
性領域における金属不純物量が低減すると共に微小欠陥
が消滅するので、特性を変化させることなく、白傷欠陥
や暗電流の少ない固体撮像素子を製造することができ
る。
According to the method of manufacturing a solid-state image sensor according to the present invention, there is little change in the crystal grain size of the semiconductor layer forming the gate electrode of the charge transfer portion and redistribution of impurities forming the diffusion region. Nevertheless, since the amount of metal impurities in the element active region of the epitaxial substrate is reduced and the microdefects disappear, it is possible to manufacture a solid-state imaging element with few white defects and dark current without changing the characteristics. .

【図面の簡単な説明】[Brief description of drawings]

【図1】熱処理温度及び熱処理時間とCCD撮像素子の
白傷欠陥数との関係を示すグラフである。
FIG. 1 is a graph showing the relationship between heat treatment temperature and heat treatment time and the number of white defects in a CCD image pickup device.

【図2】本発明の一実施例の前半を工程順に示す側断面
図である。
FIG. 2 is a side sectional view showing the first half of one embodiment of the present invention in process order.

【図3】一実施例の後半を工程順に示す側断面図であ
る。
FIG. 3 is a side sectional view showing the latter half of one embodiment in process order.

【符号の説明】[Explanation of symbols]

11 エピタキシャル層 12 Siエピタキシャル基板 23 多結晶Si層 11 Epitaxial Layer 12 Si Epitaxial Substrate 23 Polycrystalline Si Layer

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 エピタキシャル基板に固体撮像素子を形
成する固体撮像素子の製造方法において、 電荷転送部のゲート電極を形成する前に、1000℃以
上の温度の熱処理を前記エピタキシャル基板に施すこと
を特徴とする固体撮像素子の製造方法。
1. A method of manufacturing a solid-state imaging device, comprising forming a solid-state imaging device on an epitaxial substrate, wherein heat treatment at a temperature of 1000 ° C. or higher is applied to the epitaxial substrate before forming a gate electrode of a charge transfer portion. And a method for manufacturing a solid-state image sensor.
【請求項2】 前記熱処理を5時間以上施すことを特徴
とする請求項1記載の固体撮像素子の製造方法。
2. The method for manufacturing a solid-state image pickup device according to claim 1, wherein the heat treatment is performed for 5 hours or more.
【請求項3】 前記温度が1100℃以上であることを
特徴とする請求項1記載の固体撮像素子の製造方法。
3. The method for manufacturing a solid-state image pickup device according to claim 1, wherein the temperature is 1100 ° C. or higher.
【請求項4】 N2 雰囲気中で前記熱処理を施すことを
特徴とする請求項1記載の固体撮像素子の製造方法。
4. The method for manufacturing a solid-state image pickup device according to claim 1, wherein the heat treatment is performed in an N 2 atmosphere.
JP6211941A 1994-08-12 1994-08-12 Method of manufacturing solid-state image sensor Pending JPH0855973A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6211941A JPH0855973A (en) 1994-08-12 1994-08-12 Method of manufacturing solid-state image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6211941A JPH0855973A (en) 1994-08-12 1994-08-12 Method of manufacturing solid-state image sensor

Publications (1)

Publication Number Publication Date
JPH0855973A true JPH0855973A (en) 1996-02-27

Family

ID=16614232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6211941A Pending JPH0855973A (en) 1994-08-12 1994-08-12 Method of manufacturing solid-state image sensor

Country Status (1)

Country Link
JP (1) JPH0855973A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179592A (en) * 2004-12-21 2006-07-06 Fuji Film Microdevices Co Ltd Substrate for forming a solid-state image sensor, solid-state image sensor using the same, and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179592A (en) * 2004-12-21 2006-07-06 Fuji Film Microdevices Co Ltd Substrate for forming a solid-state image sensor, solid-state image sensor using the same, and method for manufacturing the same

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