JPH0856103A - Laminated resonator - Google Patents

Abstract

PURPOSE:To simplify the resonator and to make the size small by providing a ground conductor layer between a capacitor conductor layer and a strip line conductor layer so as to connect a capacitor in parallel with a strip line thereby decreasing the length of the strip line. CONSTITUTION:A dielectric board 1 is made up of dielectric layers 1a-1f. A strip line conductor, layer 2 is formed on the surface of the dielectric layer 1d as a strip. Since the conductor layer 2 is inserted between ground conductor layers 3, 4 in a sandwich form via the dielectric layers 1c, 1e, the conductor layer acts as an LC distribution constant circuit. A capacitor conductor layer 5 opposes to ground conductor layer 3 via the dielectric layer 1b. A dielectric layer 6 is provided to one-side face and part of an upper and lower side of the dielectric board 1 and connects to one-end of the strip line conductor layer 2 and one-end of the capacitor conductor layer 5. Thus, a capacitor is connected in parallel with the strip line 8, the length of the strip line 8 is reduced to make the resonator small and to improve the Q. The ground conductor layer 3 is used in common for the capacitor electrode to make the resonator small in size.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a laminated resonator for use in a mobile telephone or the like.

[0002]

2. Description of the Related Art A conventional coaxial dielectric resonator used for a voltage controlled oscillator (VCO) of a mobile telephone is difficult to downsize and difficult to automatically mount. There is.

In order to solve this kind of drawback, it is conceivable to form an inductance L and a capacitor C in a laminated structure to obtain a lumped constant type chip resonator composed of an LC parallel circuit. However, when the conductor layer for obtaining the inductance, that is, the coil and the conductor layer for obtaining the capacitor are simply laminated via the dielectric layer, the resonance frequency f0 is deviated. That is, it is difficult to obtain a desired resonance frequency. Further, the conductor layer for obtaining the inductance L becomes long, Q becomes relatively low, and it is difficult to obtain a resonator having a high Q.

It is also conceivable to manufacture a chip type resonator by embedding a stripline conductor layer and a ground conductor layer in a dielectric. In the case of this type of stripline type or distributed constant type resonator, increasing the dielectric constant of the dielectric has the effect of shortening the length of the stripline conductor layer, but on the other hand, between the stripline and ground. Q decreases due to an increase in dielectric loss.

Therefore, an object of the present invention is to provide a laminated type (chip type) which can achieve miniaturization without lowering Q.
It is to provide a resonator.

[0006]

According to the present invention for achieving the above object, a stripline conductor layer, first and second ground conductor layers, and a capacitor conductor layer are embedded in a dielectric substrate, and the stripline conductor is formed. A conductor layer is disposed between the first and second ground conductor layers via a dielectric layer,
The capacitor conductor layer is arranged to face the first ground conductor layer with a dielectric layer in between, a terminal conductor layer and a ground terminal conductor layer are provided on an outer peripheral surface of the dielectric substrate, and the terminal conductor layer is provided with the terminal conductor layer. One end of a stripline conductor layer and the capacitor conductor layer are connected, and the first and second ground conductor layers and the other end of the stripline conductor layer are connected to the ground terminal conductor layer. The present invention relates to a laminated resonator. Note that claim 2
A capacitor conductor layer can be provided on the outer peripheral surface of the dielectric substrate as shown in FIG. Further, as described in claim 3, the second ground conductor layer can be provided on the main surface of the dielectric substrate. Further, as described in claim 4, a third ground conductor layer can be further provided on the main surface of the dielectric substrate.

[0007]

According to the inventions of the respective claims, a resonance circuit in which a capacitor is connected in parallel to a strip line can be obtained. When a capacitor is connected in parallel to the strip line, the effect of shortening the strip line can be obtained as is well known. That is, the strip line can be shortened at the same resonance frequency as compared with the case of only the strip line. As the stripline becomes shorter, this resistance becomes smaller and the Q becomes higher. Further, since the ground conductor layer is interposed between the capacitor conductor layer and the stripline conductor layer, mutual interference between the capacitor conductor layer and the stripline conductor layer does not occur. Further, since the ground conductor layer is also used as the electrode for forming the capacitor, the laminated structure is simplified and the miniaturization is achieved. In the invention of claim 2, since the capacitor conductor layer is provided on the outer peripheral surface, the resonance frequency can be adjusted by this trimming. Moreover, since the capacitor conductor layer can also be used as a terminal, miniaturization is achieved. Claim 3
When the second ground conductor layer is provided on the main surface of the dielectric substrate as shown in (4), the resonance frequency can be adjusted by trimming the second ground conductor layer. In addition, when the third ground conductor layer is provided on the main surface of the dielectric substrate as described in claim 4, the resonance frequency can be adjusted by this trimming.

[0008]

[First Embodiment] Next, a laminated resonator according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, this resonator includes a ceramic dielectric substrate 1, a stripline conductor layer 2 embedded in the dielectric substrate 1, first and second ground conductor layers 3 and 4, and a capacitor conductor. It comprises a layer 5, a signal terminal conductor layer 6 and a ground terminal conductor layer 7 provided on the outer peripheral surface of the dielectric substrate 1.

The dielectric substrate 1 is formed by laminating ceramic green sheets (unfired porcelain sheets) and firing them.
Although integrated after firing, for convenience of explanation, the first,
Second, third, fourth, fifth and sixth dielectric layers 1a-1f.
It is divided into The stripline conductor layer 2 is formed in a strip shape on the surface of the fourth dielectric layer 1d as shown in FIG. The first and second ground conductor layers 3 and 4 are shown in FIG.
And as shown in FIG. 7, third and fifth dielectric layers 1c, 1
It is formed in a relatively large area on e. The stripline conductor layer 2 includes third and fourth stripline conductor layers as apparent from FIG.
It is sandwiched between the first and second ground conductor layers 3 and 4 via the dielectric layers 1c and 1e. The capacitor conductor layer 5 faces the first ground conductor layer 3 via the second dielectric layer 1b.

As shown in FIGS. 1 and 2, the terminal conductor layer 6 is provided on one side surface and a part of the upper and lower surfaces of the dielectric substrate 1, and one end of the stripline conductor layer 2 and one end of the capacitor conductor layer 5. Connected to. The ground terminal conductor layer 7 is provided on the other side surface and part of the upper surface and the lower surface of the dielectric substrate 1, and is connected to the first and second ground conductor layers 3 and 4 and the other end of the stripline conductor layer 2. ing.

When the resonator shown in FIG. 1 is manufactured, the capacitor conductor layer 5, the first ground conductor layer 3, the stripline conductor layer 2 and the second conductor layer 2 shown in FIGS. 4, 5, 6 and 7 are formed.
4 ceramic green sheets coated with a conductor paste in a predetermined pattern by a printing method so as to obtain the ground conductor layer 4 are prepared and laminated, and the dielectric layers 1a and 1f are formed above and below them. The green sheets without the conductor paste are laminated and fired. next,
The terminal conductor layer 6 and the ground terminal conductor layer 7 are formed by applying and baking a conductor paste on the outer conductor surface of the dielectric substrate 1.
To complete the resonator.

In the resonator shown in FIG. 1, since the stripline conductor layer 2 faces the ground conductor layers 3 and 4 with the dielectric layers 1c and 1d interposed therebetween, the stripline conductor layer 2 serves as an LC distributed constant circuit. As shown in FIG. It functions as a microstrip line 8 connected between the terminal T1 and the ground. The terminal T1 in FIG. 2 corresponds to the terminal conductor layer 6 in FIG. 1, and the ground corresponds to the ground terminal conductor layer 7 in FIG.
The capacitance between the capacitor conductor layer 5 and the first ground conductor layer 3 functions as the capacitor C1 in FIG. Since the capacitor C1 is connected in parallel to the strip line 8, the strip line 8 can be shortened. That is, if the strip line 8 is kept the same length and the capacitor C1 is connected in parallel to it, the resonance frequency becomes high. Therefore, when the same resonance frequency is obtained, the strip line 8 can be shortened by connecting the capacitor C1.

The resonator of FIG. 1 is mounted on a circuit board (not shown), the terminal conductor layer 6 is connected to the signal transmission line, the ground terminal conductor layer 7 is connected to the ground, and a voltage control oscillator (VC) is used.
Used as O).

As is apparent from the above, this embodiment has the following effects. (1) By adding the capacitor C1, the stripline conductor layer 3 can be shortened to downsize the resonator and improve Q. (2) Since the capacitor C1 is arranged such that the capacitor conductor layer 5 faces the ground conductor layer 3 and the ground conductor layer 3 also serves as a capacitor electrode, the resonator can be downsized and the cost can be reduced. (3) Since it is a chip type resonator, it can be easily mounted on a circuit board.

[0015]

[Second Embodiment] Next, a dielectric resonator according to a second embodiment will be described with reference to FIGS. However, FIGS.
The same parts as those shown in FIGS. 1, 2 and 3 to 7 are designated by the same reference numerals and the description thereof will be omitted. In the laminated resonator shown in FIG. 8, the capacitor conductor layer 5 embedded in the dielectric substrate 1 in FIG. 1 is not provided, but instead, the capacitor conductor layer 6a also serving as a terminal is provided. The third, fourth and fifth dielectric layers 1c, 1d and 1e are shown in FIGS.
Also, as shown in FIG. 13, the first ground conductor layer 3, the stripline conductor layer 2, and the second ground conductor layer 4 are formed in the same manner as in the first embodiment.

A ground conductor is formed on the outer peripheral surface of the dielectric substrate 1, that is, a laminate of the first to sixth dielectric layers 1a to 1f, the stripline conductor layer 2, and the first and second ground conductor layers 3 and 4. In addition to the layer 7 being provided in the same manner as in the first embodiment, the terminal-combined capacitor conductor layer 6a is provided in a larger area than the terminal conductor layer 6 of the first embodiment. This terminal-cumulative capacitor conductor layer 6a is formed by a method similar to that of the terminal conductor layer 6 of FIG. 1, and is connected to one end of the stripline conductor layer 2 on the side surface of the dielectric substrate 1 and on the front and back surfaces. In, there are capacitor electrode portions 5a and 5b facing the first and second ground conductor layers 3 and 4 with the dielectric layers 1a, 1b and 1e, 1f interposed therebetween.

The capacitance between the capacitor electrode portions 5a and 5b and the first and second ground conductor layers 3 and 4 functions as capacitors C1a and C1b shown in FIG. The capacitors C1a and C1b have the same effects as the capacitor C1 shown in FIG.

The resonator of FIGS. 8 to 14 is manufactured by a method substantially the same as that of the first embodiment, is similarly mounted on the circuit board, and is used as a VCO.

The resonator of the second embodiment has the same effect as the resonator of the first embodiment, and further has the effect of further reducing the cost. That is, since the capacitor conductor layer 6a is provided on the outer peripheral surface of the dielectric substrate 1 and also functions as an external connection terminal, the structure is simplified and the cost can be reduced. When the capacitor electrode portions 5a and 5b are trimmed by trimming with a laser or the like, the capacitance changes and the resonance frequency changes. Therefore, the resonance frequency of the resonator can be easily adjusted.

[0020]

[Third Embodiment] Next, referring to FIGS.
The laminated resonator of the embodiment will be described. However, in FIG. 15, parts that are substantially the same as those in FIGS. 1 and 8 are given the same reference numerals, and descriptions thereof will be omitted. In the laminated resonator of FIG. 15, the stripline conductor layer 2 is provided on the surface of the fifth dielectric layer 1e. Further, the second ground conductor layer 4 is provided on the lower surface of the dielectric substrate 1. Further, the third ground conductor 10 is provided on the upper surface of the dielectric substrate 1. Therefore, the stripline conductor layer 2 is arranged between the buried first ground conductor layer 3 and the non-embedded second ground conductor layer 4. The capacitor conductor layer 5 faces the first ground conductor layer 3 via the second dielectric layer 1b, and faces the third ground conductor layer 10 via the first dielectric layer 1a. . First,
The left ends of the second and third ground conductor layers 3, 4, 10 and the left end of the strip conductor layer 2 are connected to the ground terminal conductor layer 7 on the left side surface, and the right end of the strip conductor layer 2 and the right end of the capacitor conductor layer 5 are It is connected to the signal terminal conductor layer 6 on the right side surface. The second and third ground conductor layers 4,
10 is covered with insulating protective films 11 and 12.

The equivalent circuit of the laminated resonator shown in FIG. 15 is shown in FIG.
become. In FIG. 16, the terminal T1 is the terminal conductor layer 6, the terminal T2 is the ground terminal conductor layer 7, the strip line 8 is the strip line conductor layer 2, and the first capacitor C.
1a is between the capacitor conductor layer 5 and the first ground conductor layer 3, and the second capacitor C1b is between the capacitor conductor layer 3 and the third ground conductor layer 3.
And the ground conductor layer 10 of FIG.

In the laminated resonator shown in FIG. 15, when the region of the third ground conductor layer 10 facing the capacitor conductor layer 5 indicated by the arrow A is trimmed, the resonance frequency f0 increases. Also, the resonator frequency f0 can be adjusted by trimming the area shown by the arrow B of the second ground conductor layer 4. The resonator shown in FIG. 15 has the same effects as the resonator shown in FIG.

[0023]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) The pattern of the stripline conductor layer 2 can be, for example, wavy. (2) A capacitor conductor layer can be added between the fifth and sixth dielectric layers 1e and 1f of FIG. (3) In FIG. 1, the dielectric constant of the second dielectric layer 1b can be set to a value (for example, a large value) different from the dielectric constants of the third and fourth dielectric layers 1c and 1d. Also in FIG. 8, the first, second, fifth and sixth dielectric layers 1a, 1b,
The dielectric constants of 1e and 1f are set to the third and fourth dielectric layers 1c and 1c.
It can be a value different from the dielectric constant of d (for example, a large value). (4) In FIG. 8, either one of the capacitor electrode portions 5a and 5b can be omitted. (5) The resonator of FIGS. 1 and 8 can be used also when forming a band stop filter. (6) In FIG. 15, the second ground conductor layer 4 is shown in FIG.
It can be embedded in a dielectric substrate in the same manner as. (7) In FIG. 15, the third ground conductor layer 10 can be omitted.

[Brief description of drawings]

FIG. 1 is a cross-sectional view taken along line AA of FIG. 2 showing a laminated resonator of a first embodiment.

2 is a perspective view of the resonator of FIG. 1. FIG.

FIG. 3 is an equivalent circuit diagram of the resonator shown in FIG.

4 is a plan view showing a conductor layer pattern on the surface of the second dielectric layer in FIG. 1. FIG.

5 is a plan view showing a conductor layer pattern on the surface of the third dielectric layer of FIG. 1. FIG.

FIG. 6 is a plan view showing a conductor layer pattern on the surface of the fourth dielectric layer in FIG.

FIG. 7 is a plan view showing a conductor layer pattern on the surface of the fifth dielectric layer in FIG.

FIG. 8 is a cross-sectional view showing the resonator of the second embodiment, taken along the line BB of FIG.

9 is a plan view of the resonator of FIG.

FIG. 10 is a bottom view of the resonator shown in FIG.

FIG. 11 is a plan view showing a conductor layer pattern on the surface of the third dielectric layer of FIG.

FIG. 12 is a plan view showing a conductor layer pattern on the surface of the fourth dielectric layer in FIG.

13 is a plan view showing a conductor layer pattern on the surface of the fifth dielectric layer of FIG. 8. FIG.

14 is an equivalent circuit diagram of the resonator shown in FIG.

FIG. 15 is a cross-sectional view showing a resonator of a third embodiment.

16 is an equivalent circuit diagram of the resonator shown in FIG.

[Explanation of symbols]

 1 Dielectric Substrate 2 Stripline Conductor Layer 3, 4 Ground Conductor Layer 5 Capacitor Conductor Layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01P 1/20 Z

Claims (4)

[Claims] 1. A stripline conductor layer and first and second stripline conductor layers
A ground conductor layer and a capacitor conductor layer are embedded in a dielectric substrate, the stripline conductor layer is disposed between the first and second ground conductor layers via a dielectric layer, and the capacitor conductor layer is It is arranged to face the first ground conductor layer via a dielectric layer, a terminal conductor layer and a ground terminal conductor layer are provided on the outer peripheral surface of the dielectric substrate, and the stripline conductor layer is provided on the terminal conductor layer. One end and the capacitor conductor layer are connected to each other, and the first and second ground conductor layers and the other end of the stripline conductor layer are connected to the ground terminal conductor layer, respectively. . 2. A stripline conductor layer and first and second stripline conductor layers
A ground conductor layer is embedded in a dielectric substrate, the stripline conductor layer is disposed between the first and second ground conductor layers with a dielectric layer interposed therebetween, and the first and / or second ground A capacitor conductor layer is provided so as to face the conductor layer with a dielectric layer in between, and the capacitor conductor layer is connected to the stripline conductor layer and is disposed on an outer peripheral surface of the dielectric substrate. And a ground terminal conductor layer connected to the other end of the stripline conductor layer on the outer peripheral surface of the dielectric substrate. 3. A stripline conductor layer, a first ground conductor layer, and a capacitor conductor layer are embedded in a dielectric base, and the first ground conductor layer and the stripline conductor layer are interposed via a dielectric layer. The second ground conductor layer is disposed between capacitor conductor layers, the second ground conductor layer is disposed on a main surface of the dielectric base, and the stripline conductor layer is the first and second ground conductors with a dielectric layer interposed therebetween. Arranged between layers, a terminal conductor layer and a ground terminal conductor layer are provided on an outer peripheral surface of the dielectric substrate, and one end of the stripline conductor layer and the capacitor conductor layer are connected to the terminal conductor layer, A laminated resonator in which the first and second ground conductor layers and the other end of the stripline conductor layer are connected to a ground terminal conductor layer. 4. A third ground conductor layer is further provided on the main surface of the side of the dielectric substrate opposite to the main surface on which the second ground conductor layer is provided, and the third ground conductor layer is provided. 4. The multilayer resonator according to claim 3, wherein the conductor layer has a portion facing the capacitor conductor layer via a dielectric layer and is connected to the ground terminal conductor layer.