JPH087634Y2 - TAB semiconductor device - Google Patents
TAB semiconductor deviceInfo
- Publication number
- JPH087634Y2 JPH087634Y2 JP1990009267U JP926790U JPH087634Y2 JP H087634 Y2 JPH087634 Y2 JP H087634Y2 JP 1990009267 U JP1990009267 U JP 1990009267U JP 926790 U JP926790 U JP 926790U JP H087634 Y2 JPH087634 Y2 JP H087634Y2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- semiconductor device
- conductive pattern
- tab
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/701—Tape-automated bond [TAB] connectors
Landscapes
- Wire Bonding (AREA)
Description
【考案の詳細な説明】 産業上の利用分野 本考案はTape Automted Bonding(TAB)式半導体装置
に関する。TECHNICAL FIELD The present invention relates to a Tape Automted Bonding (TAB) type semiconductor device.
従来の技術 TAB式半導体装置の一例を第3図から説明する。2. Description of the Related Art An example of a TAB type semiconductor device will be described with reference to FIG.
図において、1は絶縁フィルムで、透孔1aを穿設して
いる。2は絶縁フィルム1に積層した導電パターンで、
その一部を透孔1a内に延在させインナリード2aを形成し
ている。3はバンプ電極3aを有する半導体ペレットで、
透孔1a内に配置されてバンプ電極3aとインナリード2aを
熱圧着などの手段により電気的に接続されている。In the figure, reference numeral 1 is an insulating film having a through hole 1a. 2 is a conductive pattern laminated on the insulating film 1,
An inner lead 2a is formed by extending a part of it into the through hole 1a. 3 is a semiconductor pellet having bump electrodes 3a,
The bump electrode 3a is arranged in the through hole 1a, and the bump electrode 3a and the inner lead 2a are electrically connected by means such as thermocompression bonding.
このTAB式半導体装置は絶縁フィルム1に導電パター
ン2を積層したTABテープ4に連続形成され、図示しな
いが透孔1a外方のアウターリードで個々の半導体装置に
分離される。This TAB type semiconductor device is continuously formed on a TAB tape 4 in which a conductive pattern 2 is laminated on an insulating film 1 and is separated into individual semiconductor devices by an outer lead outside the through hole 1a although not shown.
ところで、この半導体装置は、インナリード2aが細
く、しかも薄いため変形し易く、製造過程でTABテープ
4が変形したり、半導体ペレット3に外力が加わるとイ
ンナリード2aが変形する虞があった。By the way, in this semiconductor device, the inner lead 2a is thin and thin, so that it is easily deformed, and there is a possibility that the TAB tape 4 may be deformed in the manufacturing process or the inner lead 2a may be deformed when an external force is applied to the semiconductor pellet 3.
一方、バンプ電極3aは高さが数10μm程度でインナリ
ード2aが変形すると半導体ペレット3のエッジ部にイン
ナリード2aが近接したり最悪の場合接触し、耐電圧の低
下や短絡事故を発生する虞がある。On the other hand, the bump electrode 3a has a height of about several tens of μm, and when the inner lead 2a is deformed, the inner lead 2a may approach the edge portion of the semiconductor pellet 3 or may contact in the worst case, which may cause a decrease in withstand voltage or a short circuit accident. There is.
そのため、第4図に示すようにインナリード2aを押圧
変形させインナリード2aと半導体ペレット3のエッジ部
の間隔を確保したり、さらに、第5図に示すようにポッ
ティングによりバンプ電極3aを含む半導体ペレット3と
TABテープ4を樹脂5に被覆し保護するようにしてい
る。Therefore, as shown in FIG. 4, the inner lead 2a is pressed and deformed to secure a space between the inner lead 2a and the edge portion of the semiconductor pellet 3, and as shown in FIG. With pellet 3
The TAB tape 4 is covered with the resin 5 for protection.
考案が解決しようとする課題 しかしながら第4図半導体装置でも半導体ペレット3
やインナリード2aに外力が加えられると耐電圧低下,短
絡,断線などの問題を完全に解決できなかった。However, in the semiconductor device shown in FIG.
When external force is applied to the inner lead 2a or the inner lead 2a, problems such as withstand voltage drop, short circuit, and wire breakage could not be completely solved.
また第5図半導体装置は封止時にリード変形があると
そのまま固定されてしまい、樹脂5を硬化させる際に樹
脂収縮によってリード切れ、リード外れ、テープのひず
みなどを生じる信頼性が低下する虞があった。Further, the semiconductor device in FIG. 5 is fixed as it is if the lead is deformed at the time of encapsulation, and when the resin 5 is cured, the lead may be broken, the lead may be detached, the tape may be distorted due to resin contraction, and the reliability may be lowered. there were.
課題を解決するための手段 本考案は上記課題の解決を目的として提案されたもの
で、透孔を開口した絶縁フィルムに導電パターンをその
一部を透孔内に延在させて積層形成し、上記透孔位置で
導電パターンと半導体ペレットとを電気的に接続したTA
B式半導体装置において、 上記透孔に導電パターンを介して半導体ペレットを押
圧するエンボスを有する絶縁キャップを装着したことを
特徴とするTAB式半導体装置を提供する。Means for Solving the Problems The present invention has been proposed for the purpose of solving the above problems, in which a conductive pattern is laminated on an insulating film having a through hole so that a part of the conductive pattern extends into the through hole. TA that electrically connects the conductive pattern and the semiconductor pellet at the through hole position
A B-type semiconductor device is provided, in which an insulating cap having an emboss that presses a semiconductor pellet through a conductive pattern is attached to the through hole.
作用 本考案によれば絶縁キャップのエンボスに導電パター
ンに沿わせることにより、リードにねじれ変形を生ずる
ことなく成形し固定でき、耐電圧低下や短絡のないTAB
式半導体装置を実現できる。Effect According to the present invention, by embedding the conductive pattern along the embossing of the insulating cap, it is possible to form and fix the lead without twisting deformation of the lead, and the TAB does not have withstand voltage drop or short circuit.
Type semiconductor device can be realized.
実施例 以下に本考案の実施例を第1図から説明する。図にお
いて、第3図と同一符号は同一物を示し説明を省略す
る。図中6は絶縁キャップで、第2図に示すように四角
形の平板状絶縁フィルム6aの中央部にエンボス加工によ
り開口部6bが透孔1aより小さく、底部6cが半導体ペレッ
ト3よりやや小さい、側壁6dが傾斜している。このエン
ボス6eが透孔1aに挿入され導電パターン(インナリー
ド)2aを介して半導体ペレット3を押圧し、インナリー
ド2aは側壁6dに沿って成形され、平板部6aはTABテープ
4に固定されている。固定は接着材を用いてもよいし、
直接溶着してもよい。Embodiment An embodiment of the present invention will be described below with reference to FIG. In the figure, the same reference numerals as those in FIG. In the figure, 6 is an insulating cap, and as shown in FIG. 2, the opening 6b is smaller than the through hole 1a and the bottom 6c is slightly smaller than the semiconductor pellet 3 by embossing in the central portion of the rectangular flat insulating film 6a. 6d is inclined. The embossed 6e is inserted into the through hole 1a and presses the semiconductor pellet 3 through the conductive pattern (inner lead) 2a, the inner lead 2a is molded along the side wall 6d, and the flat plate portion 6a is fixed to the TAB tape 4. There is. An adhesive may be used for fixing,
It may be directly welded.
これにより、TABテープ4の透孔1aは絶縁キャップ6
によって塞がれ、しかもエンボス6eによって補強される
ためTABテープ4に撓み変形が生じにくく、またTABテー
プ4に体するインナリード2aや半導体ペレット3の位置
が絶縁キャップ6により固定されるため、リード曲り、
リード外れがなく、短絡がなく耐電圧が十分保たれた信
頼性のある半導体装置を実現できる。As a result, the through hole 1a of the TAB tape 4 is not covered with the insulating cap 6.
The TAB tape 4 is less likely to be bent and deformed because it is occluded by the embossing 6e and is reinforced by the embossing 6e. Also, the positions of the inner leads 2a and the semiconductor pellets 3 that are mounted on the TAB tape 4 are fixed by the insulating cap 6, so that the leads are Bend,
It is possible to realize a reliable semiconductor device in which leads do not come off, a short circuit does not occur, and a withstand voltage is sufficiently maintained.
なお、本考案は上記実施例にのみ限定されることな
く、例えば、絶縁キャップ6に対しインナリード2aや半
導体ペレット3を樹脂封止してもよい。この場合、絶縁
キャップ6の適宜位置に穴あけしてもよい。The present invention is not limited to the above embodiment, and the inner lead 2a and the semiconductor pellet 3 may be resin-sealed to the insulating cap 6, for example. In this case, holes may be drilled at appropriate positions on the insulating cap 6.
考案の効果 以上のように本考案によれば、TABテープと絶縁キャ
ップが一体化することにより、インナリードが絶縁キャ
ップによって成形された上、保護され、リード曲りや不
所望な変形が防止される。As described above, according to the present invention, by integrating the TAB tape and the insulating cap, the inner lead is molded and protected by the insulating cap, and lead bending and undesired deformation are prevented. .
また樹脂封止時の樹脂収縮も絶縁キャップによって緩
和され、リード切り、リード外れ、テープのひずみが防
止され、耐電圧低下や短絡のない半導体装置を実現でき
る。Further, the resin shrinkage at the time of resin sealing is alleviated by the insulating cap, the lead cutting, the lead detachment, and the tape distortion are prevented, and the semiconductor device without the withstand voltage drop and the short circuit can be realized.
第1図は本考案の実施例を示す側断面図,第2図は絶縁
キャップの一部断面斜視図,第3図乃至第5図はそれぞ
れTAB式半導体装置の一例を示す側断面図である。 1……絶縁フィルム、1a……透孔、2……導電パター
ン、2a……インナリード、3……半導体ペレット、4…
…TABテープ、6……絶縁キャップ、6e……エンボス。1 is a side sectional view showing an embodiment of the present invention, FIG. 2 is a partial sectional perspective view of an insulating cap, and FIGS. 3 to 5 are side sectional views showing an example of a TAB semiconductor device. . 1 ... Insulating film, 1a ... Through hole, 2 ... Conductive pattern, 2a ... Inner lead, 3 ... Semiconductor pellet, 4 ...
… TAB tape, 6… Insulation cap, 6e… Emboss.
Claims (1)
ンをその一部を透孔内に延在させて積層形成し、上記透
孔位置で導電パターンと半導体ペレットとを電気的に接
続したTAB式半導体装置において、 上記透孔に導電パターンを介して半導体ペレットを押圧
するエンボスを有する絶縁キャップを装着したことを特
徴とするTAB式半導体装置。1. A TAB in which a conductive pattern is laminated on an insulating film having a through hole so that a part of the conductive pattern extends into the through hole, and the conductive pattern and the semiconductor pellet are electrically connected at the position of the through hole. A TAB type semiconductor device, wherein an insulating cap having an emboss for pressing the semiconductor pellet through the conductive pattern is attached to the through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990009267U JPH087634Y2 (en) | 1990-01-31 | 1990-01-31 | TAB semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990009267U JPH087634Y2 (en) | 1990-01-31 | 1990-01-31 | TAB semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03101527U JPH03101527U (en) | 1991-10-23 |
| JPH087634Y2 true JPH087634Y2 (en) | 1996-03-04 |
Family
ID=31512872
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990009267U Expired - Lifetime JPH087634Y2 (en) | 1990-01-31 | 1990-01-31 | TAB semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH087634Y2 (en) |
-
1990
- 1990-01-31 JP JP1990009267U patent/JPH087634Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03101527U (en) | 1991-10-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |