JPH087705B2 - Failure diagnosis processing method - Google Patents

Description

The present invention relates to a failure diagnosis processing method for an interprocessor communication control device used in a multiprocessor system having a duplex configuration, and enables diagnosis to be performed without reducing the data processing efficiency of an active system. For that purpose, prepare a diagnostic flag consisting of a specified flag that displays the name of the executing processor and diagnostic data, and configure it to expand to both processors.
When each processor is a processor which is not displayed with the designated flag, a diagnostic execution requesting means for requesting the execution side processor to execute diagnostic data via the active communication line, and the execution request. If there is, the diagnostic data is executed to its own inter-processor communication control device, and the diagnosis is performed via the communication line of the active system, provided that the requesting processor is in the reception request mode. The diagnostic execution transmitting means for transmitting data to the request source, and the failure analysis means for executing the failure analysis of the interprocessor communication control apparatus from the received data and the status data of the interprocessor communication control apparatus of its own are configured. .

[Industrial application field]

The present invention relates to a hometown diagnosis processing method of an interprocessor communication control device used in a multiprocessor system having a duplex configuration, and particularly, to a standby system in a failure state by reducing a load applied to an active system in operation as much as possible. The present invention relates to a failure diagnosis processing method capable of executing failure analysis of an interprocessor communication control device.

For example, in a telephone exchange system, a configuration for executing network control is adopted in accordance with a multiprocessor system having a duplex configuration. In a multiprocessor system adopting such a duplex configuration, when a failure occurs in an interprocessor communication control device that controls communication between processors, the active system is immediately switched and predetermined data processing is continued according to the switched active system. At the same time, the failure analysis of the standby interprocessor communication control device in the failed state is executed. In such a failure diagnosis process, it is necessary to take measures to reduce the load on the active system in operation as much as possible.

[Conventional technology]

FIG. 8 shows a system configuration of a multiprocessor system having a duplicated configuration. In the figure, 1 is a main processor and 2 is an opposite processor. Each of the main processor 1 and the opposite processor 2 is provided with a central processing unit 3, a main storage unit 4, a channel control unit 5, and an interprocessor communication control unit 6 in accordance with a duplex configuration of an active system and a standby system. In the figure, the symbols "# 0" and "# 1" indicate which system each of these devices belongs to.

Next, assuming that a failure has occurred in the inter-processor communication control device 6 of the "1 system" (there may be either one or both), the conventional inter-processor communication control device 6 is subjected to failure diagnosis. The processing method will be described.

FIG. 9 shows a unit configuration of a diagnostic program to be developed in the main processor 1 and the opposite processor 2 in order to execute the failure diagnostic processing of the conventional technique.
In the figure, 7 is an execution control unit that is expanded in the active system of the main processor 1, which executes control of the entire diagnostic processing, and 8 is a data execution unit that is expanded in the standby system of the main processor 1. , Which executes diagnosis according to the diagnostic data from the execution control unit 7 on the interprocessor communication control unit 6 on the main processor side in the fault state, and 9 is a data transfer unit which is developed in the active system of the opposite processor. , Which executes data transfer with the execution control unit 7,
Reference numeral 10 denotes a transfer data execution unit that is developed in the standby system of the opposite processor 2 and, in accordance with the transfer data sent from the execution control unit 7, with respect to the interprocessor communication control device 6 on the opposite processor side in a failure state. It carries out the diagnosis.

In the conventional technique in which the program is developed as described above, the execution control unit 7 first passes the data necessary for diagnosis to the data execution unit 8, and the data execution unit 8 follows the received diagnosis data. A diagnostic process is executed for the inter-processor communication control device 6 to be diagnosed. continue,
The data execution unit 8 receives the response result from the inter-processor communication control device 6 and instructs the execution control 7 to transfer necessary data. Upon receiving this instruction, the execution control unit 7 transfers the requested data to the data transfer unit 9 via the active communication line, and the transfer data execution unit 10 follows the received transfer data. A diagnostic process is executed for the inter-processor communication control device 6 to be diagnosed. Subsequently, when the data transfer unit 9 receives the response result of the interprocessor communication control device 6 from the transfer data execution unit 10, the data transfer unit 9 transfers the data to the execution control unit 7 via the active communication line, and the execution control unit 7 passes the transferred data to the data execution unit 8. Then, finally, the data execution unit 8 diagnoses the failure by checking the data from both the inter-processor communication control devices 6, and executes the processing so that the execution control unit 7 displays the diagnosis result as necessary. .

As described above, in the conventional technology, the main processor 1 takes the initiative in the diagnostic processing and executes all of the settings of data necessary for the diagnosis and the response check from the inter-processor communication control device 6. I was collecting.

[Problems to be Solved by the Invention]

However, in such a conventional technique, there is a problem that the program size for failure diagnosis developed in the main processor 1 becomes large, and the load on the main processor 1 increases, and the main processor 1 and the opposite processor 2 There is a problem that the diagnosis time becomes long due to the large amount of data transfer between and. From now on, there is a problem that the load on the active system in operation increases and the efficiency of data processing is significantly reduced.

The present invention has been made in view of such circumstances,
An object of the present invention is to provide a failure diagnosis processing method that can reduce the load of the active system in operation in the failure diagnosis processing of the interprocessor communication device of the multiprocessor system.

[Means for solving the problem]

 FIG. 1 is a block diagram showing the principle of the present invention.

In the figure, the same components as those described in FIG. 8 are indicated by the same symbols, 6a is an inter-processor communication control unit on the active side, and 6b is an inter-processor communication control unit on the standby side in a failure state. It represents. Reference numeral 20 is a diagnostic data storage area for storing diagnostic data 30. The stored diagnostic data 30 has a designation flag 31 indicating each processor on the execution side and diagnostic data 32 to be executed for the interprocessor communication control device 6b as basic units, and the basic units are arranged in the order of execution. It is composed of

Reference numeral 40 denotes a diagnostic execution requesting means, which executes the diagnostic data 32 forming a basic unit to the executing processor via the communication line of the active system when the processor is not displayed by the designated flag 31 itself. 50 is diagnostic execution transmission means for executing diagnostic data 32, which is a basic unit, to its own interprocessor communication control device 6b when there is an execution request from the diagnostic execution request means 40. Along with the condition that the request source processor is in the reception request mode, the one that transmits the data related to the diagnosis to the request source processor via the communication line of the active system, 60 is a failure analysis means, When the data from the diagnostic execution transmitting means 50 is received through the communication line of the active system, the data between the processors is determined from the received data and the status data of the inter-processor communication control device 6b. And it executes the failure analysis of the signal control device 6b.

According to the present invention, each of the main processor 1 and the opposite processor 2 is provided with the diagnostic data storage area 20, the diagnostic execution requesting means 40, the diagnostic execution transmitting means 50 and the failure analyzing means 60 according to the same configuration, and the same diagnostic Data
30 will be expanded in the diagnostic data storage areas 20 of both the main processor 1 and the opposite processor 2.

[Action]

In the present invention, when sequentially reading the basic units of the diagnostic data 30, when it is determined that the designated flag 31 does not display its own processor name, the diagnostic execution requesting unit 40 determines that the active processor Via the communication control device 6a, a request to execute the diagnostic data 32 following the designated flag 31 is issued to the diagnostic execution transmitting means 50 of the partner processor on the execution side, and then processing is performed to enter the reception request mode. When this execution request is received, the executing processor,
That is, the diagnostic execution transmitting means 50 of the processor on the side indicated by the designation flag 31 is configured to execute the diagnostic data requested to be executed.
32 is the inter-processor communication controller 6b in its own failure state
Then, after confirming that the requesting processor is in the reception request mode, the data related to the diagnosis is sent to the requesting processor via the interprocessor communication control device 6a of the active system. Send. Upon receiving this data, the failure analysis means 60 of the requesting processor determines, based on the received data and the status data of the interprocessor communication control device 6b in its own failure state, the interprocessor communication control device.
Analyze the cause of failure in 6b.

As described above, in the present invention, the diagnostic data 30 for the inter-processor communication control device, which is composed of the pair of the execution processor name and the diagnostic data, is developed in common to both processors, and both processors are mutually While synchronizing
By executing the expanded diagnostic data 30 according to the equal load, the failure analysis of the interprocessor communication control device is executed. From this, it is possible to significantly reduce the amount of data transfer required for the failure diagnosis, so that the diagnosis time can be greatly shortened, and the load on one of the processors is not biased. Therefore, the diagnosis of the interprocessor communication control device can be executed without lowering the efficiency of the data processing of the active system which is moving.

〔Example〕

Hereinafter, the present invention will be described in detail according to an embodiment applied to a multiprocessor system of a telephone exchange system.

FIG. 2 shows a system configuration of a telephone exchange system to which the present invention is applied. As shown in this figure, a plurality of opposite processors 2 are arranged to execute distributed control of the telephone exchange system by receiving control from the main processor 1 and executing switching processing of the network 19 which they respectively handle. To be done. In the telephone exchange system configured as described above, the main processor 1 and the opposite processor 2 have a dual configuration in order to cope with the system down due to the failure of the inter-processor communication control device 6, and each opposite processor 2 is normally , The control of each network 19 is executed according to the active system, and when a failure occurs in the interprocessor communication control device 6,
The standby system that has been on standby will be switched to the active system, and control of the network 19 will be continued. Then, when a failure occurs, processing is performed so that the failure diagnosis processing of the interprocessor communication control device 6 is executed using the switched active communication line.

FIG. 3 shows an embodiment configuration of the failure diagnosis processing of the interprocessor communication control device 6 according to the present invention. This figure shows a unit configuration of a diagnostic program to be developed in the main processor 1 and the opposite processor 2 in order to execute the failure diagnosis processing of the present invention. In the figure, those exhibiting the same functions as those explained in FIG. 9 are indicated by the same symbols, and as explained in FIG. , 6b
Represents the inter-processor communication control unit on the standby side in the fault state. Reference numeral 11 is a reception request flag for expanding the active system of the main processor 1 and the opposite processor 2 on the memory, and when the reception request state regarding the data related to the failure diagnosis is in the reception request flag, the flag is set by its own execution control unit 7. 12 indicates the reception request mode, and 12 indicates the main processor 1 and the opposite processor 2.
Is a flag monitoring unit that is developed in the active system, and is activated by the partner execution control unit 7 to monitor the flag state of the reception request flag 11.

As shown in this figure, in the present invention, the execution control unit 7 for executing the control of the diagnostic processing is configured to be equally deployed in the active systems of both the main processor 1 and the opposite processor 2, and the execution control is performed. According to the diagnostic data from the unit 7, the inter-processor communication control device 6b in the fault state
A data execution unit 8 that executes a diagnostic process for the main processor 1 and the opposite processor 2
It is characterized in that it is configured so as to be spread equally.

FIG. 4 shows the data structure of the diagnostic data 30 included in the present invention in order to enable such a configuration. As shown in this figure, in the present invention, the diagnostic data 30 required to execute the failure diagnosis of the interprocessor communication control device 6b in the failure state is specified by the designation flag 31 for displaying the processor name of the executing side. And the diagnostic data 32 designating the specific diagnostic content as a basic unit, and this basic unit is arranged in the order of execution. Specifically, in the example of FIG. 4, “1” is set in the designation flag 31 of “1”, “write command” is set in the diagnostic data 32 of “0”, and “0” is set in the designation flag 31 of “1”. Is set and the "read command" is set in the diagnostic data 32 of, the "write command" is first executed to the interprocessor communication control device 6b on the main processor 1 side, and then, Interprocessor communication controller on opposite processor 2 side
The data structure is such that a "read command" is executed for 6b. Then, in the present invention, the diagnostic data 30 having such a structure is developed commonly to both the main processor 1 and the opposite processor 2.

As described above, the present invention is configured so that the main processor 1 and the opposite processor 2 have exactly the same diagnostic data 30 for failure diagnosis.

Next, the operation processing of the present invention will be described in detail with reference to the flowcharts shown in FIGS. Here, the flowchart of FIG. 5 is a flowchart executed by the data execution unit 8, the flowchart of FIG. 6 is a flowchart executed by the execution control unit 7, and the flowchart of FIG. 7 is executed by the flag monitoring unit 12. It is a flowchart.

As shown in the flow chart of FIG. 5, the data execution unit 8 which executes the diagnostic process, first, in step 1,
When determining the processor type and determining that its own processor is the main processor 1, "1" is assigned as a processor variable in step 2, and when determining that its own processor is the opposite processor 2, step 3 Executes the process of assigning a processor variable to "0". Then, the process proceeds to step 4, where whether the designated flag 31 of the diagnostic data 30 to be processed, which is given from the execution control unit 7, is changing its own processor variable or, conversely, the other processor variable is changed. Determine if it shows.

The designated flag to be processed according to the determination in step 4
When 31 determines that the other party's processor variable is displayed, it means that the data executing section 8 of the other party's processor executes the diagnostic data 32 following the designated flag 31, so the data executing section 8 Then, in step 5, the transmission request is sent to its own execution controller 7, and in the following step 6, the diagnostic data 32 up to the next designated flag 31 is skipped without being executed. On the other hand, when it is determined that the designated flag 31 to be processed indicates its own processor variable, it means that the designated flag 31 itself executes the diagnostic data 32 following the designated flag 31. , The process proceeds to step 7, and the own execution control unit 7
When a reception request is sent to the other side and a request from the other side is received, the diagnostic data 32 up to the next designated flag 31 is executed in the following step 8. Finally, in step 9, it is determined whether or not all the diagnostic data 30 has been executed. If it is judged that the execution has been completed, the processing is ended, and if it is judged that it has not been completed, the processing returns to step 4. To do.

That is, the data execution unit 8 of the processor that is not displayed with the designation flag 31 processes to send an activation request to the data execution unit 8 of the other processor, and the data execution unit 8 of the side that is displayed with the designation flag 31 When the data execution unit 8 of the processor receives the activation request from the other processor, the data execution unit 8 processes the diagnostic data 32 following the designation flag 31 to be executed.

Next, the control process for the data execution unit 8 executed by the execution control unit 7 will be described with reference to the flowchart of FIG. When the data execution unit control process is entered as shown in step 11, it is determined in step 12 whether the request from the data execution unit 8 is a transmission request or a reception request. If it is determined in step 12 that the request is a transmission request, it means that the data execution unit 8 of the other processor is requested to transmit the execution result of the diagnostic data 32. In the following step 13, the unit 7 activates the flag monitoring unit 12 of the other processor via the active interprocessor communication control device 6a. Then, when it is confirmed that the reception request flag 11 is set in the reception request flag 11 of the partner processor, the execution control unit of the partner processor transmits the data requested to be transmitted through the interprocessor communication control device 6a of the active system. Process to pass to 7.

On the other hand, when it is determined in step 12 that the request is a reception request, it means that the reception of data regarding the diagnostic data 32 of the data execution unit 8 of the partner processor is requested, and therefore the execution control unit 7 follows step 14
Then, the reception request flag 11 is set to the reception request flag. Then, in step 15, waiting for data reception is executed, and in the next step 16, it is judged whether or not the data is received.
Then, the received data is transferred to the data execution unit 8. Finally, in step 18, it is determined whether or not the data execution unit control processing has ended. When it is determined that the data execution portion control processing has ended, the processing is ended, and when it is determined that it has not ended, the processing returns to step 12.

That is, the execution control unit 7 transmits the execution result of the diagnostic data 32 or the like to the data execution unit 8 of the partner processor via the communication line of the active system in accordance with the request from the data execution unit 8, or Processing is executed so as to receive the execution result of the diagnostic data 32 from the data execution unit 8 of the partner processor.

Next, the processing of the flag monitoring unit 12 will be described with reference to the flowchart of FIG. When the flag monitoring unit 12 is activated by the execution control unit 7 of the counterpart processor, the flag monitoring unit 12 determines in step 21 whether the reception request flag 11 is set to the reception request flag. If it is determined that the reception request flag is not set,
Since it means that you are not ready to receive data,
In step 22, the timing process is performed, and then the process returns to step 21. On the other hand, in the judgment of step 21,
If it is determined that the reception request flag is set, it means that the data is ready to be received. Therefore, the process proceeds to step 23, and the data sent from the execution control unit 7 of the partner processor is processed by itself. It is passed to the execution control unit 7 of the processor, and in the subsequent step 24, the reception request flag 11
Is cleared and the process ends.

That is, the flag monitoring unit 12 transfers the sent data to the execution control unit 7 when it detects that it is in the reception state.

Next, by taking the diagnostic data 30 shown in FIG. 4 as an example, the diagnostic process will be specifically described for the interprocessor communication control device 6b in the fault state.

If the designation flag 31 of is the designation flag 31 of the processing target, since the designation flag of “1” is displayed, the data execution unit 8 of the main processor 1 itself receives the activation request receiving side. The opposite processor 2
The data execution unit 8 determines that it is the non-execution start request transmission side. Then, the data execution unit 8 of the opposite processor 2 executes the activation request to the data execution unit 8 of the main processor 1 via the interprocessor communication control device 6a of the active system, and the "write command of the diagnostic data The skip processing of "" is executed and the reception waiting state is processed by the next designated flag. On the other hand, when the activation request is received, the data execution unit 8 of the main processor 1 which has been in the reception waiting state by the designation flag 31 of
Executes the "write command" of the diagnostic data 32 to the interprocessor communication control device 6b in the fault state. That is, the data execution unit 8 of the main processor 1 transfers the data to the data execution unit 8 of the opposite processor 2 via the interprocessor communication control device 6b in the failed state.

Subsequently, since the designation flag 31 of “0” is displayed, the data execution unit 8 of the main processor 1 determines that it is the non-execution start request transmission side, and the data execution unit of the opposite processor 2 8 determines that it is the execution request receiving side for execution. From now on, the execution unit 8 of the main processor 1 executes the transmission start request to the data execution unit 8 of the corresponding processor 2 via the inter-processor communication control device 6a of the active system, and the "read command of the diagnostic data The skip processing of "" is executed and the reception waiting state is processed by the next designated flag. On the other hand, when the transmission activation request is received, the flag monitoring unit 12 of the opposite processor 2 monitors the reception request flag 11 to confirm that the data execution unit 8 of the opposite processor 2 is in the reception waiting state, The activation request from the main processor 1 sent via the inter-processor communication control device 6a is passed to the data execution unit 8. Then, according to the start instruction,
The data execution unit 8 of the opposite processor 2 uses the diagnostic data of the interprocessor communication control device 6b in the fault state.
Execute 32 “read instructions”. That is, the data execution unit 8 of the opposite processor 2 performs the reading process of the data transmitted by the "write command". Then, the data execution unit 8 of the opposite processor 2 compares the read result with the read correct answer value sent to determine what the failure is in the interprocessor communication control device 6b in the failed state. It will be processed for parsing.

In this way, according to the present invention, the main processor 1 and the opposite processor 2 are commonly developed as diagnostic data.
By using 30, the diagnostic data 30 is sequentially executed in synchronization with each other according to the instruction displayed by the designation flag 31, so that the failure analysis of the interprocessor communication control device 6b in the failed state is executed. is there.

Although the illustrated embodiment has been described above, the present invention is not limited to this. For example, the invention is not limited in its application to the multiprocessor system of a telephone exchange system. In addition, for convenience of explanation, light /
Although the specific column has been described with the diagnostic data of the read instruction, the present invention is not limited to this.

[Effects of the Invention] As described above, according to the present invention, the diagnostic data for the inter-processor communication control device, which is composed of the pair of the execution processor name and the diagnostic data, is expanded to both processors, and The processors analyze the failure of the inter-processor communication control device by executing the developed diagnostic data according to the equal load while synchronizing with each other. From this, it is possible to significantly reduce the amount of data transfer required for the failure diagnosis, so that the diagnosis time can be greatly shortened, and the load on one of the processors is not biased. Therefore, without reducing the efficiency of data processing of the active system in operation,
The diagnosis of the interprocessor communication control device can be executed.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a system block diagram of a telephone exchange system to which the present invention is applied, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. Data structure diagram, FIGS. 5, 6 and 7 are flowcharts executed by the present invention, FIG. 8 is a system configuration diagram of a multiprocessor system adopting a duplex configuration, and FIG. 9 is an explanatory diagram of a conventional technique. is there. 1 is a main processor, 2 is an opposite processor, 6 is an interprocessor communication control device, 7 is an execution control unit, 8 is a data execution unit, 11 is a reception request flag, 12 is a flag monitoring unit, 20 is a diagnostic data storage area, 30 is diagnostic data, 31 is a designation flag, 32 is diagnostic data, 40 is diagnostic execution requesting means, 50 is diagnostic execution transmitting means, and 60 is failure analysis means.

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Claims (1)

[Claims] 1. A fault diagnosis processing method for diagnosing a fault occurring in an inter-processor communication control device (6) for controlling communication between a main processor (1) and an opposite processor (2), wherein a processor on the execution side A diagnostic data (30) is prepared, in which a designated flag indicating a name and diagnostic data to be executed for the interprocessor communication control device (6) are used as basic units, and the basic units are arranged in the order of execution. The main processor (1) and the opposite processor (2), and each of the main processor (1) and the opposite processor (2) is not displayed by the designated flag. , A diagnostic execution request for requesting the execution-side processor to execute the diagnostic data forming the basic unit via the active communication line. Means (4
0) and when there is this execution request, the diagnostic data forming the basic unit is executed to its own interprocessor communication control unit (6) in the failed state, and the requesting processor enters the reception request mode. On the condition that there exists, the diagnostic execution transmitting means (50) for transmitting the data related to the diagnosis to the requesting processor via the communication line of the active system, and the data received from this diagnostic execution transmitting means (50). When,
Own inter-processor communication control device in a fault state (6)
From the status data of the interprocessor communication control device (6)
And a failure analysis means (60) for executing the failure analysis of (1).