JPH0877079A - External storage device - Google Patents

External storage device

Info

Publication number
JPH0877079A
JPH0877079A JP6213084A JP21308494A JPH0877079A JP H0877079 A JPH0877079 A JP H0877079A JP 6213084 A JP6213084 A JP 6213084A JP 21308494 A JP21308494 A JP 21308494A JP H0877079 A JPH0877079 A JP H0877079A
Authority
JP
Japan
Prior art keywords
power
power supply
indication
external storage
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6213084A
Other languages
Japanese (ja)
Inventor
Yuji Sato
裕二 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP6213084A priority Critical patent/JPH0877079A/en
Publication of JPH0877079A publication Critical patent/JPH0877079A/en
Withdrawn legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To prevent data destruction and system abnormality by making a power-OFF indication ineffective until writing to a storage medium ends if a command which is issued right before is a write command although the power- OFF indication is made. CONSTITUTION: The main body device 1 of a host device and the external storage device 10 are connected with an interface signal E and AC electric power A is supplied. When a command decision circuit 11 decides that the interface signal E is the write command, a power-OFF control circuit 12 is informed of that and generates and outputs a stand-by indication C for making the power-OFF indication ineffective for a certain time to a power source control part 13 in response to the information. Therefore, even if there is a supply cutoff indication for the AC power source A from the main body device 1 or a power-OFF indication B made by an operator, the power source control part 13 does not disconnect a DC power source F while the stand-by indication C is present and disconnects the output of the DC power source F once the stand-by indication C is ceased.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は外部記憶装置に関し、特
に情報処理装置に使用されてこの情報処理からの書込み
命令に応答して書込みデータを一時ライトキャッシュ等
のバッファに蓄えてから記憶媒体へ実際に書込みを行う
ように構成された外部記憶装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an external storage device, and more particularly to an external storage device which stores write data in a buffer such as a temporary write cache in response to a write command from the information processing device and then stores the write data in a storage medium. The present invention relates to an external storage device configured to actually perform writing.

【0002】[0002]

【従来の技術】従来のこの種の外部記憶装置における動
作電源の制御方式の例としては、一般には、外部記憶装
置の電源オンオフスイッチを介して外部記憶装置の入力
電源が上位装置である本体装置などのサービスコンセン
トより供給されていることが多く、この様な場合には、
本体装置の電源オンオフによって外部記憶装置の入力電
源の供給制御が直接になされることになる。そのため
に、オペレータが誤って外部記憶装置の書込み動作中に
本体装置の電源をオフとすると、データ破壊によりシス
テム異常が生じ、また記憶媒体にも傷が生じるという問
題がある。
2. Description of the Related Art As an example of a control method of operating power supply in a conventional external storage device of this type, generally, a main body device in which an input power supply of the external storage device is a host device via a power on / off switch of the external storage device. It is often supplied from a service outlet such as
The power supply of the external storage device is directly controlled by turning on / off the power of the main body device. Therefore, if the operator mistakenly turns off the power supply of the main unit during the writing operation of the external storage device, there is a problem that a system abnormality occurs due to data destruction and a storage medium is damaged.

【0003】そこで、特開平4−162115号公報や
特開平4−114218号公報等において、本体装置と
外部記憶装置との間のインタフェース信号により外部記
憶装置が書込み動作中であることを検出して書込み動作
終了後に電源を切断する手法が提案されている。
Therefore, in Japanese Unexamined Patent Publication No. 4-162115 and Japanese Unexamined Patent Publication No. 4-114218, it is detected that the external storage device is in the writing operation by an interface signal between the main body device and the external storage device. A method has been proposed in which the power supply is cut off after the write operation is completed.

【0004】[0004]

【発明が解決しようとする課題】現状主流となりつつあ
るライトキャッシュ機能を有する外部記憶装置において
は、本体装置からの書込みデータを一旦ライトキャッシ
ュバッファに取込んで、しかる後にこのライトキャッシ
ュバッファから記憶媒体へ書込みデータを実際に書込む
動作が行われる。
In the external storage device having the write cache function, which is becoming the mainstream at present, the write data from the main body device is temporarily taken into the write cache buffer, and thereafter the storage medium is transferred from the write cache buffer. The operation of actually writing the write data to is performed.

【0005】この様なライトキャッシュ機能を有する外
部記憶装置では、このデータ転送用のライトキャッシュ
バッファに書込みデータが取込まれた時点でインタフェ
ース信号は書込み終了を示す状態となるために、上述し
た各公開公報の技術では、このライトキャッシュバッフ
ァから実際に記憶媒体にデータを書込む前、または書込
み開始時に電源が切断される危険性は残っており、よっ
て通常の電源制御方式と同様な問題が依然として生ずる
ことになる。
In the external storage device having such a write cache function, the interface signal is brought into a state indicating the end of writing when the write data is taken into the write cache buffer for data transfer. In the technique of the publication, there is still a risk that the power is cut off before actually writing data from the write cache buffer to the storage medium or at the start of writing. Therefore, the problem similar to the normal power control method still remains. Will occur.

【0006】そこで、本発明はこの様な従来技術の欠点
を解消すべくなされたものであって、その目的とすると
ころは、ライトキャッシュ機能を有する場合にも、デー
タ破壊やシステム異常等が生じない様な電源切断制御を
可能とした外部記憶装置を提供することにある。
Therefore, the present invention has been made in order to solve the drawbacks of the prior art, and its purpose is to cause data destruction, system abnormality, etc. even when the write cache function is provided. An object of the present invention is to provide an external storage device capable of power-off control that does not occur.

【0007】[0007]

【課題を解決するための手段】本発明による外部記憶装
置は、記憶媒体と、この記憶媒体に対する上位装置から
の書込み命令に応答して書込みデータを一時蓄積するバ
ッファ手段と、前記上位装置からの書込み命令に応答し
て、少なくとも前記バッファ手段からの書込みデータの
前記記憶媒体への書込み終了までの期間電源切断指示を
無効化する電源制御手段とを含むことを特徴としてい
る。
An external storage device according to the present invention comprises a storage medium, a buffer means for temporarily storing write data in response to a write command to the storage medium from a host device, and a buffer device from the host device. In response to the write command, at least the power supply control means for invalidating the power-off instruction during the period until the writing of the write data from the buffer means to the storage medium is completed.

【0008】[0008]

【作用】上位装置からの書込み命令時に、外部記憶装置
バッファから記憶媒体への書込みデータの転送終了まで
は、電源切断指示があってもこれを無効化するようにし
て、記憶媒体へのデータ書込みが実際に終了してから電
源切断可能としたものである。
When the write command is issued from the host device, even if there is a power-off instruction until the transfer of the write data from the external storage device buffer to the storage medium is completed, this is invalidated and the data is written to the storage medium. The power can be turned off after the actual termination.

【0009】[0009]

【実施例】以下に本発明の実施例について図面を用いて
詳細に説明する。
Embodiments of the present invention will be described below in detail with reference to the drawings.

【0010】図1は本発明の実施例のブロック図であ
る。図において、上位装置である本体装置1と外部記憶
装置10とはインタフェース信号Eにより接続されてお
り、また本体装置1からAC(交流)電源Aが外部記憶
装置10へ供給されている。
FIG. 1 is a block diagram of an embodiment of the present invention. In the figure, the main body device 1 which is a host device and the external storage device 10 are connected by an interface signal E, and an AC (alternating current) power supply A is supplied from the main body device 1 to the external storage device 10.

【0011】外部記憶装置10はデータの記憶をなす記
憶部16と、インタフェース信号Eにより書込みコマン
ドを判定するコマンド判定回路11と、この判定結果に
応答して一定時間は電源切断を無効化するための電切断
待機信号Cを生成する電源切断回路12と、この電源切
断待機信号C、AC電源A及び電源オンオフ指示Bを受
けて直流電源Fの供給制御をなす電源制御部13とを有
する。
The external storage device 10 stores the data in the storage section 16, the command determination circuit 11 for determining a write command by the interface signal E, and disables the power-off for a certain time in response to the determination result. And a power supply control unit 13 that controls the supply of the DC power supply F in response to the power supply cutoff standby signal C, the AC power supply A, and the power supply on / off instruction B.

【0012】記憶部16はインタフェース信号Eとのイ
ンタフェースをなすインタフェース制御部17と、書込
みデータを一時蓄えるバッファ18と、記憶媒体19と
を有している。
The storage unit 16 includes an interface control unit 17 that forms an interface with the interface signal E, a buffer 18 that temporarily stores write data, and a storage medium 19.

【0013】コマンド判定回路11にてインタフェース
信号Eが書込みコマンドであると判定されれば、電源切
断制御回路12に対してその旨通知される。電源切断制
御回路12はこの通知に応答して一定時間電源切断指示
を無効化するための待機指示Cを生成して電源制御部1
3へ出力する。
If the command determination circuit 11 determines that the interface signal E is a write command, the power-off control circuit 12 is notified of that fact. In response to this notification, the power-off control circuit 12 generates a standby instruction C for invalidating the power-off instruction for a certain period of time to generate the power-supply control unit 1.
Output to 3.

【0014】従って、本体装置1からのAC電源Aの供
給切断やオペレータによる電源オフ指示Bがあっても、
この待機指示Cが存在している間は電源制御部13はD
C(直流)電源Fの出力を切断せずに継続し、待機指示
Cが消滅した時点で始めてDC電源Fの出力を断とする
のである。
Therefore, even if the AC power supply A is cut off from the main unit 1 or the operator turns off the power B,
While the standby instruction C is present, the power control unit 13 sets D
The output of the C (DC) power supply F is continued without being cut off, and the output of the DC power supply F is cut off only when the standby instruction C disappears.

【0015】当該待機指示Cの生成期間としては、少な
くとも書込みコマンド検出時点からバッファ18から記
憶媒体19へのデータ書込みが終了するまでの間であ
り、この期間は記憶部16の仕様により定まるので、そ
の仕様に応じてタイマ等を用いて設定するようにする。
The generation period of the standby instruction C is at least from the time when the write command is detected until the data writing from the buffer 18 to the storage medium 19 is completed, and this period is determined by the specifications of the storage unit 16. A timer or the like should be used according to the specifications.

【0016】図2は電源制御部13の一例を示すブロッ
ク図である。DC出力判定回路20は、電源切断制御回
路12からの切断待機指示Cと電源オンオフ指示Bと本
体装置1からのAC供給Aとを入力として、これ等各入
力A〜Cの論理状態の組合せに応じてDC出力許可Dを
生成するものである。
FIG. 2 is a block diagram showing an example of the power supply controller 13. The DC output determination circuit 20 receives the disconnection standby instruction C, the power supply on / off instruction B, and the AC supply A from the main body apparatus 1 from the power supply disconnection control circuit 12 as inputs, and determines the combination of the logical states of these inputs A to C. Accordingly, the DC output permission D is generated.

【0017】AC/DC変換回路21は本体装置1から
のAC供給Aを受けてDC電源を生成するものであり、
バッテリ22は記憶媒体19のバックアップ用の電池で
ある。この電池出力はDC判定回路20の動作電源とな
ると共に、DC出力回路23への入力ともなっている。
The AC / DC conversion circuit 21 receives the AC supply A from the main unit 1 and generates a DC power supply.
The battery 22 is a battery for backing up the storage medium 19. This battery output serves as an operating power source for the DC determination circuit 20 and also serves as an input to the DC output circuit 23.

【0018】DC出力回路23にはAC/DC変換回路
21のDC出力も印加されており、論理的にオア入力と
されているものとする。このDC出力回路23はDC出
力判定回路20からのDC出力許可信号Dに従って、バ
ッテリ出力かAC/DC変換回路21の出力かを択一的
に導出し、記憶部16の動作電源とするものである。
It is assumed that the DC output of the AC / DC conversion circuit 21 is also applied to the DC output circuit 23 and is logically an OR input. The DC output circuit 23 selectively derives the battery output or the output of the AC / DC conversion circuit 21 according to the DC output permission signal D from the DC output determination circuit 20 and uses it as the operating power supply of the storage unit 16. is there.

【0019】DC出力判定回路20の3入力A〜Cに対
する1出力Dの状態は、図3に示す如き関係にあるもの
とする。従って、切断待機指示信号Cが「有」でアクテ
ィブの間は、AC供給が断になっても電源オフ指示があ
っても、すべて無効化されてDC出力が上述のタイマに
て定められた期間は、記憶部16の電源はオフとならな
いのである。
It is assumed that the state of the one output D with respect to the three inputs A to C of the DC output determination circuit 20 has the relationship shown in FIG. Therefore, while the disconnection standby instruction signal C is “present” and active, even if the AC supply is cut off or there is a power-off instruction, all are invalidated and the DC output is for a period determined by the above timer. That is, the power of the storage unit 16 is not turned off.

【0020】尚、図2に示したDC出力判定回路20の
入出力論理(図3)を実現するためのロジック回路の例
を図4に示し、図5に入出力の信号定義を示す。尚、図
4において、51〜52は2入力アンドゲート、53は
2入力オアゲートを夫々示している。
An example of a logic circuit for realizing the input / output logic (FIG. 3) of the DC output determination circuit 20 shown in FIG. 2 is shown in FIG. 4, and the input / output signal definition is shown in FIG. In FIG. 4, 51 to 52 are 2-input AND gates, and 53 is a 2-input OR gate.

【0021】[0021]

【発明の効果】以上述べた如く、本発明によれば、オペ
レータによる電源オフ指示や上位装置からのAC供給停
止があっても、直前に発行されたコマンドがライトコマ
ンドであれば、少なくともバッファから記憶媒体へデー
タが書込まれて終了するまではこれ等指示を無効化して
電源供給を続行するようしたので、データ破壊やシステ
ム異常等の問題は生じないという効果がある。
As described above, according to the present invention, even if there is a power-off instruction from the operator or the AC supply is stopped from the host device, if the command issued immediately before is a write command, at least from the buffer. These instructions are invalidated and power supply is continued until the data is written to the storage medium and is ended, so that there is no problem such as data destruction or system abnormality.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例のシステムブロック図である。FIG. 1 is a system block diagram of an embodiment of the present invention.

【図2】図1のブロックの電源制御部13の例を示すブ
ロック図である。
FIG. 2 is a block diagram showing an example of a power supply control unit 13 in the block of FIG.

【図3】図2のブロックのDC出力判定回路20の入出
力論理状態を示す図である。
3 is a diagram showing an input / output logic state of a DC output determination circuit 20 of the block of FIG.

【図4】図2のDC出力判定回路20の一例を示す回路
図である。
FIG. 4 is a circuit diagram showing an example of a DC output determination circuit 20 of FIG.

【図5】図4の回路の入出力信号の定義を示す図であ
る。
5 is a diagram showing definitions of input / output signals of the circuit of FIG.

【符号の説明】[Explanation of symbols]

1 本体装置 10 外部記憶装置 11 コマンド判定回路 12 電源切断制御回路 13 電源制御部 16 記憶装置 17 インタフェース制御部 18 バッファ 19 記憶媒体 1 Main Unit 10 External Storage Device 11 Command Judgment Circuit 12 Power Supply Disconnection Control Circuit 13 Power Supply Control Unit 16 Storage Device 17 Interface Control Unit 18 Buffer 19 Storage Medium

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 記憶媒体と、この記憶媒体に対する上位
装置からの書込み命令に応答して書込みデータを一時蓄
積するバッファ手段と、前記上位装置からの書込み命令
に応答して、少なくとも前記バッファ手段からの書込み
データの前記記憶媒体への書込み終了までの期間電源切
断指示を無効化する電源制御手段とを含むことを特徴と
する外部記憶装置。
1. A storage medium, buffer means for temporarily storing write data in response to a write command from the host device to the storage medium, and at least from the buffer means in response to a write command from the host device. And a power supply control means for invalidating the power-off instruction during the period until the writing of the write data in the storage medium is completed.
【請求項2】 前記電源制御手段は、前記書込み命令を
判定するコマンド判定手段と、この判定に応答して前記
期間電源切断指示を無効化する無効化信号を生成する無
効化信号生成手段とを含むことを特徴とする請求項1記
載の外部記憶装置。
2. The power supply control means includes a command determination means for determining the write command and an invalidation signal generation means for generating an invalidation signal for invalidating the period power-off instruction in response to the determination. The external storage device according to claim 1, further comprising:
【請求項3】 前記電源制御手段は、前記記憶媒体の電
源オフ時のバックアップのためのバックアップ電源と、
前記上位装置からの交流電源の供給を受けて当該外部記
憶装置の動作直流出力を生成する電源回路と、この電源
回路及び前記バックアップ電源の各直流出力を択一的に
導出する手段とを有し、前記上位装置からの交流電源の
供給停止時に前記無効化信号の生成に応答して前記バッ
クアップ電源の直流出力を導出するよう構成されている
ことを特徴とする請求項1記載の外部記憶装置。
3. The backup power supply for backing up the storage medium when the storage medium is powered off,
It has a power supply circuit for receiving an AC power supply from the host device and generating an operation DC output of the external storage device, and means for selectively deriving each DC output of the power supply circuit and the backup power supply. 2. The external storage device according to claim 1, wherein the external storage device is configured to derive the DC output of the backup power supply in response to the generation of the invalidation signal when the supply of the AC power supply from the host device is stopped.
JP6213084A 1994-09-07 1994-09-07 External storage device Withdrawn JPH0877079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6213084A JPH0877079A (en) 1994-09-07 1994-09-07 External storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6213084A JPH0877079A (en) 1994-09-07 1994-09-07 External storage device

Publications (1)

Publication Number Publication Date
JPH0877079A true JPH0877079A (en) 1996-03-22

Family

ID=16633294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6213084A Withdrawn JPH0877079A (en) 1994-09-07 1994-09-07 External storage device

Country Status (1)

Country Link
JP (1) JPH0877079A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6477441B1 (en) 1997-02-19 2002-11-05 Mitsubishi Denki Kabushiki Kaisha Numerical control system having a built-in personal computer
WO2010118696A1 (en) * 2009-04-16 2010-10-21 华为终端有限公司 Electronic apparatus and power management device thereof
CN109040817A (en) * 2018-08-01 2018-12-18 深圳创维-Rgb电子有限公司 Update method, apparatus, display system and the electronic equipment of electronic program guides

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6477441B1 (en) 1997-02-19 2002-11-05 Mitsubishi Denki Kabushiki Kaisha Numerical control system having a built-in personal computer
WO2010118696A1 (en) * 2009-04-16 2010-10-21 华为终端有限公司 Electronic apparatus and power management device thereof
CN109040817A (en) * 2018-08-01 2018-12-18 深圳创维-Rgb电子有限公司 Update method, apparatus, display system and the electronic equipment of electronic program guides
WO2020024605A1 (en) * 2018-08-01 2020-02-06 深圳创维-Rgb电子有限公司 Method and apparatus for updating electronic program guide, display system, and electronic device

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